- 24 Sep, 2014 34 commits
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Damien Lespiau authored
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com Signed-off-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Damien Lespiau authored
Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
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Damien Lespiau authored
Reviewed-by:
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Damien Lespiau authored
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Damien Lespiau authored
gen9 uses very similar memory management to what gen8 has. Just follow the flow. v2: Fix trivial conflict (Damien) Reviewed-by:
Ben Widawsky <ben@bwidawsk.net> Signed-off-by:
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Damien Lespiau authored
Skylake doesn't use the pre-charge field now, but, instead, we need to specify the total number of SYNC pulses for the SYNC phase (pre-charge + SYNC pattern pules). Let's use the default value (32) for that. v3: increase DP AUX TX timeout as 400us is not to be used on SKL apparently (Jesse). Reviewed-by: -
Damien Lespiau authored
We need to provide a vfunc that will make the code in intel_dp_aux_ch() loop once to start the AUX transaction. The return value (clock divider) is unused on SKL, so just return 1. Reviewed-by:
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Damien Lespiau authored
Temporary plug a BUG() while waiting for a better solution. See: http://lists.freedesktop.org/archives/intel-gfx/2014-January/038132.html However Chris was looking at cleaning-up this as well, so went for the easy intermediate solution instead. Reviewed-by:
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Damien Lespiau authored
Skylake introduces new stolen memory sizes starting at 0xf0 (4MB) and growing by 4MB increments from there. v2: Rebase on top of the early-quirk changes from Ville. v3: Rebase on top of the PCI_IDS/IDS macro rename Reviewed-by:
Thomas Wood <thomas.wood@intel.com> Signed-off-by:
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Damien Lespiau authored
So we can apply the old aux_ctl = dp_ctl + 0x10 rule again. Reviewed-by:
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Damien Lespiau authored
They are similar to Haswell. v2: Rebased on top of drm-intel-nightly v3: Rebased on top of Sonika's DP train defines renaming Reviewed-by:
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Damien Lespiau authored
A couple of things have changed compared to Broadwell: - Entry 9 is used for eDP - No more FDI v2: Update the translation values to latest specs. v3: Rebase on top of the BDW HDMI translation patch v4: Remove the low voltage edp tables, Rebase on top of the patch not writing the HDMI entry on eDP/FDI DDIs (Satheesh, Paulo). v5: Apply the / 2 fix for the number of HDMI entries (Satheesh) v6: Rebase on top of Jani's clean up for the DDI_BUF_TRANS tables v7: Restore the commit message that was mangled by error Reviewed-by: -
Damien Lespiau authored
When the platform doesn't have a FDI link, don't try to read out the state of a potential PCH transcoder. Reviewed-by:
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Damien Lespiau authored
v2: Rebase on top of the intel_crt_present() addition v3: Fix rebase error (we were patching the wrong function) Reviewed-by:
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Damien Lespiau authored
Skylake makes primary planes the same as sprite planes and call the result "universal planes". This commit emulates a primary plane with plane 0, taking the opportunity to redefine primary and sprite registers to be identical now that the underlying hardware is. It also makes sense as plenty of fields have changed. v2: Rebase on top of the vma code. v3: Follow upstream evolution: - Drop return values. - Remove pipe checks since redudant and BUG instead. - Remove tiling checks and BUG instead. - Drop commented out DISP_MODIFY usage. v4: s/plane/primary_plane/ v5: Misc fixes: - Fix the fields we need to clear up - Disable trickle feed - Correctly use PLANE_OFFSET for the panning v6: (Jesse) Use pipe src size when programming plane size. This makes cloned configs work correctly w/o the use of a panel fitter. v7: Rebase on top of Ville's rmw elimination series v8: Remove clearing the trickle feed bit now that we don't do a RMW (Rodrigo, Damien) Add a comment about the stride unit (Rodrigo) Reviewed-by: -
Robert Beckett authored
Fix ARB_MODE register read for gen >= 8 in i915_swizzle_info Reviewed-by:
Robert Beckett <robert.beckett@intel.com> Signed-off-by:
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Damien Lespiau authored
v2: Also align X tiled fbs to 256KB (Thomas) Reviewed-by:
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Imre Deak authored
The following sets the AsyncFlip performance mode for everything above Gen6: commit 4790cb36b3eede8fb0cca529dc1d31b9936fa24b Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Sun Jan 20 16:11:20 2013 +0000 drm/i915: Disable AsyncFlip performance optimisations Starting from Gen9 the MI_MODE register layout changes and doesn't include the above bit. Reviewed-by:Imre Deak <imre.deak@intel.com> Signed-off-by:
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Damien Lespiau authored
Reviewed-by:
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Damien Lespiau authored
v2: Rebase on top of the broadwell_init_clock_gating() name change Reviewed-by:
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Damien Lespiau authored
v2: Rebased on top of the i915_gpu_error.c extraction. Reviewed-by:
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Daisy Sun authored
Enable FBC feature on Skylake Issue: VIZ-3788 Reviewed-by:
Daisy Sun <daisy.sun@intel.com> Signed-off-by:
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Satheeshakrishna M authored
Adding new macro IS_SKYLAKE for skylake specific implementation. Reviewed-by:
Satheeshakrishna M <satheeshakrishna.m@intel.com> Signed-off-by:
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Damien Lespiau authored
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Damien Lespiau authored
v2: Squash in 2nd patch from Damien for more ids (Daniel) v3: info->has*ring -> info->ring_mask conversion. Also add VEBOX support. v4: Fold in update from Damien v5: Rebase and add GEN_DEFAULT_PIPEOFFSETS v6: Add more PCI ID (Vandana) v7: Rebase and add IVB_CURSOR_OFFSETS v8: Renamed the macro from _PCI_IDS to _IDS for consistency Reviewed-by:
Vandana Kannan <vandana.kannan@intel.com> Signed-off-by:
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Daniel Vetter authored
Only !P can be used together with a function list. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Daniel Vetter authored
v2: Don't forget git add, noticed by David. Cc: David Herrmann <dh.herrmann@gmail.com> Signed-off-by:
David Herrmann <dh.herrmann@gmail.com> Acked-by:
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Daniel Vetter authored
In my header cleanup I've missed the debugfs functions completely. Signed-off-by:
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Daniel Vetter authored
Somehow I've missed these three, fix this up asap. Plus move drm_master_create since while at it. Signed-off-by:
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Daniel Vetter authored
Leftover from my previous header cleanup. This depends upon the patch to rework exynos mmap support, otherwise it'll break exynos. Signed-off-by:
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Daniel Vetter authored
Now that we've removed the copypasted users in gem/ttm we can relegate the legacy buffer mapping support to where it belongs. Also give it the proper drm_legacy_ prefix. While at it statify drm_mmap_locked, somehow I've missed that in my previous header rework. Signed-off-by:
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Daniel Vetter authored
The only user I could dig out was i915 back when ums+gem was still a thing. But we've just very much killed that, and even when someone screams about that we should resurrect that with a special hack (wrapping drm_gem_mmap) in i915, not in the core code. So good riddance to another entry point of the legacy buffer mapping code. Signed-off-by:
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Daniel Vetter authored
Really, the legacy buffer api should be dead, especially for all these newfangled drivers. I suspect this is copypasta from the transitioning days, which probably originated in radeon. Cc: "Christian König" <christian.koenig@amd.com> Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Rashika <rashika.kheria@gmail.com> Cc: Josh Triplett <josh@joshtriplett.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Fabian Frederick <fabf@skynet.be> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Alexandre Courbot <acourbot@nvidia.com> Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com> Cc: Christian Engelmayer <cengelma@gmx.at> Signed-off-by:
Ben Skeggs <bskeggs@redhat.com> Acked-by:
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Joe Perches authored
The return value is not used by callers of this function nor by uses of the DRM_ERROR macro so change the function to return void. Signed-off-by:
Joe Perches <joe@perches.com> Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
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- 23 Sep, 2014 2 commits
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Benjamin Herrenschmidt authored
Today, most callers of ttm_io_prot() check TTM_PL_FLAG_CACHED before calling it since on some archs it will unconditionally create non-cached mappings. But not all callers do which is incorrect as far as I can tell. Instead, move that check inside ttm_io_port() itself for all archs and make powerpc use the same implementation as ia64 and arm Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Benjamin Herrenschmidt authored
What the code does is equivalent to the x86 code, so let's use it as well Signed-off-by:
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- 22 Sep, 2014 1 commit
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Dave Airlie authored
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Sorry for late. This pull request includes some enhancements for Exynos drm, new feature supports, cleanups and fixups like below, - Consider low power transmission for drm mipi dsi module, and also add non-continuous clock mode support for Exynos mipi dsi driver. - Add Exynos3250 SoC support. - Enhance and clean up ipp framework and fimc driver. - Update to use component match support and fix up de-initialization order. - Remove a direct mmap interface and relevant stuff specific to Exynos drm, use drm generic mmap interface instead. And we will remove the specific interface from userspace library, libdrm soon. - Use universal plane which allows to replace fake primary plane with the real one. - Some code cleanups and fixups. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (40 commits) drm/exynos: switch to universal plane API drm/exynos: use drm generic mmap interface drm/exynos: remove DRM_EXYNOS_GEM_MAP_OFFSET ioctl drm/exynos: factor out initial setting of each driver drm/exynos/hdmi: unregister connector on removal drm/exynos/dp: unregister connector on removal drm/exynos/dpi: unregister connector and panel on removal drm/exynos/dsi: unregister connector on removal drm/exynos/fb: free exynos framebuffer on error drm/exynos/fbdev: fix fbdev gem object cleanup drm/exynos: fix drm driver de-initialization order drm/exynos/ipp: traverse ipp drivers list safely drm/exynos: update to use component match support drm/exynos/ipp: add file checks for ioctls drm/exynos/ipp: remove file argument from node related functions drm/exynos/fimc: fix source buffer registers drm/exynos/fimc: simplify buffer queuing drm/exynos/fimc: do not enable fimc twice drm/exynos/fimc: avoid clearing overflow bits drm/exynos/ipp: remove events during command cleaning ...
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- 19 Sep, 2014 3 commits
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Andrzej Hajda authored
The patch replaces legacy functions drm_plane_init() / drm_crtc_init() with drm_universal_plane_init() and drm_crtc_init_with_planes(). It allows to replace fake primary plane with the real one. Additionally the patch leaves cleanup of crtcs to core, this way planes and crtcs are cleaned in correct order. Signed-off-by:
Andrzej Hajda <a.hajda@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Inki Dae authored
This patch removes DRM_EXYNOS_GEM_MMAP ictrl feature specific to Exynos drm and instead uses drm generic mmap. We had used the interface specific to Exynos drm to do mmap directly, not to use demand paging which maps each page with physical memory at page fault handler. We don't need the specific mmap interface because the drm generic mmap which uses vm offset manager stuff can also do mmap directly. This patch makes a userspace region to be mapped with whole physical memory region allocated by userspace request when mmap system call is requested. Changelog v2: - do not set VM_IO, VM_DONTEXPEND and VM_DONTDUMP. These flags were already set by drm_gem_mmap - do not include <linux/anon_inodes.h>, which isn't needed anymore. Signed-off-by: -
Inki Dae authored
This interface and relevant codes aren't used anymore. Signed-off-by:
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