- 21 Nov, 2012 11 commits
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Vipul Kumar Samar authored
Dummy clocks were added for ARM platforms, so that clk_get() for interface clk doesn't fail for amba devices from amba_probe(). Because there is no amba device for SPEAr that doesn't have a valid clock with dev_id for SPEAr, we don't need these dummy clocks. Hence, remove them. Signed-off-by:
Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Deepak Sikri authored
The patch corrects the case when the rate table is being scanned for a given frequency, and the search frequency is beyond the maximum frequency indexed in the table. By default, the system should be set at max frequency present in the rate table. This patch correctly returns the corresponding index value. Signed-off-by:
Deepak Sikri <deepak.sikri@st.com> Signed-off-by:
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Deepak Sikri authored
This patch updates the existing rate tables with new frequencies. Signed-off-by:
Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by:
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Vipul Kumar Samar authored
This patch adds missing clocks: twd and macb. Signed-off-by:
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Vipul Kumar Samar authored
Flag CLK_SET_RATE_PARENT is required for a clock, where we want to propagate clk_set_rate to its parent. This patch adds this to multiple clocks. Signed-off-by:
Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by:
Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by:
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Shiraz Hashim authored
This patch fixes parent names of multiple clocks. Signed-off-by:
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Shiraz Hashim authored
This patch updates mux clock names of multiple clocks. It updates _clk with _mclk to make it more readable. Signed-off-by:
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Rajeev Kumar authored
dev_id & con_id names of multiple clocks are incorrect. This patch fixes these names with the names that come via DT. Signed-off-by:
Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by:
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Linus Walleij authored
The ARM IM-PD1 add-on module has a few clock of its own, let's move also these down to the drivers/clk/versatile driver dir and get rid of any remaining oldschool Integrator clocks. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Linus Walleij authored
It turns out that all platforms using the ICST VCO are really just touching two registers, and in the same way as well: one register with the VCO configuration as such, and one lock register that makes it possible to write to the VCO. Factor this register read/write into the ICST driver so we can reuse it in the IM-PD1 driver. Signed-off-by:
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Linus Walleij authored
The GPLv2 headers were missing and the subsystem maintainer likes them so put them in. I am the copyright holder, so explicitly licensing these under the GPLv2. Reported-by:
Mike Turquette <mturquette@ti.com> Signed-off-by:
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- 16 Nov, 2012 1 commit
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Fabio Estevam authored
Use a better name for the USB PHY clock. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
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- 15 Nov, 2012 4 commits
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Axel Lin authored
This fixes compile error if one of SPEAr3xx implementations is not selected. CC drivers/clk/spear/spear3xx_clock.o drivers/clk/spear/spear3xx_clock.c: In function 'spear3xx_clk_init': drivers/clk/spear/spear3xx_clock.c:599:3: error: implicit declaration of function 'spear300_clk_init' [-Werror=implicit-function-declaration] drivers/clk/spear/spear3xx_clock.c:601:3: error: implicit declaration of function 'spear310_clk_init' [-Werror=implicit-function-declaration] drivers/clk/spear/spear3xx_clock.c:603:3: error: implicit declaration of function 'spear320_clk_init' [-Werror=implicit-function-declaration] cc1: some warnings being treated as errors make[3]: *** [drivers/clk/spear/spear3xx_clock.o] Error 1 make[2]: *** [drivers/clk/spear] Error 2 make[1]: *** [drivers/clk] Error 2 make: *** [drivers] Error 2 Signed-off-by:
Axel Lin <axel.lin@ingics.com> Acked-by:
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Wei Yongjun authored
In case of error, the function clk_register() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by:
Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by:
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Ulf Hansson authored
Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org> Acked-by:
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Ulf Hansson authored
Signed-off-by:
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- 10 Nov, 2012 15 commits
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Ulf Hansson authored
At the same time the prcc bit for the kclk is corrected to bit 8 instead of 3. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
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Ulf Hansson authored
Signed-off-by:
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Ulf Hansson authored
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
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Ulf Hansson authored
Signed-off-by:
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Ulf Hansson authored
Cc: Ben Dooks <ben-linux@fluff.org> Cc: Wolfram Sang <w.sang@pengutronix.de> Acked-by:
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Tony Prisk authored
This patch adds some additional handling for the SDMMC special case in round_rate and set_rate which results in invalid divisor messages at boot time. Signed-off-by:
Tony Prisk <linux@prisktech.co.nz> Signed-off-by:
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Wei Yongjun authored
In case of error, the function clk_register_fixed_rate() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
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Ulf Hansson authored
Using the armss clk to update the frequency makes the driver no more directly dependant on the prmcu API. Signed-off-by:
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Ulf Hansson authored
The new armss clk is a prcmu_scalable_rate clk which represents the ARMSS clk. This then makes it possible to convert the smp_twd clk to a fixed factor clock type, using a fixed divider of 2 and with the armss clk as parent. Signed-off-by:
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Ulf Hansson authored
The prcmu_scalable_rate clock can change rate but is not gateable. Signed-off-by:
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Ulf Hansson authored
ARMSS clk directly maps it's frequency towards the cpufreq table. To be able to update the ARMSS clk rate, a new set_rate function for the ARMSS clk is added, which also will trigger a corresponding ARM OPP request. Additionally an ARMSS clk round_rate function is added to fetch valid cpufreq frequencies. Signed-off-by:
Samuel Ortiz <sameo@linux.intel.com> Signed-off-by:
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Ulf Hansson authored
By fetching the table as platform data we do not need the internally hardcoded cpufreq table anymore. Moreover the corresponding arm_opp idx2opp table, used for mapping frequency to correct opp bits is also removed. This due to that the opp bits is put directly in the index field of the cpufreq table. Signed-off-by:
Jonas Aaberg <jonas.aberg@stericsson.com> Acked-by:
Rafael J. Wysocki <rjw@sisk.pl> Acked-by:
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Ulf Hansson authored
To fetch the mfd child device we register the cpufreq driver as a platform driver. Signed-off-by:
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Ulf Hansson authored
The cpufreq table needs dynamically update due to what the PRCMU firmware is supporting. The table is then provided through to the mfd child device as platform data. Signed-off-by:
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Ulf Hansson authored
The cpufreq device is already added from the prcmu driver as a mfd child device. Signed-off-by:
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- 29 Oct, 2012 9 commits
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Stephen Boyd authored
Move this driver to use devm_clk_register() to simplify some error paths and reduce lines of code. Acked-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
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Stephen Boyd authored
Some clock drivers can be simplified if devres takes care of unregistering any registered clocks along error paths. Introduce devm_clk_register() so that clock drivers get unregistration for free along with simplified error paths. Signed-off-by:
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Stephen Boyd authored
clk_register() returns an ERR_PTR upon failure, not NULL. Fix these error paths. Acked-by:
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Pawel Moll authored
This patch adds a DT and non-DT based implementation of the common clock infrastructure for Versatile Express platform. It registers (statically or using DT) all required fixed clocks, initialises motherboard's SP810 cell (that provides clocks for SP804 timers) and explicitly registers VE "osc" driver, to make the clock generators available early. Signed-off-by:
Pawel Moll <pawel.moll@arm.com> Signed-off-by:
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Pawel Moll authored
This driver provides a common clock framework hardware driver for Versatile Express clock generators (a.k.a "osc") controlled via the config bus. Signed-off-by:
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Peter Ujfalusi authored
On OMAP4+ platforms the functional clock for the McPDM IP is suplied by the twl6040 codec (bit clock on the PDM bus). This common clock driver for twl6040 will register the mcpdm_fclk clock to be used by the McPDM driver to make sure that the needed clocks are available when needed. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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Wei Yongjun authored
In case of error, the function clk_register() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by:
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Wei Yongjun authored
In case of error, the function clk_register_fixed_rate() returns ERR_PTR() not NULL pointer. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generated this patch. (https://github.com/weiyj/dpatch) Signed-off-by:
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Ulf Hansson authored
For u8500 and using 100MHz as the frequency also requires the ape opp 100 voltage, thus use the prcmu_opp_volt_scalable clock type. Signed-off-by:
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