- 22 Apr, 2020 6 commits
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Florian Fainelli authored
Some of the properties pertaining to the broken turn around or resets were only documented in ethernet-phy.yaml while they are applicable across all MDIO devices and not Ethernet PHYs specifically which are a superset. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Florian Fainelli authored
The turn around bytes (2) are placed between the control phase of the MDIO transaction and the data phase, correct the wording to be more exact. Signed-off-by:
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David S. Miller authored
Vladimir Oltean says: ==================== Ocelot MAC_ETYPE tc-flower key improvements As discussed in the comments surrounding this patch: https://patchwork.ozlabs.org/project/netdev/patch/20200417190308.32598-1-olteanv@gmail.com/ the restrictions imposed on non-MAC_ETYPE rules were harsher than they needed to be. IP, IPv6, ARP rules can still be added concurrently with src_mac and dst_mac rules, as long as those MAC address rules do not ask for an offending EtherType. For that to actually be supported, we need to parse the EtherType from the flower classification rule first. ==================== Signed-off-by:
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Vladimir Oltean authored
An attempt was made in commit fe3490e6 ("net: mscc: ocelot: Hardware ofload for tc flower filter") to avoid clashes between MAC_ETYPE rules and IP rules. Because the protocol blacklist should have included ETH_P_ALL too, it created some confusion, but now the situation should be dealt with a bit better by the patch immediately previous to this one ("net: mscc: ocelot: refine the ocelot_ace_is_problematic_mac_etype function"). So now we can remove that check. MAC_ETYPE rules with a protocol of ETH_P_IP, ETH_P_IPV6, ETH_P_ARP and ETH_P_ALL _are_ supported, with some restrictions regarding per-port exclusivity which are enforced now. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
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Vladimir Oltean authored
The commit mentioned below was a bit too harsh, and while it restricted the invalid key combinations which are known to not work, such as: tc filter add dev swp0 ingress proto ip \ flower src_ip 192.0.2.1 action drop tc filter add dev swp0 ingress proto all \ flower src_mac 00:11:22:33:44:55 action drop it also restricted some which still should work, such as: tc filter add dev swp0 ingress proto ip \ flower src_ip 192.0.2.1 action drop tc filter add dev swp0 ingress proto 0x22f0 \ flower src_mac 00:11:22:33:44:55 action drop What actually does not match "sanely" is a MAC_ETYPE rule on frames having an EtherType of ARP, IPv4, IPv6, in addition to SNAP and OAM frames (which the ocelot tc-flower implementation does not parse yet, so the function might need to be revisited again in the future). So just make the function recognize the problematic MAC_ETYPE rules by EtherType - thus the VCAP IS2 can be forced to match even on those packets. This patch makes it possible for IP rules to live on a port together with MAC_ETYPE rules that are non-all, non-arp, non-ip and non-ipv6. Fixes: d4d0cb741d7b ("net: mscc: ocelot: deal with problematic MAC_ETYPE VCAP IS2 rules") Reported-by:Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by:
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Vladimir Oltean authored
Currently, the filter's protocol is ignored except for a few special cases (IPv4 and IPv6). The EtherType can be matched inside VCAP IS2 by using a MAC_ETYPE key. So there are 2 cases in which EtherType matches are supported: - As part of a larger MAC_ETYPE rule, such as: tc filter add dev swp0 ingress protocol ip \ flower skip_sw src_mac 42:be:24:9b:76:20 action drop - Standalone (matching on protocol only): tc filter add dev swp0 ingress protocol arp \ flower skip_sw action drop As before, if the protocol is not specified, is it implicitly "all" and the EtherType mask in the MAC_ETYPE half key is set to zero. Signed-off-by:
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- 21 Apr, 2020 13 commits
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David S. Miller authored
Yangbo Lu says: ==================== Support programmable pins for Ocelot PTP driver The Ocelot PTP clock driver had been embedded into ocelot.c driver. It had supported basic gettime64/settime64/adjtime/adjfine functions by now which were used by both Ocelot switch and Felix switch. This patch-set is to move current ptp clock code out of ocelot.c driver maintaining as a single ocelot_ptp.c driver, and to implement 4 programmable pins with only PTP_PF_PEROUT function for now. The PTP_PF_EXTTS function will be supported in the future, and it should be implemented separately for Felix and Ocelot, because of different hardware interrupt implementation in them. Changes for v2: - Put PTP driver under drivers/net/ethernet/mscc/. - Dropped MAINTAINERS patch. Kept original maintaining. - Initialized PTP separately in ocelot/felix platforms. - Supported PPS case in programmable pin. - Supported disabling pin function since deadlock is fixed by Richard. - Returned -EBUSY if not finding pin available. Changes for v3: - Re-sent. ==================== Signed-off-by: -
Yangbo Lu authored
Enable PTP programmable pin. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by:
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Yangbo Lu authored
Enable PTP programmable pin. Signed-off-by:
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Yangbo Lu authored
Support 4 PTP programmable pins with only PTP_PF_PEROUT function for now. The PTP_PF_EXTTS function will be supported in the future, and it should be implemented separately for Felix and Ocelot, because of different hardware interrupt implementation in them. Since the hardware is not able to support absolute start time, the periodic clock request only allows start time 0 0. But nsec could be accepted for PPS case for phase adjustment. Signed-off-by:
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Yangbo Lu authored
Add wave programming registers definitions for Ocelot platforms. Signed-off-by:
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Yangbo Lu authored
There are 5 PTP_PINS register groups on Ocelot switch. Except the one used for TOD operations, there are still 4 register groups for programmable pins. So redefine the 4 programmable pins. Signed-off-by:
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Yangbo Lu authored
The timestamp info should be only software timestamp capabilities if ptp clock does not work. Signed-off-by:
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Yangbo Lu authored
The Ocelot PTP clock driver had been embedded into ocelot.c driver. It had supported basic gettime64/settime64/adjtime/adjfine functions by now which were used by both Ocelot switch and Felix switch. This patch is to move current ptp clock code out of ocelot.c driver maintaining as a single ocelot_ptp.c. For futher new features implementation, the common code could be put in ocelot_ptp.c and the switch specific code should be in specific switch driver. The interrupt implementation in SoC is different between Ocelot and Felix. Signed-off-by:
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David S. Miller authored
Leon Romanovsky says: ==================== Remove vermagic header from global include folder Changelog: v2: * Changed the implementation of patch #4 to be like Masahiro wants. I personally don't like this implementation and changing it just to move forward this this patchset. v1: https://lore.kernel.org/lkml/20200415133648.1306956-1-leon@kernel.org * Added tags * Updated patch #4 with test results * Changed scripts/mod/modpost.c to create inclusion of vermagic.h from kernel folder and not from general include/linux. This is needed to generate *.mod.c files, while building modules. v0: https://lore.kernel.org/lkml/20200414155732.1236944-1-leon@kernel.org This is followup to the failure reported by Borislav [1] and suggested fix later on [2]. The series removes all includes of linux/vermagic.h, updates hns and nfp to use same kernel versioning scheme (exactly like we did for other drivers in previous cycle) and removes vermagic.h from global include folder. [1] https://lore.kernel.org/lkml/20200411155623.GA22175@zn.tnic [2] https://lore.kernel.org/lkml/20200413080452.GA3772@zn.tnic ==================== Signed-off-by:
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Leon Romanovsky authored
VERMAGIC* definitions are not supposed to be used by the drivers, see this [1] bug report, so introduce special define to guard inclusion of this header file and define it in kernel/modules.h and in internal script that generates *.mod.c files. In-tree module build: ➜ kernel git:(vermagic) ✗ make clean ➜ kernel git:(vermagic) ✗ make M=drivers/infiniband/hw/mlx5 ➜ kernel git:(vermagic) ✗ modinfo drivers/infiniband/hw/mlx5/mlx5_ib.ko filename: /images/leonro/src/kernel/drivers/infiniband/hw/mlx5/mlx5_ib.ko <...> vermagic: 5.6.0+ SMP mod_unload modversions Out-of-tree module build: ➜ mlx5 make -C /images/leonro/src/kernel clean M=/tmp/mlx5 ➜ mlx5 make -C /images/leonro/src/kernel M=/tmp/mlx5 ➜ mlx5 modinfo /tmp/mlx5/mlx5_ib.ko filename: /tmp/mlx5/mlx5_ib.ko <...> vermagic: 5.6.0+ SMP mod_unload modversions [1] https://lore.kernel.org/lkml/20200411155623.GA22175@zn.tnicReported-by:
Borislav Petkov <bp@suse.de> Acked-by:
Jessica Yu <jeyu@kernel.org> Co-developed-by:
Masahiro Yamada <masahiroy@kernel.org> Signed-off-by:
Leon Romanovsky <leonro@mellanox.com> Signed-off-by:
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Leon Romanovsky authored
Change nfp driver to use globally defined kernel version. Reported-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
Simon Horman <simon.horman@netronome.com> Signed-off-by:
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Leon Romanovsky authored
Use globally defined kernel version instead of custom driver variant. Reported-by:
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Leon Romanovsky authored
Get rid of linux/vermagic.h includes, so that MODULE_ARCH_VERMAGIC from the arch header arch/x86/include/asm/module.h won't be redefined. In file included from ./include/linux/module.h:30, from drivers/net/ethernet/3com/3c515.c:56: ./arch/x86/include/asm/module.h:73: warning: "MODULE_ARCH_VERMAGIC" redefined 73 | # define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY | In file included from drivers/net/ethernet/3com/3c515.c:25: ./include/linux/vermagic.h:28: note: this is the location of the previous definition 28 | #define MODULE_ARCH_VERMAGIC "" | Fixes: 6bba2e89 ("net/3com: Delete driver and module versions from 3com drivers") Co-developed-by:
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- 20 Apr, 2020 21 commits
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Colin Ian King authored
The variable rc is being assigned with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by:Colin Ian King <colin.king@canonical.com> Signed-off-by:
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David S. Miller authored
Andy Shevchenko says: ==================== net: bcmgenet: Clean up after ACPI enablement ACPI enablement series had missed some clean ups that would have been done at the same time. Here are these bits. In v2: - return dev_dbg() calls to avoid spamming logs when probe is deferred (Florian) - added Ack (Florian) - combined two, earlier sent, series together - added couple more patches ==================== Signed-off-by: -
Andy Shevchenko authored
No need to have parentheses around plain pointer variable or negation operator. Drop them for good. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
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Andy Shevchenko authored
It's convenient to use get_unligned_beXX() and put_unaligned_beXX() helpers to get or set MAC instead of open-coded variants. Signed-off-by:
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Andy Shevchenko authored
Conversion to devm_clk_get_optional() makes it explicit that clocks are optional. This change allows to handle deferred probe in case clocks are defined, but not yet probed. Due to above changes bail out in error case. While here, check potential error when enable main clock. Signed-off-by:
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Andy Shevchenko authored
There is nothing which needs a set of OF headers, followed by redundant OF node ID check. Drop them for good. Signed-off-by:
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Andy Shevchenko authored
When compiled with CONFIG_ACPI=n, ACPI_PTR() will be no-op, and thus genet_acpi_match table defined, but not used. Compiler is not happy about such data. Drop ACPI_PTR() for good. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linuxDavid S. Miller authored
Saeed Mahameed says: ==================== mlx5-updates-2020-04-20 This series includes misc updates and clean ups to mlx5 driver: 1) improve some comments from Hu Haowen. 2) Handles errors of netif_set_real_num_{tx,rx}_queues, from Maxim 3) IPsec and FPGA related code cleanup to prepare for ASIC devices IPsec offloads, from Raed 4) Allow partial mask for tunnel options, from Roi. ==================== Signed-off-by: -
Heiner Kallweit authored
A barrier is needed here to ensure that rtl_tx sees the descriptor changes (DescOwn set) before the updated tp->cur_tx value. Else it may wrongly assume that the transfer has been finished already. For this purpose smp_wmb() is sufficient. No separate barrier is needed for ordering the descriptor changes with the MMIO doorbell write. The needed barrier is included in the non-relaxed writel() used by rtl8169_doorbell(). Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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Hu Haowen authored
Replaced "its" with "it's". Signed-off-by:
Hu Haowen <xianfengting221@163.com> Signed-off-by:
Saeed Mahameed <saeedm@mellanox.com>
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Parav Pandit authored
Embedded CPU bit doesn't change with PCI resume/suspend. Hence read it only once while probing the PCI device. Signed-off-by:
Parav Pandit <parav@mellanox.com> Reviewed-by:
Bodong Wang <bodong@mellanox.com> Signed-off-by:
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Maxim Mikityanskiy authored
netif_set_real_num_tx_queues and netif_set_real_num_rx_queues may fail. Now that mlx5e supports handling errors in the preactivate hook, this commit leverages that functionality to handle errors from those functions and roll back all changes on failure. Signed-off-by:
Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by:
Tariq Toukan <tariqt@mellanox.com> Signed-off-by:
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Roi Dayan authored
We use mapping to save and restore the tunnel options. Save also the tunnel options mask. Signed-off-by:
Roi Dayan <roid@mellanox.com> Reviewed-by:
Paul Blakey <paulb@mellanox.com> Signed-off-by:
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Tariq Toukan authored
In notify HW (ring doorbell) flow, we set the bit to request a completion on the TX descriptor. When doing so, we should not unset other bits in the same byte. Currently, this does not fix a real issue, as we still don't have a flow where both MLX5_WQE_CTRL_CQ_UPDATE and any adjacent bit are set together. Fixes: 542578c6 ("net/mlx5e: Move helper functions to a new txrx datapath header") Fixes: 864b2d71 ("net/mlx5e: Generalize tx helper functions for different SQ types") Signed-off-by:
Aya Levin <ayal@mellanox.com> Signed-off-by:
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Raed Salem authored
Currently the SA handle is created and managed as part of the common code for different IPsec supporting HW, this handle is passed to HW to be used on Rx to identify the SA handle that was used to return the xfrm state to stack. The above implementation pose a limitation on managing this handle. Refactor by moving management of this field to the specific HW code. Downstream patches will introduce the Connect-X support for IPsec that will use this handle differently than current implementation. Signed-off-by:
Raed Salem <raeds@mellanox.com> Reviewed-by:
Boris Pismenny <borisp@mellanox.com> Reviewed-by:
Huy Nguyen <huyn@mellanox.com> Signed-off-by:
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Raed Salem authored
The current HW counters are supported only by Innova, split the ipsec stats group into two groups, one for HW and one for SW. And expose the HW counters to ethtool only if Innova HW is used for IPsec offload. Signed-off-by:
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Raed Salem authored
Currently the FPGA IPsec is the only hw implementation of the IPsec acceleration api, and so the mlx5_accel_esp_create_hw_context was wrongly made to suit this HW api, among other in its parameter list and some of its parameter endianness. This implementation might not be suitable for different HW. Refactor by group and pass all function arguments of mlx5_accel_esp_create_hw_context in common mlx5_accel_esp_xfrm_attrs struct field of mlx5_accel_esp_xfrm struct and correct the endianness according to the HW being called. Signed-off-by:
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Raed Salem authored
The cited commit relies on include <net/geneve.h> being included implicitly prior to include "en_accel/en_accel.h". This mandates that all files that needs to include en_accel.h to redantantly include net/geneve.h. Include net/geneve.h explicitly at "en_accel/en_accel.h" to avoid undesired constrain as above. Fixes: e3cfc7e6 ("net/mlx5e: TX, Add geneve tunnel stateless offload support") Signed-off-by:
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Raed Salem authored
Currently the IPsec acceleration capability function is also used at IPsec fpga capable device code. This could cause a future bug as the acceleration layer is agnostic to the device implementing its API. Fix by using the IPsec FPGA capability function instead of acceleration layer capability function in case of FPGA IPsec only related operations. Downstream patches will add support for Connect-X IPsec, this can avoid a future bug. Signed-off-by:
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Jason Yan authored
Fix the following coccicheck warning: drivers/net/ethernet/qlogic/qed/qed_dev.c:4395:2-34: WARNING: Assignment of 0/1 to bool variable drivers/net/ethernet/qlogic/qed/qed_dev.c:1975:2-34: WARNING: Assignment of 0/1 to bool variable Signed-off-by:
Jason Yan <yanaijie@huawei.com> Acked-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by:
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David S. Miller authored
Huazhong Tan says: ==================== net: hns3: misc updates for -next This patchset includes some misc updates for the HNS3 ethernet driver. [patch 1&2] separates two bloated function. [patch 3-5] removes some redundant code. [patch 6-7] cleans up some coding style issues. [patch 8-10] adds some debugging information. Change log: V1->V2: removes an unnecessary initialization in [patch 1] which suggested by David Miller. modified some print format issue and commit log in [patch 8]. ==================== Signed-off-by:
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