- 25 Feb, 2010 3 commits
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Russell King authored
Conflicts: arch/arm/Kconfig
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Russell King authored
Conflicts: arch/arm/Kconfig arch/arm/mach-ux500/include/mach/debug-macro.S
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Russell King authored
Merge branches 'at91', 'cache', 'cup', 'ep93xx', 'ixp4xx', 'nuc', 'pending-dma-streaming', 'u300' and 'umc' into devel
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- 24 Feb, 2010 5 commits
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Linus Walleij authored
The clk_round_rate() functions in the U300 clocking will always select the lowest clocking frequency due to inverted rounding comparisons. Fix this. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Roel Kluin authored
The parentheses appear misplaced. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hartley Sweeten authored
The timer defines are only used in core.c. Move them so they will not be globaly exposed. While here, add additional defines to document the magic numbers used in the registers. Also, add some comments for clarification. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hartley Sweeten authored
The GPIO support in core.c handles the interrupt support for GPIO ports A, B, and F. The gpiolib implementation in gpio.c needs to access the function ep93xx_gpio_int_mask when a gpio pin is made an output and ep93xx_gpio_update_int_params in order to update the registers. Moving this support from core.c to gpio.c allows making the two functions static. It also keeps all the GPIO handling together in one file. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hartley Sweeten authored
Patch 5879/1: ep93xx: define magic numbers for pll1 and pll2 broke the ep93xx build due to one missing rename of EP93XX_SYSCON_CLOCK_SET2. The correct name should be EP93XX_SYSCON_CLKSET2. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 21 Feb, 2010 3 commits
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wanzongshun authored
NUC900 add gpio virtual memory map Signed-off-by: Wang Qiang <rurality.linux@gmail.com> Signed-off-by: Wang Zongshun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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wanzongshun authored
Enable timer0 to time4 clock support for nuc910 Signed-off-by: Wang Qiang <rurality.linux@gmail.com> Signed-off-by: Wang Zongshun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
This removes the custom DBG macro in favor of the in-kernel dev_dbg() macro. Probably a leftover from a time when dev_dbg() didn't yet exist. Also remove a printk() in favor of dev_err(). Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 20 Feb, 2010 2 commits
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Russell King authored
update_mmu_cache() is called with the page table for the faulted-in page still mapped. We need to modify the PTE for this page to ensure coherency with other shared mappings when multiple shared mappings exist within a MM. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
On VIVT ARM, when we have multiple shared mappings of the same file in the same MM, we need to ensure that we have coherency across all copies. We do this via make_coherent() by making the pages uncacheable. This used to work fine, until we allowed highmem with highpte - we now have a page table which is mapped as required, and is not available for modification via update_mmu_cache(). Ralf Beache suggested getting rid of the PTE value passed to update_mmu_cache(): On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables to construct a pointer to the pte again. Passing a pte_t * is much more elegant. Maybe we might even replace the pte argument with the pte_t? Ben Herrenschmidt would also like the pte pointer for PowerPC: Passing the ptep in there is exactly what I want. I want that -instead- of the PTE value, because I have issue on some ppc cases, for I$/D$ coherency, where set_pte_at() may decide to mask out the _PAGE_EXEC. So, pass in the mapped page table pointer into update_mmu_cache(), and remove the PTE value, updating all implementations and call sites to suit. Includes a fix from Stephen Rothwell: sparc: fix fallout from update_mmu_cache API change Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 18 Feb, 2010 1 commit
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Hartley Sweeten authored
Currently <asm/mach/irq.h> is included by core.c. This header includes <linux/irq.h> and defines a number of internal functions. These internal functions are not needed by this file. Change the include so that we just get what is needed. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 15 Feb, 2010 8 commits
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Ryan Mallon authored
Add support for Bluewater Systems EP9315 based Snapper CL15 single board computer module. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Acked-by: Hartley Sweeten <hartleys@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
ARMv6 and ARMv7 CPUs can perform speculative prefetching, which makes DMA cache coherency handling slightly more interesting. Rather than being able to rely upon the CPU not accessing the DMA buffer until DMA has completed, we now must expect that the cache could be loaded with possibly stale data from the DMA buffer. Where DMA involves data being transferred to the device, we clean the cache before handing it over for DMA, otherwise we invalidate the buffer to get rid of potential writebacks. On DMA Completion, if data was transferred from the device, we invalidate the buffer to get rid of any stale speculative prefetches. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Russell King authored
These are now unused, and so can be removed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Russell King authored
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Russell King authored
dma_cache_maint_contiguous is now simple enough to live inside dma_cache_maint_page, so move it there. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Russell King authored
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Russell King authored
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Russell King authored
The DMA API has the notion of buffer ownership; make it explicit in the ARM implementation of this API. This gives us a set of hooks to allow us to deal with CPU cache issues arising from non-cache coherent DMA. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-By: Jamie Iles <jamie@jamieiles.com>
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- 14 Feb, 2010 2 commits
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Linus Walleij authored
This fixes a few bugs in the DMA configuration for the COH 901 318 DMA engine used in U300. It also removes the directional parameter for each channel: separate DMA engine patches (submitted to the DMA engine maintainer) switches that mechanism over to using dynamic configuration of this, to handle bidirectional DMA channels. Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Rabin Vincent authored
Add a static mapping for the UART and correct its virtual address in debug-macro.S, to make DEBUG_LL/earlyprintk work. Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 12 Feb, 2010 6 commits
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Tony Lindgren authored
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jean PIHET authored
Adds the Performance Events support for ARMv7 processor, using the PMNC unit in HW. Supports the following: - Cortex-A8 and Cortex-A9 processors, - dynamic detection of the number of available counters, based on the PMCR value, - runtime detection of the CPU arch (v6 or v7) and model (Cortex-A8 or Cortex-A9) Tested on OMAP3 (Cortex-A8) only. Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jamie Iles authored
This patch implements support for ARMv6 performance counters in the Linux performance events subsystem. ARMv6 architectures that have the performance counters should enable HW_PERF_EVENTS to get hardware performance events support in addition to the software events. Note: only ARM Ltd ARM cores are supported. This implementation also provides an ARM PMU abstraction layer to allow ARMv7 and others to be supported in the future by adding new a 'struct arm_pmu'. Cc: Jean Pihet <jpihet@mvista.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jamie Iles authored
The perf events subsystem allows counting of both hardware and software events. This patch implements the bare minimum for software performance events. Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jamie Iles authored
Make sure that we have access to the performance counters and that they aren't being used by perf events or anything else. Cc: Will Deacon <will.deacon@arm.com> Cc: Jean Pihet <jpihet@mvista.com> Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jamie Iles authored
To add support for perf events and to allow the hardware counters to be shared with oprofile, we need a way to reserve access to the pmu (performance monitor unit). Platforms with PMU interrupts should register the interrupts in arch/arm/kernel/pmu.c Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 04 Feb, 2010 5 commits
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Russell King authored
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
This extends the existing PrimeCell PL031 driver with support for the ST Microelectronics and ST-Ericsson derivatives, in a first and second version as used on the Nomadik and U8500 platforms. It also rids the old ioctl() alarm on/off functions in favor of the new .alarm_irq_enable field of the RTC class ops. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Srinidhi Kasagar authored
This adds platform configurations to support four i2c controllers found on early MOP500 platform This depends on the patch 5908/1 for build to succeed. Signed-off-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Srinidhi Kasagar authored
This adds the platform specific i2c configuration data structures to setup the nomadik/ux500 i2c block. Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
This configures the PL031 RTC resources for ux500. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 27 Jan, 2010 5 commits
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Mikael Pettersson authored
Add a better sched_clock() to the ixp4xx platform, implemented via its clocksource support. This is based on the sched_clock() I implemented for the IOP platform. Tested on a ds101 ixp420 machine. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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wanzongshun authored
The previous nuc932 support patches have been discarded by me and because it belongs to another SoCs series named nuc93x,at present, which included nuc931 and nuc932, I think it is better to create a new mach-nuc93x,So I made the patch,and request your advice.Thanks! Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
In the U300 some hardware bug makes the status flag not come up signalling a successful write (or anything else, like an error, for that matter) on write requests. This little quirk makes the writes work on U300. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
This changes the bus name of the U300 watchdog from just "wdog" to "coh901327_wdog" which is used to match the corresponding driver. This makes the watchdog probe properly. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Linus Walleij authored
Added logic to cap TX FIFO fill size based on current free RX FIFO entries instead of TX status flags. This is to prevent an issue with RX FIFO overflows. Signed-off-by: Kevin Wells <kevin.wells@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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