- 09 Jul, 2012 11 commits
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R Sricharan authored
Move the irq_match arrays and the irq init functions of OMAP 2,3 and 4 based boards out of board-generic.c file and also rename the irq init function to match the interrupt controller present in the SOCs. This is a preparatory patch to add the OMAP5 evm board's irq init support with device tree. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Santosh Shilimkar authored
Add OMAP5 SMP boot support using OMAP4 SMP code. The relevant code paths are runtime checked using cpu id Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Santosh Shilimkar authored
OMAP4 and OMAP5 share same WakeupGen IP with below few udpates on OMAP5. - Additional 32 interrupt support is added w.r.t OMAP4 design. - The AUX CORE boot registers are now made accessible from non-secure SW. - SAR offset are changed and PTMSYNC* registers are removed from SAR. Patch updates the WakeupGen code accordingly. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
The l3 interconnect ip is same for OMAP4 and OMAP5. So reuse the l3 error handler error code for OMAP5 as well. Also a few targets has been newly added for OMAP5. So updating the driver for that here. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
GPMC module is the same as in OMAP4. Just update the base address and irq number. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
Adding the Initialisaton for clocksource and clockevent device on OMAP5 Socs. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and with an integrated L2 cache controller. OMAP5432 is another variant of OMAP5430, with a memory controller supporting DDR3 and SATA. Patch includes: - The machine specific headers and sources updates. - Platform header updates. - Minimum initialisation support for serial. - IO table init Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
Adding the OMAP5 ES1.0, 2.0 and OMAP5432 cpu revision detection support. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
OMAP socs has a legacy and a highlander version of the 32k sync counter IP. The register offsets vary between the highlander and the legacy scheme. So use the 'SCHEME' bits(30-31) of the revision register to distinguish between the two versions and choose the CR register offset accordingly. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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R Sricharan authored
omap_secure_ram_reserve_memblock is stubbed for OMAP1,2 only builds using a ifdef check. But this results in adding CONFIG_ARCH_OMAPxx checks for future socs that use the real function. So move this to common.c file and call it __weak. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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Santosh Shilimkar authored
OMAP4 only build breaks with below error arch/arm/mach-omap2/sdrc.c:135: error: redefinition of 'omap2_sdrc_init' arch/arm/plat-omap/include/plat/sdrc.h:130: note: previous definition of 'omap2_sdrc_init' was here make[1]: *** [arch/arm/mach-omap2/sdrc.o] Error 1 Fix the same by using newly introduced CONFIG_SOC_HAS_OMAP2_SDRC marco. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 06 Jul, 2012 2 commits
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Tarun Kanti DebBarma authored
With omap_hwmod_get_main_clk() now available, this can be passed to clk_get() to extract the fclk and thus avoid construction of fclk name. Corrected the timer fck name mis-match between clock44xx_data.c and omap_hwmod_44xx_data.c. For other platforms this is already taken care. Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Commit ac5b0ea3 (Merge tag 'omap-devel-f-for-3.6'...) had a merge conflict that somehow got incorrecly resolved in a lossy way for commit bed9d1bb (ARM: OMAP2+: hwmod: add omap_hwmod_get_main_clk() API). Fix the issue by applying the missing pieces. Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 05 Jul, 2012 7 commits
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Vaibhav Hiremath authored
The function __omap2_set_globals() can be common across all platforms/architectures, even in case of omap4, internally it calls same set of functions as in __omap2_set_globals() function (except for sdrc). This patch adds new config flag SOC_HAS_OMAP2_SDRC to handle sdrc, so that we can reuse same function across omap2/3/4... Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vaibhav Hiremath authored
As per recent discussion on the linux-omap list, we are moving in the direction where, we will have only architecture, ARCH_OMAP2PLUS and all devices/platforms will be treated as a SoC underneath. So the first step in this direction is to adopt this change for all new devices getting in, converting cpu_is_am33xx/335x() ==> soc_is_am33xx/335x() Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vaibhav Hiremath authored
Initially, we decided to make am33xx family of device to fall under omap3 class (cpu_is_omap34xx() = true), since it carries Cortex-A8 core. But while adding complete baseport support (like, clock, power and hwmod) support, it is observed that, we are creating more and more problems by treating am33xx device as omap3 family, as nothing matches between them (except cortex-A8 mpu). So, after long discussion we have came to the conclusion that, we should not consider am33xx device as omap3 family, instead create separate class (SOC_AM33XX) under OMAP2PLUS. This means, for am33xx device, cpu_is_omap34xx() will return false, and only cpu_is_am33xx() will be true. Please refer to the link below, for mailing-list discussion on this - http://www.spinics.net/lists/linux-omap/msg69439.htmlSigned-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [tony@atomide.com: fixed typo, updated for soc_is changes] Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vaibhav Hiremath authored
In order to remove unnecessary idefs, move noncore and core dpll ops to dpll3xxx.c file (where it should have been already). The clkops (clkops_omap3_core_dpll_ops & clkops_omap3_noncore_dpll_ops) is used in clock data files, and dependency is already handled by Makefile rule. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vaibhav Hiremath authored
All OMAP2PLUS based devices, builds omap-device.o target; so just add one entry so that there is no need to patch this file for any future OMAP2+ devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tarun Kanti DebBarma authored
Replace the regular kzalloc and ioremap with the devm_ equivalent to simplify error handling. We don't need kree() any more in omap_dm_timer_remove(). Also added *dev* pointer to reference pdev->dev which makes the usage shorter in code. Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Merge tag 'omap-devel-f-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-part2 Miscellaneous OMAP clock, hwmod, clockdomain, and powerdomain patches for 3.6. Mostly small infrastructure improvements, and preparation for OMAP5 and AM33xx code. Conflicts: arch/arm/mach-omap2/omap_hwmod.c arch/arm/plat-omap/include/plat/omap_hwmod.h
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- 04 Jul, 2012 11 commits
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Paul Walmsley authored
Merge branches 'hwmod_am335x_support_3.6', 'clkdm_pwrdm_devel_a_3.6' and 'misc_devel_3.6' into omap_devel_f_3.6
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Kishon Vijay Abraham I authored
The DMADISABLE bit is a semi-automatic bit present in sysconfig register of some modules. When the DMA must perform read/write accesses, the DMADISABLE bit is cleared by the hardware. But when the DMA must stop for power management, software must set the DMADISABLE bit back to 1. In cases where the ROMCODE/BOOTLOADER uses dma, the hardware clears the DMADISABLE bit (but the romcode/bootloader might not set it back to 1). In order for the kernel to start in a clean state, it is necessary for the kernel to set DMADISABLE bit back to 1 (irrespective of whether it's been set to 1 in romcode or bootloader). During _reset of the (hwmod)device, the DMADISABLE bit is set so that it does not prevent idling of the system. (NOTE: having DMADISABLE to 0, prevents the system to idle) DMADISABLE bit is present in usbotgss module of omap5. Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [paul@pwsan.com: updated to apply; fixed checkpatch warnings] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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R Sricharan authored
Some prm and cm registers read/write and status functions are built only for some custom OMAP2+ builds and are stubbed in header files for other builds under ifdef statements. But this results in adding new CONFIG_ARCH_OMAPXXX checks when SOCs are added in the future. So move them to a common place for OMAP2+ and make them 'weak' implementations. This way no new ifdefs would be required in the future and also cleans up the existing code. Signed-off-by: R Sricharan <r.sricharan@ti.com> [paul@pwsan.com: unsplit quoted strings; moved PRM functions to mach-omap2/prm_common.c; resolved sparse warnings] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Tarun Kanti DebBarma authored
Add an API to get main clock name associated with a given @oh. This will avoid the need to construct fclk names during early initialization in order to get fclk handle using clk_get(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Vikram Pandita authored
If the dpll is already locked, code can be optimized to return much earlier than doing redundent set of lock mode and wait on idlest. Cc: Tony Lindgren <tony@atomide.com> Cc: Jon Hunter <jon-hunter@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Mike Turquette <mturquette@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Sakari Ailus authored
The register is used to configure the behaviour of the CSI-2 and CCP-2 receivers. This register is available only in OMAP3630. The original patch was submitted by Vimarsh Zutshi. Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Cc: Vimarsh Zutshi <vimarsh.zutshi@gmail.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Jon Hunter authored
The wake-up power domain is an alway-on power domain and so this power domain does not have a power state status (PM_PWSTST_xxx) register that indicates the current state. However, during the registering of the wake-up power domain the state of the domain is queried by calling pwrdm_read_pwrst(). This actually tries to read a register that does not exist and returns a value of 0 that indicates that the current state is OFF. The OFF state count of the wake-up power domain is then set to 1 and the current state to OFF. Both of which are incorrect. To fix this, if a power domain only supports the ON state, do not attempt to read the power state status register and simply return ON as the current power state. This is based upon Tony's current linux-omap master branch. Testing: - Boot tested on OMAP4460 panda. - Boot tested on OMAP3430 beagle and validated CORE RET still working (using Paul's 32k timer patch [1]). [1] http://marc.info/?l=linux-omap&m=134000053229888&w=2Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Kevin Hilman <khilman@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [paul@pwsan.com: edited commit message slightly] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Jon Hunter authored
For OMAP3+ devices, the clock domains (CLKDMs) support one or more of the following transition modes ... NO_SLEEP (0x0) - A clock domain sleep transition is never initiated, irrespective of the hardware conditions. SW_SLEEP (0x1) - A software-forced sleep transition. The transition is initiated when the associated hardware conditions are satisfied SW_WKUP (0x2) - A software-forced clock domain wake-up transition is initiated, irrespective of the hardware conditions. HW_AUTO (0x3) - Hardware-controlled automatic sleep and wake-up transition is initiated by the PRCM module when the associated hardware conditions are satisfied. For OMAP4 devices, SW_SLEEP is equivalent to HW_AUTO and NO_SLEEP is equivalent to SW_WKUP. The only difference between HW_AUTO and SW_SLEEP for OMAP4 devices is that the PRM_IRQSTATUS_MPU.TRANSITION_ST interrupt status is set in case of SW_SLEEP transition, and not set in case of HW_AUTO transition. For OMAP4 devices, all CLKDMs support HW_AUTO and therefore we can place the CLKDMs in the HW_AUTO state instead of the SW_SLEEP mode. Hence, we do not need to use the SW_SLEEP mode. With regard to NO_SLEEP and SW_WKUP it is preferred to use SW_WKUP mode if the CLKDM supports it and so use this mode instead of NO_SLEEP where possible. For a software perspective the above 4 modes are represented by the following flags to indicate what modes are supported by each of the CLKDMs. CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> SW_SLEEP CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP By eliminating the SW_SLEEP mode the the mapping of the flags for OMAP4 devices can becomes ... CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> HW_AUTO CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Reviewed-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Vaibhav Hiremath authored
In case of AM33XX device, XXX_RSTST register offset is not consistent across PRM modules/instances, PRM_XXX RSTST ========================= PRM_PER_MOD: 0x04 PRM_WKUP_MOD: 0x0C PRM_MPU_MOD: NA PRM_DEVICE_MOD: 0x08 This means, we need to pass on XXX_RSTST register offset information through omap_hwmod data, similar to XXX_RSTCTRL. Currently, this field is only applicable and used for AM33XX devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Vaibhav Hiremath authored
In case of AM33xx family of devices (like cpsw) have different sysc bit field offsets defined, sysc_type3: | 3 2 | 1 0 | | STDBYMODE | IDLEMODE | So introduce new sysc_type3 in omap_hwmod common data. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Tony Lindgren authored
Merge tags 'omap-cleanup-for-v3.6', 'omap-devel-dmtimer-for-v3.6' and 'omap-devel-am33xx-for-v3.6' into devel-am33xx-part2
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- 30 Jun, 2012 9 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "Another week, another batch of fixes. All are small, contained, targeted fixes for explicit problems -- mostly build and boot failures across i.MX, OMAP, Renesas/Shmobile and Samsung." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: imx6q: fix suspend regression caused by common clk migration ARM: OMAP4470: Fix OMAP4470 boot failure ARM: EXYNOS: Fix EXYNOS_DEV_DMA Kconfig entry ARM: OMAP2+: nand: fix build error when CONFIG_MTD_ONENAND_OMAP2=n ARM: shmobile: r8a7779: Route all interrupts to ARM ARM: shmobile: kzm9d: use late init machine hook ARM: shmobile: kzm9g: use late init machine hook ARM: mach-shmobile: armadillo800eva: Use late init machine hook ARM: SAMSUNG: Fix for S3C2412 EBI memory mapping ARM: mach-shmobile: add missing GPIO IRQ configuration on mackerel ARM: mach-shmobile: Fix build when SMP is enabled and EMEV2 is not enabled ARM: shmobile: sh7372: bugfix: chclr_offset base ARM: shmobile: sh73a0: bugfix: SY-DMAC number ARM: SAMSUNG: Should check for IS_ERR(clk) instead of NULL
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Randy Dunlap authored
Fix kernel-doc warnings in printk.c: use correct parameter name. Warning(kernel/printk.c:2429): No description found for parameter 'buf' Warning(kernel/printk.c:2429): Excess function parameter 'line' description in 'kmsg_dump_get_buffer' Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Randy Dunlap authored
Fix kernel-doc warning. This struct member was removed in commit 87568264 ("irq: Remove irq_chip->release()") so remove its associated kernel-doc entry also. Warning(include/linux/irq.h:338): Excess struct/union/enum/typedef member 'release' description in 'irq_chip' Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Cc: Richard Weinberger <richard@nod.at> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Olof Johansson authored
Merge branch 'v3.5-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes * 'v3.5-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Fix EXYNOS_DEV_DMA Kconfig entry ARM: SAMSUNG: Fix for S3C2412 EBI memory mapping ARM: SAMSUNG: Should check for IS_ERR(clk) instead of NULL
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Shawn Guo authored
When moving to common clk framework, the imx6q clks rom and mmdc_ch1_axi get different on/off states than old clk driver, which breaks suspend function. There might be a better way to manage these clocks, but let's takes the old clk driver approach to fix the regression first. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'omap-fixes-for-v3.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes From Tony Lindgren: "Here's one more regression fix that I missed earlier, and a trivial fix to get omap4470 booting." * tag 'omap-fixes-for-v3.5-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP4470: Fix OMAP4470 boot failure ARM: OMAP2+: nand: fix build error when CONFIG_MTD_ONENAND_OMAP2=n
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git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linuxLinus Torvalds authored
Pull ACPI & Power Management patches from Len Brown. * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: acpi_pad: fix power_saving thread deadlock ACPI video: Still use ACPI backlight control if _DOS doesn't exist ACPI, APEI, Avoid too much error reporting in runtime ACPI: Add a quirk for "AMILO PRO V2030" to ignore the timer overriding ACPI: Remove one board specific WARN when ignoring timer overriding ACPI: Make acpi_skip_timer_override cover all source_irq==0 cases ACPI, x86: fix Dell M6600 ACPI reboot regression via DMI ACPI sysfs.c strlen fix
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-coreLinus Torvalds authored
Pull driver Core fixes from Greg Kroah-Hartman: "Here is a number of printk() fixes, specifically a few reported by the crazy blog program that ships in SUSE releases (that's "boot log" and not "web log", it predates the general "blog" terminology by many years), and the restoration of the continuation line functionality reported by Stephen and others. Yes, the changes seem a bit big this late in the cycle, but I've been beating on them for a while now, and Stephen has even optimized it a bit, so all looks good to me. The other change in here is a Documentation update for the stable kernel rules describing how some distro patches should be backported, to hopefully drive a bit more response from the distros to the stable kernel releases. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>" * tag 'driver-core-3.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: printk: Optimize if statement logic where newline exists printk: flush continuation lines immediately to console syslog: fill buffer with more than a single message for SYSLOG_ACTION_READ Revert "printk: return -EINVAL if the message len is bigger than the buf size" printk: fix regression in SYSLOG_ACTION_CLEAR stable: Allow merging of backports for serious user-visible performance issues
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