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- 22 Jan, 2004 2 commits
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Mikael Pettersson authored
Add back the old i82489DX bits to use timer scaling for the old non-integrated APIC setup. It's possible these bits don't need to be set on i82489DXs, but not having this HW for testing I elected to maintain the old behaviour on these old machines.
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Linus Torvalds authored
We used to write fields that were marked RESERVED and that are apparently some old stale timer base. Stop doing that. Verified with Mikael Pettersson, and confirmed to fix ACPI boot-time lockups for a few people.
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- 15 Oct, 2003 1 commit
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Linus Torvalds authored
Don't assume the APIC is at the power-on default address, since the BIOS can have moved it somewhere else without really ever telling us (ie we have an MP table or ACPI that fixes it for us, but those are not always available)
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- 31 Aug, 2003 1 commit
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Andrew Morton authored
From: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com> All the changes required to use HPET in place of PIT as the kernel base-timer at IRQ 0.
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- 19 Aug, 2003 1 commit
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Andrew Morton authored
From: mikep@csd.uu.se There has been a number of problem reports about local APIC interacting badly with ACPI on P4s due to the P4 local APIC force-enable change in 2.5.74, This patch reverts the 2.5.74 patch, so if the BIOS disables the local APIC on a P4, we don't enable it by default any more. The rescue the situation for those P4 systems where the local APIC _can_ be enabled safely, I've added two kernel parameters that can be used to override broken BIOSen: - "nolapic" prevents the kernel from enabling or using the local APIC. This is stronger than listing a machine in the DMI scan blacklist, since it also works for machines that boot with the local APIC already enabled. - "lapic" tells the kernel to force-enable the P4 local APIC if the BIOS disabled it. I haven't changed the logic for P6/K7 family processors, so we still force-enable those unless "nolapic" was passed to the kernel. The patch also includes a cleanup: the dont_use_local_apic_timer flag variable is not set any more since 2.5.74, so it's removed.
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- 18 Aug, 2003 1 commit
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Andrew Morton authored
From: William Lee Irwin III <wli@holomorphy.com> Contributions from: Jan Dittmer <jdittmer@sfhq.hn.org> Arnd Bergmann <arnd@arndb.de> "Bryan O'Sullivan" <bos@serpentine.com> "David S. Miller" <davem@redhat.com> Badari Pulavarty <pbadari@us.ibm.com> "Martin J. Bligh" <mbligh@aracnet.com> Zwane Mwaikambo <zwane@linuxpower.ca> It has ben tested on x86, sparc64, x86_64, ia64 (I think), ppc and ppc64. cpumask_t enables systems with NR_CPUS > BITS_PER_LONG to utilize all their cpus by creating an abstract data type dedicated to representing cpu bitmasks, similar to fd sets from userspace, and sweeping the appropriate code to update callers to the access API. The fd set-like structure is according to Linus' own suggestion; the macro calling convention to ambiguate representations with minimal code impact is my own invention. Specifically, a new set of inline functions for manipulating arbitrary-width bitmaps is introduced with a relatively simple implementation, in tandem with a new data type representing bitmaps of width NR_CPUS, cpumask_t, whose accessor functions are defined in terms of the bitmap manipulation inlines. This bitmap ADT found an additional use in i386 arch code handling sparse physical APIC ID's, which was convenient to use in this case as the accounting structure was required to be wider to accommodate the physids consumed by larger numbers of cpus. For the sake of simplicity and low code impact, these cpu bitmasks are passed primarily by value; however, an additional set of accessors along with an auxiliary data type with const call-by-reference semantics is provided to address performance concerns raised in connection with very large systems, such as SGI's larger models, where copying and call-by-value overhead would be prohibitive. Few (if any) users of the call-by-reference API are immediately introduced. Also, in order to avoid calling convention overhead on architectures where structures are required to be passed by value, NR_CPUS <= BITS_PER_LONG is special-cased so that cpumask_t falls back to an unsigned long and the accessors perform the usual bit twiddling on unsigned longs as opposed to arrays thereof. Audits were done with the structure overhead in-place, restoring this special-casing only afterward so as to ensure a more complete API conversion while undergoing the majority of its end-user exposure in -mm. More -mm's were shipped after its restoration to be sure that was tested, too. The immediate users of this functionality are Sun sparc64 systems, SGI mips64 and ia64 systems, and IBM ia32, ppc64, and s390 systems. Of these, only the ppc64 machines needing the functionality have yet to be released; all others have had systems requiring it for full functionality for at least 6 months, and in some cases, since the initial Linux port to the affected architecture.
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- 14 Aug, 2003 1 commit
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Andrew Morton authored
From: Zwane Mwaikambo <zwane@arm.linux.org.uk> The P4 thermal interrupt vector was only getting set on SMP builds.
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- 13 Aug, 2003 1 commit
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Mikael Pettersson authored
This disables the local APIC before reboot. This fixes BIOS reboot problems reported by a few people. disable_local_APIC() now checks if detect_init_APIC() enabled the local APIC via the APIC_BASE MSR, and if so it now disables APIC_BASE. Previously we would leave APIC_BASE enabled, and that made some BIOSen unhappy. The SMP reboot code calls disable_local_APIC(). On SMP HW there is no change since detect_init_APIC() isn't called and APIC_BASE isn't enabled by us. An SMP kernel on UP HW behaves just like an UP_APIC kernel, so it disables APIC_BASE if we enabled it at boot. The UP_APIC disable-before-suspend code is simplified since the existing code to disable APIC_BASE is moved into disable_local_APIC(). (Felix Kühling originally reported the BIOS reboot problem. This is a fixed-up version of his preliminary patch.)
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- 24 Jun, 2003 1 commit
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Mikael Pettersson authored
The current local APIC code refuses to enable the local APIC on a P4 if the BIOS booted us with the local APIC disabled. This patch removes this unnecessary restriction. Please apply. Most P4 machines do boot with the local APIC enabled, but Keith Owens reported that the P4 based Compaq Evo N800v disables the local APIC, even though the machine actually works if Linux enables it. It is possible that some P4 machines with broken BIOSen were saved by our refusal to enable the local APIC. We can handle them via the DMI blacklist rules instead.
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- 14 Jun, 2003 2 commits
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Andrew Morton authored
From: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Include ES7000 specific code for es7000 subarch.
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Mikael Pettersson authored
This patch cleans up a few leftovers after Mochel's recent driver model changes. Tested. Please apply. - arch/i386/kernel/apic.c: <linux/module.h> no longer needed - include/asm-i386/apic.h: device_lapic no longer exported
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- 10 Jun, 2003 2 commits
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Patrick Mochel authored
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Patrick Mochel authored
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- 26 May, 2003 1 commit
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Rusty Russell authored
From: Pavel Machek <pavel@ucw.cz>
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- 25 May, 2003 1 commit
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Andrew Morton authored
- Add an explanation for clearing the focus bit on P4 (zwane) - __d_path kerneldoc fix (John Levon) - generic-hdlc documentation fix (Krzysztof Halasa <khc@pm.waw.pl>) - cmdline_read_proc cleanup (Oleg Drokin) - remove a couple of unused vars from drivers/ide/pci/hpt366.c - sound/core/sgbuf.c needs mm.h at least on alpha, for mem_map and other page stuff. (Ivan Kokshaysky <ink@jurassic.park.msu.ru>) - Don't use "u32 long" in cs46xx.c (Kevin Puetz <puetzk@puetzk.org>) - fs/nfs/nfs4xdr.c warning fix: all the `goto out;' statements are commented away, so comment away the label too. - net/ipv6/af_inet6.c: remove unused var - drivers/media/video/bttv-cards.c: jiffies are unsigned long - drivers/media/video/saa7134/saa7134-cards.c: unused var - Fix Documentation/Changes comment wrt sparc compiler version - drivers/pnp/quirks.c needs slab.h for kfree(). (Daniele Bellucci <bellucda@tiscali.it>)
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- 17 Apr, 2003 1 commit
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Alan Cox authored
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- 02 Apr, 2003 1 commit
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John Levon authored
This is Mikael's version of Pavel's patch, fixed to let CONFIG_PM=n compile. It works for me on my 2-way using oprofile.
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- 26 Feb, 2003 1 commit
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Mikael Pettersson authored
1) apic_write_around(APIC_ID, boot_cpu_physical_apicid) places the APIC value in the lower 8 bits of APIC_ID, when it should be in the upper 8. As as result, it effectively forces the APIC id to always be 0 for the boot CPU, which is fatal on SMP AMD boxes. Fix: don't do the write at all. The APIC_ID value should be right already. 2) phys_cpu_present_map = 1 means we always set bit 0, but later on in setup_local_APIC() we do if (!clustered_apic_mode && !test_bit(GET_APIC_ID(apic_read(APIC_ID)), &phys_cpu_present_map)) BUG(); and the bug is triggered if the APIC_ID is not zero. Fix: initialize 'phys_cpu_present_map' correctly.
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- 18 Feb, 2003 2 commits
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Andrew Morton authored
Make the prof_counter and prof_old_counter arrays use per-cpu data, and give them static scope. Also fix a signedness bug in the voyager implementation (from James)
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Andrew Morton authored
Patch from Andrey Panin <pazke@orbita1.ru> I'm here again, starting another hopeless attempt to submmit visws subarch support for 2.5. This series of patches was tested by me and brave people from linux-visws-devel mailing list and our beloved workstations seem to work well under 2.5.xx. This patch moves enable_NMI_through_LVT0() function from io_apic.c to apic.c to allow SMP kernel build without io_apic.c included.
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- 10 Feb, 2003 1 commit
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Andrew Morton authored
Patch from Ravikiran G Thirumalai <kiran@in.ibm.com> Converts the ia32 kernel profiler to use use the percpu area infrastructure.
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- 28 Dec, 2002 1 commit
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Andi Kleen authored
Add support for the AMD Opteron/Athlon64/Hammer/K8 line to the 32bit kernel. Mostly just reusing Athlon code with some changed CPU model checks. The Hammer has model number 15. I also fixed rmb()/mb() to use the SSE2 mfence/lfence instructions on P4 and Hammer. They are somewhat cheaper than the locked cycle.
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- 23 Dec, 2002 2 commits
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Martin J. Bligh authored
Code originally by James Cleverdon. This abstracts out some sections that were switched by clustered_apic_mode into the following functions: - apic_id_registered() - init_apic_ldr() - multi_timer_check() Changes the return check in balance_irq from testing clustered_apic_mode to testing "no_balance_irq" to be more general. The removal of: entry.dest.logical.logical_dest = TARGET_CPUS; is because it's a duplicate (we do it twice in the same function for no reason).
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Martin J. Bligh authored
Patch from John Stultz. This reorganises the subarch files to put all the headers under the include dir, instead of mixing them up with the C files. The only interesting part is the top section where he makes it fall back from the subarch dir to the default dir if there's no .h file under the subarch dir. This means we can create multiple subarches without copying every single file that any subarch wants into all the directories. And is much tidier, IMHO.
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- 15 Oct, 2002 3 commits
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Martin J. Bligh authored
This puts the DFR (desination format register) value into a #define, and calculates the LDR (logical desitination register) correctly dependant on platform. Similarly for TARGET_CPUS.
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Martin J. Bligh authored
This just adds the config option for summit, and it's Config.help entry, puts the hooks for the new mach_apic.h subarch file into the right places, and creates empty shells of the header files.
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John Levon authored
This implements a simple hook into the profiling timer for x86 so that non-perfctr machines can still use oprofile. This has proven useful for laptops and the like. It also reduces header dependencies a bit by centralising readprofile code
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- 08 Oct, 2002 3 commits
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Dave Jones authored
From Zwane Mwaikambo, this diff makes sure we don't poke reserved bits on the P4.
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Dave Jones authored
This patch from Ravikiran G Thirumalai removes cacheline bouncing of apic_timer_irqs
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Dave Jones authored
From 2.4
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- 03 Oct, 2002 1 commit
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Ingo Molnar authored
This does a number of timer subsystem enhancements: - simplified timer initialization, now it's the cheapest possible thing: static inline void init_timer(struct timer_list * timer) { timer->base = NULL; } since the timer functions already did a !timer->base check this did not have any effect on their fastpath. - the rule from now on is that timer->base is set upon activation of the timer, and cleared upon deactivation. This also made it possible to: - reorganize all the timer handling code to not assume anything about timer->entry.next and timer->entry.prev - this also removed lots of unnecessery cleaning of these fields. Removed lots of unnecessary list operations from the fastpath. - simplified del_timer_sync(): it now uses del_timer() plus some simple synchronization code. Note that this also fixes a bug: if mod_timer (or add_timer) moves a currently executing timer to another CPU's timer vector, then del_timer_sync() does not synchronize with the handler properly. - bugfix: moved run_local_timers() from scheduler_tick() into update_process_times() .. scheduler_tick() might be called from the fork code which will not quite have the intended effect ... - removed the APIC-timer-IRQ shifting done on SMP, Dipankar Sarma's testing shows no negative effects. - cleaned up include/linux/timer.h: - removed the timer_t typedef, and fixes up kernel/workqueue.c to use the 'struct timer_list' name instead. - removed unnecessery includes - renamed the 'list' field to 'entry' (it's an entry not a list head) - exchanged the 'function' and 'data' fields. This, besides being more logical, also unearthed the last few remaining places that initialized timers by assuming some given field ordering, the patch also fixes these places. (fs/xfs/pagebuf/page_buf.c, net/core/profile.c and net/ipv4/inetpeer.c) - removed the defunct sync_timers(), timer_enter() and timer_exit() prototypes. - added docbook-style comments. - other kernel/timer.c changes: - base->running_timer does not have to be volatile ... - added consistent comments to all the important functions. - made the sync-waiting in del_timer_sync preempt- and lowpower- friendly. i've compiled, booted & tested the patched kernel on x86 UP and SMP. I have tried moderately high networking load as well, to make sure the timer changes are correct - they appear to be.
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- 01 Aug, 2002 1 commit
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Christoph Hellwig authored
They are harmless mostly and can happen in normal use. (from -rh)
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- 26 Jul, 2002 1 commit
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Rusty Russell authored
This modifies the i386 boot sequence to "plug in" CPUs one at a time. This is the minimal change to make it work (the CPUs are brought up as normal during the "smp_prepare_cpus()" probe phase).
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- 24 Jul, 2002 1 commit
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Ingo Molnar authored
- init thread needs to have preempt_count of 1 until sched_init(). (William Lee Irwin III) - clean up the irq-mask macros. (Linus) - add barrier() to irq_enter() and irq_exit(). (based on Oleg Nesterov's comment.) - move the irqs-off check into preempt_schedule() and remove CONFIG_DEBUG_IRQ_SCHEDULE. - remove spin_unlock_no_resched() and comment the affected places more agressively. - slab.c needs to spin_unlock_no_resched(), instead of spin_unlock(). (It also has to check for preemption in the right spot.) This should fix the memory corruption. - irq_exit() needs to run softirqs if interrupts not active - in the previous patch it ran them when preempt_count() was 0, which is incorrect. - spinlock macros are updated to enable preemption after enabling interrupts. Besides avoiding false positive warnings, this also - fork.c has to call scheduler_tick() with preemption disabled - otherwise scheduler_tick()'s spin_unlock can preempt! - irqs_disabled() macro introduced. - [ all other local_irq_enable() or sti instances conditional on CONFIG_DEBUG_IRQ_SCHEDULE are to fix false positive warnings. ] - fix buggy in_softirq(). Fortunately the bug made the test broader, which didnt result in algorithmical breakage, just suboptimal performance. - move do_softirq() processing into irq_exit() => this also fixes the softirq processing bugs present in apic.c IRQ handlers that did not test for softirqs after irq_exit(). - simplify local_bh_enable().
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- 22 Jul, 2002 2 commits
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Ingo Molnar authored
Make people use the proper cli/sti replacements
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Linus Torvalds authored
a number of drivers)
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- 21 Jul, 2002 1 commit
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Ingo Molnar authored
This is a massive cleanup of the IRQ subsystem. It's losely based on Linus' original idea and DaveM's original implementation, to fold our various irq, softirq and bh counters into the preemption counter. with this approach it was possible: - to remove the 'big IRQ lock' on SMP - on which sti() and cli() relied. - to streamline/simplify arch/i386/kernel/irq.c significantly. - to simplify the softirq code. - to remove the preemption count increase/decrease code from the lowlevel IRQ assembly code. - to speed up schedule() a bit. Global sti() and cli() is gone forever on SMP, there is no more globally synchronizing irq-disabling capability. All code that relied on sti() and cli() and restore_flags() must use other locking mechanisms from now on (spinlocks and __cli()/__sti()). obviously this patch breaks massive amounts of code, so only limited .configs are working at the moment (UP is expected to be unaffected, but SMP will require various driver updates). The patch was developed and tested on SMP systems, and while the code is still a bit rough in places, the base IRQ code appears to be pretty robust and clean. while it boots already so the worst is over, there is lots of work left: eg. to fix the serial layer to not use cli()/sti() and bhs ...
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- 15 Jul, 2002 1 commit
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James Mayer authored
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- 17 Jun, 2002 1 commit
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Rusty Russell authored
This patch removes the concept of "logical" CPU numbers, in preparation for CPU hotplugging.
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- 28 Apr, 2002 1 commit
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Dave Jones authored
o P4 thermal throttling is now compile time option o ifdefs cleaned up due to above o Only poke the LVT if thermal throttling is enabled. o Remove bogus cache flushing as per previous discussion. o Replace hard coded timer values with MCE_RATE o Change default polling frequency from 5 to 15 seconds o SMP fixes. (Don't readd timer) o Compile time warning fixes. o Add config helptext
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