Commits · c861cd3e92d92ae946e19099f198018fcb4fd887 · nexedi / linux

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14 Oct, 2011 4 commits

ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocks · 33ccedfd

Heiko Stuebner authored 13 years ago

Previously the fclk rate was calculated by dividing the pll through
the divider value of the armdiv. With a real armdiv clk in place it's
possible to simply read its value, which does essentially the same.

This change makes the whole fdiv_fn function pointers supplied to
s3c2443_common_init_clocks and s3c2443_common_setup_clocks
obsolete, so remove it too.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

33ccedfd

ARM: S3C2416: Add comment describing the armdiv/armclk · efb1fb48
Heiko St?bner authored 13 years ago
```
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
```
efb1fb48

ARM: S3C24XX: Add infrastructure to transmit armdiv to common code · d9a3bfbd

Heiko Stuebner authored 13 years ago

This is needed for making the armdiv clock common to S3C2443
and S3C2416/2450.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

d9a3bfbd

ARM: S3C2416: Add armdiv_mask constant · 0d23d059

Heiko Stuebner authored 13 years ago

The S3C2416/2450 has only 3 bits for the armdiv setting instead
of the 4 bits of the S3C2443.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

0d23d059

04 Oct, 2011 2 commits

ARM: SAMSUNG: Consolidate plat/pll.h · 52e329eb

Kukjin Kim authored 13 years ago

Removed
- arch/arm/plat-s3c24xx/include/plat/pll.h
- arch/arm/mach-s3c64xx/include/mach/pll.h
- arch/arm/plat-s5p/include/plat/pll.h
- arch/arm/plat-samsung/include/plat/pll6553x.h

And created
- arch/arm/plat-samsung/include/plat/pll.h

Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: changed title]
[kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

52e329eb

ARM: S3C2416: Add HSSPI clock sourced from EPLL · 4a43c666

Heiko Stuebner authored 13 years ago

This clock is special to the S3C2416/2450 SoCs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

4a43c666

20 Jul, 2011 1 commit

ARM: S3C24XX: Add clkdev support · e83626f2

Thomas Abraham authored 13 years ago

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

e83626f2

06 Jan, 2011 1 commit

ARM: S3C24XX: Add address map and clock definitions for HSMMC0 · 95d6791b

Yauhen Kharuzhy authored 14 years ago

Define maps for HSMMC devices.

S3C2443 has one HSMMC device with base address 0x4A800000.
S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000.

So suppose that S3C2443 has only HSMMC1.

Define clock for hsmmc0 device and register it.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

95d6791b

10 May, 2010 1 commit

ARM: S3C2416: Add basic clock support · 8d6f8658

Ben Dooks authored 14 years ago

Add basic clock support for the PLLs, HSMMC channels and
PWM clocks. This is enough to get a basic system up and
running.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

8d6f8658