An error occurred fetching the project authors.
- 14 Oct, 2011 7 commits
-
-
Heiko Stuebner authored
S3C2443 uses hsmmc1 as its only hsmmc device and for S3C2416/S3C2450 it's the second hsmmc channel with the same PCLKCON bit. The hsmmc-if clocks on both systems already got a devname, as did the hsmmc pclk for hsmmc0 on the S3C2416. So to make it possible to identify the hsmmc1 pclk on S3C2416 add the correct devname for it. The sclk name on S3C2443 also is s3c-sdhci.1. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko Stuebner authored
Previously the fclk rate was calculated by dividing the pll through the divider value of the armdiv. With a real armdiv clk in place it's possible to simply read its value, which does essentially the same. This change makes the whole fdiv_fn function pointers supplied to s3c2443_common_init_clocks and s3c2443_common_setup_clocks obsolete, so remove it too. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko Stuebner authored
Cpufreq uses frequencies in kHz and not Hz, so set_rate and round_rate would be called with a frequency of 266666000 instead of 266666666 but the clock functions check for rates smaller or equal to the targetrate. As the armdiv does not support steps this small we can accommodate this by simply also setting the last 3 digits of the calculated rate to zero. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko Stuebner authored
The armdiv array may contain unset divider values. Check the relevant value to prevent division by zero errors. Also check for set nr_armdiv and armdivmask before meddling with clkdiv0. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko Stuebner authored
Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko St?bner authored
The system-layout of the armdiv and armclk is common to S3C2443/S3C2416/S3C2450 and only differs in the array of possible dividers. Therefore it is possible to reuse the clock definitions for all of these SoCs. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko Stuebner authored
This is needed for making the armdiv clock common to S3C2443 and S3C2416/2450. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
- 04 Oct, 2011 2 commits
-
-
Heiko Stuebner authored
This clock is common to S3C2443/2416/2450. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
Heiko Stuebner authored
S3C2416/S3C2450 use the same clocks for their i2s blocks and can therefore reuse the existing ones. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
- 20 Jul, 2011 1 commit
-
-
Thomas Abraham authored
Signed-off-by:
Thomas Abraham <thomas.ab@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
- 06 Jan, 2011 1 commit
-
-
Yauhen Kharuzhy authored
Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by:
Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
-
- 10 May, 2010 1 commit
-
-
Ben Dooks authored
To share code with some of the newer parts such as the S3C2416, move parts of arch/arm/mach-s3c2443/clock.c to a common file called arch/arm/plat-s3c24xx/s3c2443-clock.c. Update the build configuration to deal with this new file. Signed-off-by:
Ben Dooks <ben-linux@fluff.org>
-