- 07 Jan, 2009 40 commits
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Kenji Kaneshige authored
There is a problem that some non hot-pluggable PCIe slots are detected as hot-pluggable by pciehp on some platforms. The immediate cause of this problem is that hot-plug capable bit in the Slot Capabilities register is set even for non hot-pluggable slots on those platforms. It seems a BIOS/hardware problem, but we need workaround about that. Some of those platforms define hot-pluggable PCIe slots on ACPI namespace properly, while hot-plug capable bit in the Slot Capabilities register is set improperly. So using ACPI namespace information in pciehp to detect PCIe hot-pluggable slots would be a workaround. This patch adds 'pciehp_detect_mode' module option. When 'acpi' is specified, pciehp uses ACPI namespace information to detect PCIe hot-pluggable slots. Signed-off-by:
Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org>
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Rusty Russell authored
This uses work_on_cpu(), rather than altering the cpumask of the thread which we happen to be. Note the cleanups: 1) I've removed the CONFIG_NUMA test, since dev_to_node() returns -1 for !CONFIG_NUMA anyway and the compiler will eliminate it. 2) No need to reset mempolicy to default (a bad idea anyway) since work_on_cpu is run from a workqueue. Signed-off-by:
Rusty Russell <rusty@rustcorp.com.au> Signed-off-by:
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Rafael J. Wysocki authored
Suspend-resume of PCI Express ports has recently been moved into _suspend_late() and _resume_early() callbacks, but some functions executed from there should not be called with interrupts disabled, eg. pci_enable_device(). For this reason, split the suspend-resume of PCI Express ports into parts to be executed with interrupts disabled and with interrupts enabled. Signed-off-by:
Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by:
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Rafael J. Wysocki authored
Currently, PCI devices without the PM capability that are power manageable by the platform (eg. ACPI) are not handled correctly by pci_set_power_state(), because their current_state field is not updated to reflect the new power state of the device. Fix this by making pci_update_current_state() accept additional argument representing the power state of the device as set by the platform. Signed-off-by:
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Jesse Barnes authored
When PCI devices are initialized, we check whether they support PCI PM caps and set the device can_wakeup flag if so. However, some devices may have platform provided wakeup events rather than PCI PME signals, so we need to set can_wakeup in that case too. Doing so should allow wakeups from many more devices, especially on cost constrained systems. Reported-by:
Alan Stern <stern@rowland.harvard.edu> Tested-by:
Joseph Chan <JosephChan@via.com.tw> Acked-by:
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Yu Zhao authored
This patch splits a new function, pci_bus_add_child(), from pci_bus_add_devices(). The new function can be used to register PCI buses to the device core. Signed-off-by:
Yu Zhao <yu.zhao@intel.com> Signed-off-by:
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Yu Zhao authored
Cleanup pci_bus_add_devices() by negating the conditional and continuing, rather than having a single conditional take up the whole body. Signed-off-by:
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Yu Zhao authored
Add a function to map a given resource number to a corresponding register so drivers can get the offset and type of device specific BARs. Signed-off-by:
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Yu Zhao authored
Allow pci_alloc_child_bus() to allocate buses without bridge devices. Some SR-IOV devices can occupy more than one bus number, but there is no explicit bridges because that have internal routing mechanism. Signed-off-by:
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Yu Zhao authored
Export __pci_read_base() so it can be used by whole PCI subsystem. Signed-off-by:
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Yu Zhao authored
Remove the unnecessary number of resources condition checks because the pci_update_resource() will check availability of the resources. Signed-off-by:
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Yu Zhao authored
This patch moves all definitions of the PCI resource names to an 'enum', and also replaces some hard-coded resource variables with symbol names. This change eases introduction of device specific resources. Reviewed-by:
Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by:
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Yu Zhao authored
This cleanup removes unnecessary argument 'struct resource *res' in pci_update_resource(), so it takes same arguments as other companion functions (pci_assign_resource(), etc.). Signed-off-by:
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Yu Zhao authored
Change parameter of pci_ari_enabled() from 'pci_dev' to 'pci_bus'. ARI forwarding on the bridge mostly concerns the subordinate devices rather than the bridge itself. So this change will make the function easier to use. Signed-off-by:
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Adam Jackson authored
All the other quirks are dev_info() not dev_err(), this one isn't special. This makes 'quiet' boot in qemu really quiet. Signed-off-by:
Adam Jackson <ajax@redhat.com> Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Cc: Jeff Garzik <jeff@garzik.org> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Trent Piepho authored
PCI devices have three settable boolean attributes, enable, broken_parity_status, and msi_bus. The store functions for these would silently interpret "0x01" as false, "1llogical" as true, and "true" would be (silently!) ignored and do nothing. This is inconsistent with typical sysfs handling of settable attributes, and just plain doesn't make much sense. So, use strict_strtoul(), which was created for this purpose. The store functions will treat a value of 0 as false, non-zero as true, and return -EINVAL for a parse failure. Additionally, is_enabled_store() and msi_bus_store() return -EPERM if CAP_SYS_ADMIN is lacking, rather than silently doing nothing. This is more typical behavior for sysfs attributes that need a capability. And msi_bus_store() will only print the "forced subordinate bus ..." warning if the MSI flag was actually forced to a different value. Signed-off-by:
Trent Piepho <xyzzy@speakeasy.org> Signed-off-by:
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Andrew Morton authored
It's too large to be inlined. Acked-by:
Arjan van de Ven <arjan@linux.intel.com> Signed-off-by:
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Alan Stern authored
This patch (as1186) fixes a minor mistake in pci_enable_wake(). When the routine is asked to disable remote wakeup, it should not return an error merely because the device is not allowed to do wakeups! Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by:
Kyle McMartin <kyle@infradead.org> Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by:
Ralf Baechle <ralf@linux-mips.org> Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: hpa@zytor.com Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by:
Paul Mundt <lethal@linux-sh.org> Signed-off-by:
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Bjorn Helgaas authored
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by:
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Bjorn Helgaas authored
This patch adds pci_swizzle_interrupt_pin(), which implements the INTx swizzling algorithm specified in Table 9-1 of the "PCI-to-PCI Bridge Architecture Specification," revision 1.2. There are many architecture-specific implementations of this swizzle that can be replaced by this common one. Reviewed-by:
David Howells <dhowells@redhat.com> Signed-off-by:
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Bjorn Helgaas authored
Test "pin" immediately to simplify the subsequent code. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: hpa@zytor.com Signed-off-by:
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Bjorn Helgaas authored
Keep "pin" encoded as it is in the "Interrupt Pin" value in PCI config space, i.e., 0=device doesn't use interrupts, 1=INTA, ..., 4=INTD. This makes the bridge INTx swizzle match other architectures. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: hpa@zytor.com Signed-off-by:
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Bjorn Helgaas authored
This patch makes pci_get_interrupt_pin() return values encoded the same way as the "Interrupt Pin" value in PCI config space, i.e., 1=INTA, ..., 4=INTD. pirq_bios_set() is the only in-tree caller of pci_get_interrupt_pin() and pci_get_interrupt_pin() is not exported. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: hpa@zytor.com Signed-off-by:
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Bjorn Helgaas authored
This patch changes cpqphp to use interrupt pin values just as they come from PCI config space, i.e., 1=INTA, ..., 4=INTD. pcibios_set_irq_routing() takes pin arguments in the range 0=INTA, ..., 3=INTD, so we'll adjust the pin just before calling it. Signed-off-by:
Alex Chiang <achiang@hp.com> Signed-off-by:
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Jacob Pan authored
Early type 1 accesses can cause problems on some platforms, and pci=noearly is supposed to prevent them from occurring. However, early mcfg probing code uses type 1 and isn't protected by a check for noearly. This patch fixes that problem. Signed-off-by:
Jacob Pan <jacob.jun.pan@intel.com> Signed-off-by:
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Bjorn Helgaas authored
These printks don't contain enough information to be useful. I think it would be more useful to have a message when a service driver binds to a root port. That could contain the service type, the interrupt mode and IRQ, etc. Signed-off-by:
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Bjorn Helgaas authored
Change PCI bus locality messages so they have a bit more context and look like the rest of PCI, e.g., - bus 01 -> node 0 - bus 04 -> node 0 + pci 0000:01: bus on NUMA node 0 + pci 0000:04: bus on NUMA node 0 Signed-off-by: -
Bjorn Helgaas authored
Change PCI bus resource messages so they have a bit more context and look like the rest of PCI, e.g., - bus: 00 index 0 io port: [0x00-0xffff] - bus: 00 index 1 mmio: [0x000000-0xffffffff] + pci 0000:00: bus resource 0 io : [0x00-0xffff] + pci 0000:00: bus resource 1 mem: [0x000000-0xffffffff] This also changes them from KERN_INFO to KERN_DEBUG. Signed-off-by: -
Alex Chiang authored
Clean up whitespace. Setting 'let c_space_errors=1' in .vimrc shows all sorts of ugliness. ;) Signed-off-by:
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Ingo Molnar authored
These are easy to trigger (more or less harmlessly) with multiple video cards, since the ROM BAR will typically not be given any space by the BIOS bridge setup. No reason to punish quiet boot for this. Signed-off-by:
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Hidetoshi Seto authored
"TLP" is an acronym for "Transaction Layer Packet." Signed-off-by:
Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by:
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Rafael J. Wysocki authored
Since interrupts will soon be disabled at PCI resume time, we need to pre-allocate memory to save/restore PCI config space (or use GFP_ATOMIC, but this is safer). Reported-by:
Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by:
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Linus Torvalds authored
This adds more LPC controller IO range decode quirks for the Intel ICH family of chipsets. They differ a bit between the older ICH6 chipset and the more modern layout of the ICH7-ICH10 chipsets. This patch just prints out the IO decode information found by the quirks, but eventually we may want to add them to the resource tree, in order to know to avoid allocating things over them. That's especially true if it turns out that any firmware ends up putting the magic motherboard resources in an address range that we use for dynamic allocations (ie above PCIBIOS_MIN_IO, which is 0x1000 on x86). Signed-off-by:
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Rafael J. Wysocki authored
I don't see why the suspend and resume of PCI Express ports should be handled with interrupts enabled and it may even lead to problems in some situations. For this reason, move the suspending and resuming of PCI Express ports into ->suspend_late() and ->resume_early() callbacks executed with interrupts disabled. This patch addresses the regression from 2.6.26 tracked as http://bugzilla.kernel.org/show_bug.cgi?id=12121 . Acked-by:
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