- 03 Sep, 2014 24 commits
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Ville Syrjälä authored
We want to use the higher level vdd on func here. Not a big deal yet (we'd just get the warn when things go awry) but when the locking gets fixed this becomes more important. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Passing the port as a parameter to PANEL_PORT_SELECT_VLV results in neater code. Sadly the PCH port select bits aren't suitable for the same treatment and the resulting macro would be much uglier, so leave those defines as is. Signed-off-by:
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Thomas Daniel authored
A previous commit broke aliasing PPGTT for lrc, resulting in a kernel oops on boot. Add a check so that is full PPGTT is not in use the context is populated with the aliasing PPGTT. Issue: VIZ-4278 Signed-off-by:
Thomas Daniel <thomas.daniel@intel.com> Reviewed-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
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Chris Wilson authored
In the move over to use BIOS connector configs, we lost the ability to force a specific set of connectors on or off. Try to remedy that by dropping back to the old behavior if we detect a hard coded connector config that tries to enable a connector (disabling is easy!). Based on earlier patches by Jesse Barnes. v2: Remove Jesse's patch Reported-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
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Ben Widawsky authored
v2: fix conflict on rebase. Cc: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by:
Ben Widawsky <ben@bwidawsk.net> Signed-off-by:
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Deepak S authored
We need do forcewake before Disabling RC6, This is what the BIOS expects while going into suspend. v2: updated commit message. (Daniel) Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by:
Deepak S <deepak.s@intel.com> Signed-off-by:
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Damien Lespiau authored
Improve the debug message that tells us we've been waiting for a vblank that never arrived. Printing the pipe could lead a "doh!" moment where we've been waiting for a vblank on a pipe that was off for instance. Signed-off-by:
Thomas Wood <thomas.wood@intel.com> [danvet: Polish commit message a bit.] Signed-off-by:
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Damien Lespiau authored
Chris has decided that enough is enough. It's time to fixup dev Vs dev_priv. This is a modest contribution to the crusade. v2: Still use INTEL_INFO(), for the (mythical!) case we want to hardcode the info struct with defines (Chris) Rename the macro argument from 'dev' to 'dev_priv' (Jani) v3: Use names unlikely to be used as macro arguments (Chris) Suggested-by: -
Jani Nikula authored
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Oscar Mateo authored
Since the ringbuffer does not belong per engine anymore, we have to make sure that we are always recording the correct ringbuffer. TODO: This is only a small fix to keep basic error capture working, but we need to add more information for it to be useful (e.g. dump the context being executed). v2: Reorder how the ringbuffer is chosen to clarify the change and rename the variable, both changes suggested by Chris Wilson. Also, add the TODO comment to the code, as suggested by Daniel. Signed-off-by:
Oscar Mateo <oscar.mateo@intel.com> Reviewed-by:
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Chris Wilson authored
Signed-off-by:
Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by:
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Chris Wilson authored
For cleanliness, i915_error_object_create() was written to handle the NULL pointer in a central location. The macro that wrapped it and passed it a num_pages to use, was not safe. As we now never limit the num_pages to use (we did so at one point to only capture the first page of the context), we can remove the redundant macro and be NULL safe again. Signed-off-by:
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Chris Wilson authored
For stolen pages, since it is verboten to access them directly on many architectures, we have to read them through the GTT aperture. If they are not accessible through the aperture, then we have to abort. This was complicated by commit 8b6124a6 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Jan 30 14:38:16 2014 +0000 drm/i915: Don't access snooped pages through the GTT (even for error capture) and the desire to use stolen memory for ringbuffers, contexts and batches in the future. Signed-off-by:
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Jani Nikula authored
Make backlight class sysfs brightness 0 value switch off the backlight for connectors that have the backlight_power callback defined. For eDP, this has the similar caveats regarding power savings as bl_power as only the power sequencer backlight control is switched off. Signed-off-by:
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Jani Nikula authored
This lets the userspace switch off the backlight using the backlight class sysfs bl_power file. The switch is done using the power sequencer; the backlight PWM, and everything else, remains enabled. The display backlight won't draw power, but for maximum power savings the encoder needs to be switched off. Signed-off-by:
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Jani Nikula authored
Make backlight class sysfs bl_power a sub-state of backlight enabled, if a backlight power connector callback is defined. It's up to the connector callback to handle the sub-state, typically in a way that respects panel power sequencing. v2: Post the version that does not oops. *facepalm*. Signed-off-by:
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Jani Nikula authored
Make it possible to change panel power control backlight state without touching the PWM. No functional changes. Signed-off-by:
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Paulo Zanoni authored
The GEN6_PM* registers don't exist on BDW anymore, so when we read this file we trigger unclaimed register errors. The equivalent BDW register for PMs is GEN8_GT_I*R(2), so use it. Testcase: igt/pm_rpm/debugfs-read Signed-off-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:
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Sonika Jindal authored
Primary planes support 180 degree rotation. Expose the feature through rotation drm property. v2: Calculating linear/tiled offsets based on pipe source width and height. Added 180 degree rotation support in ironlake_update_plane. v3: Checking if CRTC is active before issueing update_plane. Added wait for vblank to make sure we dont overtake page flips. Disabling FBC since it does not work with rotated planes. v4: Updated rotation checks for pending flips, fbc disable. Creating rotation property only for Gen4 onwards. Property resetting as part of lastclose. v5: Resetting property in i915_driver_lastclose properly for planes and crtcs. Fixed linear offset calculation that was off by 1 w.r.t width in i9xx_update_plane and ironlake_update_plane. Removed tab based indentation and unnecessary braces in intel_crtc_set_property and intel_update_fbc. FBC and flip related checks should be done only for valid crtcs. v6: Minor nits in FBC disable checks for comments in intel_crtc_set_property and positioning the disable code in intel_update_fbc. v7: In case rotation property on inactive crtc is updated, we return successfully printing debug log as crtc is inactive and only property change is preserved. v8: update_plane is changed to update_primary_plane, crtc->fb is changed to crtc->primary->fb and return value of update_primary_plane is ignored. v9: added rotation property to primary plane instead of crtc. Removing reset of rotation property from lastclose. rotation_property is moved to drm_mode_config, so drm layer will take care of resetting. Adding updation of fbc when rotation is set to 0. Allowing rotation only if value is different than old one. v10: Calling intel_primary_plane_setplane instead of update_primary_plane in set_property(Daniel). v11: Using same set_property function for both primary and sprite, Adding primary plane specific code in the same function (Matt). v12: Removing disabling/ enabling of fbc from set_property because it is done from intel_pipe_set_base. Other formatting v13: we need to call disable_fbc before changing the rotation to 180, disable_fbc from intel_pipe_set_base gets called very late, that will be used to re-enable fbc if rotation is set to 0 (Ville). Testcase: igt/kms_rotation_crc Signed-off-by:
Uma Shankar <uma.shankar@intel.com> Signed-off-by:
Sagar Kamble <sagar.a.kamble@intel.com> Signed-off-by:
Sonika Jindal <sonika.jindal@intel.com> [danvet: Add FIXME to explain why we need the open-coded update_fbc hunk to disable fbc when rotated 180 degree. And make checkpatch happier.] Acked-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
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Sonika Jindal authored
This unifies how the primary plane functions work with how the sprite functions works, which allows us to reuse them to update primary plane properties. v2: Moving setting of plane members in the end to take care of failure cases and not-visible cases (Matt). Signed-off-by:
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McAulay, Alistair authored
This patch is to address Daniels concerns over different code during reset: http://lists.freedesktop.org/archives/intel-gfx/2014-June/047758.html "The reason for aiming as hard as possible to use the exact same code for driver load, gpu reset and runtime pm/system resume is that we've simply seen too many bugs due to slight variations and unintended omissions." Tested using igt drv_hangman. V2: Cleaner way of preventing check_wedge returning -EAGAIN V3: Clean the last_context during reset, to ensure do_switch() does the MI_SET_CONTEXT. As per review. Signed-off-by:
McAulay, Alistair <alistair.mcaulay@intel.com> Reviewed-by:
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Andreas Pokorny authored
As there should not be any other virtual device that might share buffers, the callbacks remain empty stubs. Still prime can be used to transfer buffers between processes that use qxl. Signed-off-by:
Andreas Pokorny <andreas.pokorny@canonical.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Andreas Pokorny authored
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git://people.freedesktop.org/~mlankhorst/linuxDave Airlie authored
Merge the move to generic fences for TTM using drivers. * 'for-airlied-next' of git://people.freedesktop.org/~mlankhorst/linux: drm/nouveau: use shared fences for readable objects drm/nouveau: Keep only a single list for validation. drm/ttm: use rcu in core ttm drm/vmwgfx: use rcu in vmw_user_dmabuf_synccpu_grab drm/radeon: use rcu waits in some ioctls drm/nouveau: use rcu in nouveau_gem_ioctl_cpu_prep drm/ttm: flip the switch, and convert to dma_fence drm/qxl: rework to new fence interface drm/nouveau: rework to new fence interface drm/vmwgfx: rework to new fence interface, v2 drm/vmwgfx: get rid of different types of fence_flags entirely drm/radeon: use common fence implementation for fences, v4 drm/ttm: kill off some members to ttm_validate_buffer drm/ttm: add interruptible parameter to ttm_eu_reserve_buffers drm/ttm: kill fence_lock drm/ttm: call ttm_bo_wait while inside a reservation drm/nouveau: require reservations for nouveau_fence_sync and nouveau_bo_fence drm/nouveau: add reservation to nouveau_gem_ioctl_cpu_prep
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- 02 Sep, 2014 12 commits
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
drm-intel-next-2014-08-22: - basic code for execlist, which is the fancy new cmd submission on gen8. Still disabled by default (Ben, Oscar Mateo, Thomas Daniel et al) - remove the useless usage of console_lock for I915_FBDEV=n (Chris) - clean up relations between ctx and ppgtt - clean up ppgtt lifetime handling (Michel Thierry) - various cursor code improvements from Ville - execbuffer code cleanups and secure batch fixes (Chris) - prep work for dev -> dev_priv transition (Chris) - some of the prep patches for the seqno -> request object transition (Chris) - various small improvements all over * tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-intel: (86 commits) drm/i915: fix suspend/resume for GENs w/o runtime PM support drm/i915: Update DRIVER_DATE to 20140822 drm: fix plane rotation when restoring fbdev configuration drm/i915/bdw: Disable execlists by default drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists) drm/i915/bdw: Document Logical Rings, LR contexts and Execlists drm/i915/bdw: Print context state in debugfs drm/i915/bdw: Display context backing obj & ringbuffer info in debugfs drm/i915/bdw: Display execlists info in debugfs drm/i915/bdw: Disable semaphores for Execlists drm/i915/bdw: Make sure gpu reset still works with Execlists drm/i915/bdw: Don't write PDP in the legacy way when using LRCs drm/i915: Track cursor changes as frontbuffer tracking flushes drm/i915/bdw: Help out the ctx switch interrupt handler drm/i915/bdw: Avoid non-lite-restore preemptions drm/i915/bdw: Handle context switch events drm/i915/bdw: Two-stage execlist submit process drm/i915/bdw: Write the tail pointer, LRC style drm/i915/bdw: Implement context switching (somewhat) drm/i915/bdw: Emission of requests with logical rings ... Conflicts: drivers/gpu/drm/i915/i915_drv.c
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Maarten Lankhorst authored
nouveau keeps track in userspace whether a buffer is being written to or being read, but it doesn't use that information. Change this to allow multiple readers on the same bo. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by:
Ben Skeggs <bskeggs@redhat.com>
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Maarten Lankhorst authored
Maintain the original order to handle VRAM/GART/mixed correctly for <nv50, it's likely not as important on newer cards. Signed-off-by:
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Maarten Lankhorst authored
Signed-off-by: -
Maarten Lankhorst authored
Signed-off-by: -
Maarten Lankhorst authored
Signed-off-by:
Christian König <christian.koenig@amd.com>
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Maarten Lankhorst authored
With the conversion to the reservation api this should be safe. Signed-off-by:
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Maarten Lankhorst authored
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Maarten Lankhorst authored
Final driver! \o/ This is not a proper dma_fence because the hardware may never signal anything, so don't use dma-buf with qxl, ever. Signed-off-by: -
Maarten Lankhorst authored
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Maarten Lankhorst authored
Use the new fence interface on vmwgfx too. Signed-off-by: -
Maarten Lankhorst authored
Only one type was ever used. This is needed to simplify the fence support in the next commit. Signed-off-by:
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- 01 Sep, 2014 4 commits
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Maarten Lankhorst authored
Changes since v1: - Kill the sw interrupt dance, add and use radeon_irq_kms_sw_irq_get_delayed instead. - Change custom wait function, lockdep complained about it. Holding exclusive_lock in the wait function might cause deadlocks. Instead do all the processing in .enable_signaling, and wait on the global fence_queue to pick up gpu resets. - Process all fences in radeon_gpu_reset after reset to close a race with the trylock in enable_signaling. Changes since v2: - Small changes to work with the rewritten lockup recovery patches. Changes since v3: - Call radeon_fence_schedule_check when exclusive_lock cannot be acquired to always cause a wake up. - Reset irqs from hangup check. - Drop reading seqno in the callback, use cached value. - Fix indentation in radeon_fence_default_wait - Add a radeon_test_signaled function, drop a few test_bit calls. - Make to_radeon_fence global. Signed-off-by:
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Maarten Lankhorst authored
This reorders the list to keep track of what buffers are reserved, so previous members are always unreserved. This gets rid of some bookkeeping that's no longer needed, while simplifying the code some. Signed-off-by: -
Maarten Lankhorst authored
It seems some drivers really want this as a parameter, like vmwgfx. Signed-off-by: -
Maarten Lankhorst authored
No users are left, kill it off! :D Conversion to the reservation api is next on the list, after that the functionality can be restored with rcu. Signed-off-by:
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