Skip to content

L
linux
Switch branch/tag
  1. 30 Nov, 2011 1 commit
    • Tanmay Inamdar's avatar
      powerpc/40x: Add APM8018X SOC support · d5b9ee7b
      Tanmay Inamdar authored 
      The AppliedMicro APM8018X embedded processor targets embedded applications that
require low power and a small footprint. It features a PowerPC 405 processor
core built in a 65nm low-power CMOS process with a five-stage pipeline executing
up to one instruction per cycle. The family has 128-kbytes of on-chip memory,
a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface.
Signed-off-by: default avatarTanmay Inamdar <tinamdar@apm.com>
Signed-off-by: default avatarJosh Boyer <jwboyer@gmail.com>
      d5b9ee7b
  3. 28 Nov, 2011 6 commits
  5. 25 Nov, 2011 30 commits
  7. 24 Nov, 2011 3 commits
    • Chuck Meade's avatar
      drivers/serial/ucc_uart.c: Add missing call to init UCC UART port timeout · 8e18862d
      Chuck Meade authored 
      The UCC UART driver is missing a call to uart_update_timeout().
Without this call, attempting to close the port after outputting large
amounts of data (i.e. using tty and uart buffering) results in long
timeouts before the port will actually be shut down.

For example, cat a large file to a UCC UART port.  With the current
driver, the port will stay open for 30 seconds after the last byte
of data is output.  But with this patch, the port is closed as
expected, just after the data has been output (tx fifos empty).
Signed-off-by: default avatarChuck Meade <chuck@ThePTRGroup.com>
Acked-by: default avatarTimur Tabi <timur@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      8e18862d
    • Timur Tabi's avatar
      powerpc/fsl_msi: add support for the fsl, msi property in PCI nodes · 895d603f
      Timur Tabi authored 
      On Freescale parts with multiple MSI controllers, the controllers are
combined into one "pool" of interrupts.  Whenever a device requests an MSI
interrupt, the next available interrupt from the pool is selected,
regardless of which MSI controller the interrupt is from.  This works
because each PCI bus has an ATMU to all of CCSR, so any PCI device can
access any MSI interrupt register.

The fsl,msi property is used to specify that a given PCI bus should only
use a specific MSI device.  This is necessary, for example, with the
Freescale hypervisor, because the MSI devices are assigned to specific
partitions.

Ideally, we'd like to be able to assign MSI devices to PCI busses within
the MSI or PCI layers.  However, there does not appear to be a mechanism
to do that.  Whenever the MSI layer wants to allocate an MSI interrupt to
a PCI device, it just calls arch_setup_msi_irqs().  It would be nice if we
could register an MSI device with a specific PCI bus.

So instead we remember the phandles of each MSI device, and we use that to
limit our search for an available interrupt.  Whenever we are asked to
allocate a new interrupt for a PCI device, we check the fsl,msi property
of the PCI bus for that device.  If it exists, then as we are looping over
all MSI devices, we skip the ones that don't have a matching phandle.
Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      895d603f
    • Kumar Gala's avatar
      powerpc/85xx: Renamed mpc85xx_common.c to common.c · db9c1870
      Kumar Gala authored 
      The file name is already scoped by the directory its in.
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      db9c1870
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7