- 10 Jun, 2009 40 commits
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Jan Kiszka authored
The stats entry request_nmi is no longer used as the related user space interface was dropped. So clean it up. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Avi Kivity <avi@redhat.com>
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Gleb Natapov authored
If a task switch caused by an event remove it from the event queue. VMX already does that. Signed-off-by:
Gleb Natapov <gleb@redhat.com> Signed-off-by:
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Andre Przywara authored
On AMD CPUs sometimes the DB bit in the stack segment descriptor is left as 1, although the whole segment has been made unusable. Clear it here to pass an Intel VMX entry check when cross vendor migrating. Signed-off-by:
Andre Przywara <andre.przywara@amd.com> Signed-off-by:
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Glauber Costa authored
Apparently nobody turned this on in a while... setting apic_debug to something compilable, generates some errors. This patch fixes it. Signed-off-by:
Glauber Costa <glommer@redhat.com> Signed-off-by:
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Chris Wright authored
Remove extra tab. Signed-off-by:
Chris Wright <chrisw@redhat.com> Signed-off-by:
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Sheng Yang authored
Intel TXT(Trusted Execution Technology) required VMX off for all cpu to work when system shutdown. CC: Joseph Cihula <joseph.cihula@intel.com> Signed-off-by:
Sheng Yang <sheng@linux.intel.com> Signed-off-by:
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Sheng Yang authored
Memory aliases with different memory type is a problem for guest. For the guest without assigned device, the memory type of guest memory would always been the same as host(WB); but for the assigned device, some part of memory may be used as DMA and then set to uncacheable memory type(UC/WC), which would be a conflict of host memory type then be a potential issue. Snooping control can guarantee the cache correctness of memory go through the DMA engine of VT-d. [avi: fix build on ia64] Signed-off-by:
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Sheng Yang authored
Shadow_mt_mask is out of date, now it have only been used as a flag to indicate if TDP enabled. Get rid of it and use tdp_enabled instead. Also put memory type logical in kvm_x86_ops->get_mt_mask(). Signed-off-by:
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Jan Blunck authored
This moves the get_cpu() call down to be called after we wake up the waiters. Therefore the waitqueue locks can safely be rt mutex. Signed-off-by:
Jan Blunck <jblunck@suse.de> Signed-off-by:
Sven-Thorsten Dietrich <sven@thebigcorporation.com> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
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Gleb Natapov authored
It just returns pending IRQ vector from the queue for VMX/SVM. Get IRQ directly from the queue before migration and put it back after. Signed-off-by:
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Gleb Natapov authored
Re-put pending IRQ vector into interrupt_bitmap before migration. Otherwise it will be lost if migration happens in the wrong time. Signed-off-by:
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Gleb Natapov authored
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Gleb Natapov authored
They are recalculated before each use anyway. Signed-off-by:
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Gleb Natapov authored
Saves many exits to userspace in a case of IRQ chip in userspace. Signed-off-by:
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Gleb Natapov authored
Even if IRQ chip is in userspace. Signed-off-by:
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Gleb Natapov authored
No longer used. Signed-off-by:
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Gleb Natapov authored
It is the same as inject_pending_irq() for VMX/SVM now. Signed-off-by:
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Gleb Natapov authored
It always return false for VMX/SVM now. Signed-off-by:
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Gleb Natapov authored
Start to use interrupt/exception queues like VMX does. This also fix the bug that if exit was caused by a guest internal exception access to IDT the exception was not reinjected. Use EVENTINJ to inject interrupts. Use VINT only for detecting when IRQ windows is open again. EVENTINJ ensures the interrupt is injected immediately and not delayed. Signed-off-by:
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Gleb Natapov authored
kvm_arch_interrupt_allowed() also checks IF so drop the check. Signed-off-by:
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Gleb Natapov authored
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Gleb Natapov authored
Use the same callback to inject irq/nmi events no matter what irqchip is in use. Only from VMX for now. Signed-off-by:
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Gleb Natapov authored
At the vector level, kernel and userspace irqchip are fairly similar. Signed-off-by:
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Jan Kiszka authored
Fix build breakage of hpa lookup in audit_mappings_page. Moreover, make this function robust against shadow_notrap_nonpresent_pte entries. Signed-off-by:
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Jes Sorensen authored
Restore local irq enabled state before calling kvm_arch_vcpu_init(), which calls kmalloc(GFP_KERNEL). Signed-off-by:
Jes Sorensen <jes@sgi.com> Acked-by:
Xiantao Zhang <xiantao.zhang@intel.com> Signed-off-by:
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Jes Sorensen authored
Preserve interrupt status around call to kvm_insert_vmm_mappin() in kvm_vcpu_pre_transition(). Signed-off-by:
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Jes Sorensen authored
Make sure to restore the psr after calling kvm_insert_vmm_mapping() which calls ia64_itr_entry() as it disables local interrupts and kvm_vcpu_init() may sleep. Avoids a warning from the lock debugging code. Signed-off-by:
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Jes Sorensen authored
vti_vcpu_load() doesn't do anything, so lets get rid of it. Signed-off-by:
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Xiantao Zhang authored
Flush all vcpu's TLB entries once changes guest's memory mapping. Signed-off-by:
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Marcelo Tosatti authored
Matt T. Yourst notes that kvm_arch_vcpu_ioctl_set_sregs lacks validity checking for the new cr3 value: "Userspace callers of KVM_SET_SREGS can pass a bogus value of cr3 to the kernel. This will trigger a NULL pointer access in gfn_to_rmap() when userspace next tries to call KVM_RUN on the affected VCPU and kvm attempts to activate the new non-existent page table root. This happens since kvm only validates that cr3 points to a valid guest physical memory page when code *inside* the guest sets cr3. However, kvm currently trusts the userspace caller (e.g. QEMU) on the host machine to always supply a valid page table root, rather than properly validating it along with the rest of the reloaded guest state." http://sourceforge.net/tracker/?func=detail&atid=893831&aid=2687641&group_id=180599 Check for a valid cr3 address in kvm_arch_vcpu_ioctl_set_sregs, triple fault in case of failure. Cc: stable@kernel.org Signed-off-by:
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Jes Sorensen authored
Reorder locking to avoid holding the slots_lock when entering the guest. Signed-off-by:
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Avi Kivity authored
Suggested by Ingo Molnar. Signed-off-by: -
Gleb Natapov authored
If a task switch was initiated because off a task gate in IDT and IDT was accessed because of an external even the instruction should not be skipped. Signed-off-by:
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Gleb Natapov authored
In the new mode instruction is decoded, but not executed. The EIP is moved to point after the instruction. Signed-off-by:
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Gleb Natapov authored
Do not emulate them yet. Signed-off-by:
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Gleb Natapov authored
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Gleb Natapov authored
Extend "Source operand type" opcode description field to 4 bites to accommodate new option. Signed-off-by:
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Gleb Natapov authored
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Gleb Natapov authored
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Gleb Natapov authored
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