1. 19 Jan, 2018 3 commits
  2. 16 Jan, 2018 2 commits
  3. 15 Jan, 2018 4 commits
    • Daniel Golle's avatar
      ARM: dts: rename oxnas dts files · 9e6c62b0
      Daniel Golle authored
      Other platforms' device-tree files start with a platform prefix, such as
      sun7i-a20-*.dts or at91-*.dts.
      This naming scheme turns out to be handy when using multi-platform build
      systems such as OpenWrt.
      Prepend oxnas files with their platform prefix to comply with the naming
      scheme already used for most other platforms.
      Signed-off-by: default avatarDaniel Golle <daniel@makrotopia.org>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      9e6c62b0
    • Arnd Bergmann's avatar
      ARM: dts: s5pv210: add interrupt-parent for ohci · 5c103719
      Arnd Bergmann authored
      The ohci-hcd node has an interrupt number but no interrupt-parent,
      leading to a warning with current dtc versions:
      
      arch/arm/boot/dts/s5pv210-aquila.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
      arch/arm/boot/dts/s5pv210-goni.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
      arch/arm/boot/dts/s5pv210-smdkc110.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
      arch/arm/boot/dts/s5pv210-smdkv210.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
      arch/arm/boot/dts/s5pv210-torbreck.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
      
      As seen from the related exynos dts files, the ohci and ehci controllers
      always share one interrupt number, and the number is the same here as
      well, so setting the same interrupt-parent is the reasonable solution
      here.
      Reviewed-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      5c103719
    • Arnd Bergmann's avatar
      ARM: lpc3250: fix uda1380 gpio numbers · ca32e0c4
      Arnd Bergmann authored
      dtc warns about obviously incorrect GPIO numbers for the audio codec
      on both lpc32xx boards:
      
      arch/arm/boot/dts/lpc3250-phy3250.dtb: Warning (gpios_property): reset-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
      arch/arm/boot/dts/lpc3250-phy3250.dtb: Warning (gpios_property): power-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
      arch/arm/boot/dts/lpc3250-ea3250.dtb: Warning (gpios_property): reset-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
      arch/arm/boot/dts/lpc3250-ea3250.dtb: Warning (gpios_property): power-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
      
      It looks like the nodes are written for a different binding that combines
      the GPIO number into a single number rather than a bank/number pair.
      I found the right numbers on stackexchange.com, so this patch fixes
      the warning and has a reasonable chance of getting things to actually
      work.
      
      Cc: stable@vger.kernel.org
      Link: https://unix.stackexchange.com/questions/59497/alsa-asoc-how-to-correctly-load-devices-drivers/62217#62217Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      ca32e0c4
    • Patrice Chotard's avatar
      ARM: dts: STi: Add gpio polarity for "hdmi,hpd-gpio" property · 7ac1f59c
      Patrice Chotard authored
      The GPIO polarity is missing in the hdmi,hpd-gpio property, this
      fixes the following DT warnings:
      
      arch/arm/boot/dts/stih410-b2120.dtb: Warning (gpios_property): hdmi,hpd-gpio property
      size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi@8d04000
      
      arch/arm/boot/dts/stih407-b2120.dtb: Warning (gpios_property): hdmi,hpd-gpio property
      size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi@8d04000
      
      arch/arm/boot/dts/stih410-b2260.dtb: Warning (gpios_property): hdmi,hpd-gpio property
      size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi@8d04000
      
      [arnd: marked Cc:stable since this warning shows up with the latest dtc
             by default, and is more likely to actually cause problems than the
             other patches from this series]
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarPatrice Chotard <patrice.chotard@st.com>
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      7ac1f59c
  4. 12 Jan, 2018 9 commits
  5. 07 Jan, 2018 2 commits
  6. 05 Jan, 2018 20 commits
    • Yixun Lan's avatar
      ARM64: dts: meson-axg: enable ethernet for A113D S400 board · f6f6ac91
      Yixun Lan authored
      This is tested in the S400 dev board which use a RTL8211F PHY,
      and the pins connect to the 'eth_rgmii_y_pins' group.
      Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
      Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      f6f6ac91
    • Yixun Lan's avatar
      ARM64: dts: meson-axg: add ethernet mac controller · 29390d27
      Yixun Lan authored
      Add DT info for the stmmac ethernet MAC which found in
      the Amlogic's Meson-AXG SoC, also describe the ethernet
      pinctrl & clock information here.
      Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
      Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      29390d27
    • Sunny Luo's avatar
      ARM64: dts: meson-axg: add the SPICC controller · 8ae4284e
      Sunny Luo authored
      Add DT info for the SPICC controller which found in
      the Amlogic's Meson-AXG SoC.
      Signed-off-by: default avatarSunny Luo <sunny.luo@amlogic.com>
      Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
      Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      8ae4284e
    • Yixun Lan's avatar
      ARM64: dts: meson-axg: enable IR controller · 7bd46a79
      Yixun Lan authored
      Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.
      Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
      Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      7bd46a79
    • Yixun Lan's avatar
      arm64: dts: meson-axg: switch uart_ao clock to CLK81 · 06b7a631
      Yixun Lan authored
      Switch the uart_ao pclk to CLK81 since the clock driver is ready.
      Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
      Reviewed-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
      Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
      06b7a631
    • Kevin Hilman's avatar
      Merge tag 'meson-clk-headers-for-v4.16-2' of git://github.com/BayLibre/clk-meson into v4.16/dt64 · fbaf05f4
      Kevin Hilman authored
      Add axg compatible string and device tree bindings
      
      * tag 'meson-clk-headers-for-v4.16-2' of git://github.com/BayLibre/clk-meson:
        clk: meson-axg: add clocks dt-bindings required header
        dt-bindings: clock: add compatible variant for the Meson-AXG
      fbaf05f4
    • Arnd Bergmann's avatar
      Merge tag 'mvebu-dt64-4.16-2' of git://git.infradead.org/linux-mvebu into next/dt · 8c11fcc2
      Arnd Bergmann authored
      Pull "mvebu dt64 for 4.16 (part 2)" from Gregory CLEMENT:
      
      The main change here are the series of commits doing the Armada 7K/8K
      CP110 DT de-duplication, they include the de-duplication itself and
      small fixes in the device tree files.
      
      Besides them there are 2 other patches:
       - One adding the crypto support for Armada 37xx SoCs
       - An other adding Ethernet aliases on A7K/A8K base boards
      
      * tag 'mvebu-dt64-4.16-2' of git://git.infradead.org/linux-mvebu:
        arm64: dts: marvell: add Ethernet aliases
        arm64: dts: marvell: replace cpm by cp0, cps by cp1
        arm64: dts: marvell: de-duplicate CP110 description
        arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K
        arm64: dts: marvell: use mvebu-icu.h where possible
        arm64: dts: marvell: fix compatible string list for Armada CP110 slave NAND
        arm64: dts: marvell: fix typos in comment describing the NAND controller
        arm64: dts: marvell: use lower case for unit address and reg property
        arm64: dts: marvell: fix watchdog unit address in Armada AP806
        arm64: dts: marvell: armada-37xx: add a crypto node
        ARM64: dts: marvell: armada-cp110: Fix clock resources for various node
        ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
      8c11fcc2
    • Arnd Bergmann's avatar
      Merge tag 'imx-dt64-4.16' of... · c503f594
      Arnd Bergmann authored
      Merge tag 'imx-dt64-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
      
      Pull "Freescale arm64 device tree updates for 4.16" from Shawn Guo:
      
       - LS1088A updates: add device support for DCFG, qoriq-mc, and USB.
       - Add power monitor device INA220 for ls208xa-rdb board.
      
      * tag 'imx-dt64-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
        arm64: dts: ls208xa: add power monitor chip node
        arm64: dts: ls1088a: Add USB support
        arm64: dts: ls1088a: add fsl-mc hardware resource manager node
        arm64: dts: ls1088a: Added dcfg node in ls1088a dtsi
      c503f594
    • Arnd Bergmann's avatar
      Merge tag 'imx-dt-4.16' of... · 7c179f9d
      Arnd Bergmann authored
      Merge tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
      
      Pull "i.MX device tree changes for 4.16" from Shawn Guo:
      
       - A few random updates for vf610-zii board: correct switch EEPROM size,
         enable edma1, correct GPIO expander interrupt, add PHYs for switch2
         device.
       - LS1021A device tree updates: add reboot and QSPI device nodes, label
         USB controllers, specify interrupt-affinity for PMU, fix TMR_FIPER1
         setting, enable esdhc device, add Moxa UC-8410A board support.
       - A bunch of patches from Fabio: fix reg - unit address mismatches,
         remove leading zero in unit address, move regulators out of
         simple-bus, move nodes with no reg property out of bus, remove extra
         clock cell, add missing phy-cells to usb-nop-xceiv, etc.
       - A couple series from Hummingboard developers: re-organise device tree
         files for better handling various board versions, and then add the
         new hummingboard2 board support on top of that.
       - Disable AC'97 input pins pad and add support for powering off for
         imx6qdl-udoo board.
       - Convert from fbdev to drm bindings for imx6sx-sdb and imx6sl-evk
         board.
       - Add device tree for Variscite DART-MX6 SoM and Carrier-board support.
       - Add new board support of TS-4600 and TS-7970 from Technologic
         Systems.
       - A series from Stefan to update imx7-colibri device tree and then add
         new version of Toradex Colibri iMX7D board with eMMC support.
       - Other random updates on various board support.
      
      * tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (126 commits)
        ARM: dts: imx7s: Avoid using label in unit address and reg
        ARM: dts: imx51-zii-rdu1: Add missing #phy-cells to usb-nop-xceiv
        ARM: dts: imx6qdl-hummingboard2: Remove leading zero in unit address
        ARM: dts: ls1021a: add support for Moxa UC-8410A open platform
        ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
        ARM: dts: vf610-zii-dev-rev-b: add PHYs for switch2
        ARM: dts: vf610-zii-dev-rev-b: fix interrupt for GPIO expander
        ARM: dts: vf610-zii-dev: enable edma1
        ARM: dts: ls1021a-twr: Remove extra clock cell
        ARM: dts: ls1021a-qds: Remove extra clock cell
        ARM: dts: imx53: add srtc node
        dt-bindings: imx-gpcv2: Fix the unit address
        ARM: imx: dts: Use lower case for bindings notation
        ARM: dts: imx6q-h100: use usdhc2 VSELECT
        ARM: dts: imx6sx: Add support for PCI power domain
        ARM: dts: imx6sx: Fix PCI non-prefetchable memory range
        ARM: dts: imx6qdl-hummingboard2: rename regulators to match schematic
        ARM: dts: imx6qdl-hummingboard2: add v1.5 som with eMMC
        ARM: dts: imx6qdl-hummingboard2: add v1.5 som without eMMC
        ARM: dts: imx6qdl-hummingboard2: add PWM3 support
        ...
      7c179f9d
    • Arnd Bergmann's avatar
      Merge tag 'aspeed-4.16-devicetree' of... · b55eb1ae
      Arnd Bergmann authored
      Merge tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
      
      Pull "ASPEED device tree updates for 4.16" from Joel Stanley:
      
      Clock driver support:
      
       Rework all platforms to use proper clock bindings. Linux should now boot
       upstream kernels on ast2400 and ast2500 platforms without out of tree
       patches.
      
      New systems:
      
       Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
       Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
       Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
      
       We also see updates to the Palmetto and Romulus systems to bring them in
       line with the functionality of those above.
      
       The systems take advantage of recently added drivers for LPC Snoop
       device and the PWM/Tachometer fan controller.
      
      OpenBMC flash layout:
      
       The flash layout used OpenBMC systems is added and the device trees now
       use it.
      
      * tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
        ARM: dts: aspeed-evb: Add unit name to memory node
        ARM: dts: aspeed-plametto: Add flash layout and fix memory node
        ARM: dts: aspeed-romulus: Update Romulus system
        ARM: dts: aspeed: Add Qanta Q71L BMC machine
        ARM: dts: aspeed: Add Ingrasys Zaius BMC machine
        ARM: dts: aspeed: Add Witherspoon BMC machine
        ARM: dts: aspeed: Sort ASPEED entries in makefile
        ARM: dts: Add OpenBMC flash layout
        ARM: dts: aspeed: Update license headers
        ARM: dts: aspeed: Remove skeleton.dtsi
        ARM: dts: aspeed: Add LPC Snoop device
        ARM: dts: aspeed: Add PWM and tachometer node
        ARM: dts: aspeed: Add clock phandle to GPIO
        ARM: dts: aspeed: Add flash controller clocks
        ARM: dts: aspeed: Add watchdog clocks
        ARM: dts: aspeed: Add MAC clocks
        ARM: dts: aspeed: Add proper clock references
        ARM: dts: aspeed: Add LPC and child devices
        dt-bindings: gpio: Add ASPEED constants
        dt-bindings: clock: Add ASPEED constants
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      b55eb1ae
    • Yan Markman's avatar
      arm64: dts: marvell: add Ethernet aliases · 474c5885
      Yan Markman authored
      This patch adds Ethernet aliases in the Marvell Armada 7040 DB, 8040 DB
      and 8040 mcbin device trees so that the bootloader setup the MAC
      addresses correctly.
      Signed-off-by: default avatarYan Markman <ymarkman@marvell.com>
      [Antoine: commit message, small fixes]
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      474c5885
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: replace cpm by cp0, cps by cp1 · 91f1be92
      Thomas Petazzoni authored
      In preparation for the introduction of more than 2 CPs in upcoming
      SoCs, it makes sense to move away from the "CP master" (cpm) and "CP
      slave" (cps) naming, and use instead cp0/cp1.
      
      This commit is the result of:
      
       sed 's%cpm%cp0g%' arch/arm64/boot/dts/marvell/*
       sed 's%cps%cp1g%' arch/arm64/boot/dts/marvell/*
      
      So it is a purely mechaninal change.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Suggested-by: default avatarHanna Hawa <hannah@marvell.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      91f1be92
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: de-duplicate CP110 description · 72a3713f
      Thomas Petazzoni authored
      One concept of Marvell Armada 7K/8K SoCs is that they are made of HW
      blocks composed of a variety of IPs (network, PCIe, SATA, XOR, SPI,
      I2C, etc.), and those HW blocks can be duplicated several times within
      a given SoC. The Armada 7K SoC has a single CP110 (so no duplication),
      while the Armada 8K SoC has two CP110. In the future, SoCs with more
      than 2 CP110s will be introduced.
      
      In current kernel versions, the master CP110 is described in
      armada-cp110-master.dtsi and the slave CP110 is described in
      armada-cp110-slave.dtsi. Those files are basically exactly the same,
      since they describe the same hardware. They only have a few
      differences:
      
       - Base address of the registers is different for the "config-space"
      
       - Base address of the PCIe registers, MEM, CONF and IO areas were
         different
      
       - Labels (and phandles pointing to them) of the nodes were different
         ("cpm" prefix in the master CP, "cps" prefix in the slave CP)
      
      This duplication issue has been discussed at the DT workshop [1] in
      Prague last October, and we presented on this topic [2]. The solution
      of using the C pre-processor to avoid this duplication has been
      validated by the people present in this DT workshop, and this patch
      simply implements what has been presented.
      
      We handle differences between the master CP and slave CP description
      using the C pre-processor, by defining a set of macros with different
      values armada-cp110.dtsi is included to instantiate one of the master
      or slave CP110.
      
      There are a few aspects that deserve additional explanations:
      
       - PCIe needs to be handled separately because it is not part of the
         config-space {...} node, since it has registers outside of the
         range covered by config-space {...}.
      
       - We need to defined CP110_BASE, CP110_PCIEx_BASE without 0x, because
         they are used for the unit address part of some DT nodes. But since
         they are also used for the "reg" property of the same nodes, we
         have an ADDRESSIFY() macro that prepends 0x to those values.
      
      We compared the resulting .dtb for armada-8040-db.dtb before and after
      this patch is applied, and the result is exactly the same, except for
      a few differences:
      
       - the SDHCI controller that was only described in the master CP110 is
         now also described in the slave CP110. Even though the SDHCI
         controller from the slave CP110 is indeed not usable (as it isn't
         wired to the outside world) it is technically part of the silicon,
         and therefore it is reasonable to also describe it to be part of
         the slave CP110. In addition, if we wanted to get this correct for
         the SDHCI controller, we should also do it for the NAND controller,
         for which the situation is even more complicated: in a single CP110
         configuration (Armada 7K), the usable NAND controller is in the
         master CP110, while in a dual CP110 configuration (Armada 8K), the
         usable NAND controller is in the slave CP110. Since that would add
         a lot of additional complexity for no good reason, and since the IP
         blocks are in fact really present in both CPs, we simply describe
         them in both CPs at the DT level.
      
       - the cp110-master and cp110-slave nodes are now named cpm and
         cps. We could have kept cp110-master and cp110-slave, but that
         would have required adding another CP110_xyz define, which didn't
         seem very useful.
      
      Note that this commit also gets rid of the armada-cp110-master.dtsi
      and armada-cp110-slave.dtsi files, as future SoCs will have more than
      2 CPs. Instead, we instantiate the CPs directly from the SoC-specific
      .dtsi files, i.e armada-70x0.dtsi and armada-80x0.dtsi.
      
      [1] https://elinux.org/Device_tree_kernel_summit_2017_etherpad
      [2] https://elinux.org/images/1/14/DTWorkshop2017-duplicate-data.pdf
      
      [gregory.clement@free-electrons.com: add back the "ARM64: dts: marvell:
      Fix clock resources for various node" commit]
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      72a3713f
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K · e2a393c6
      Thomas Petazzoni authored
      We are currently using the cell-index DT property to assign SPI bus
      numbers. This property is specific to the spi-orion driver, and
      requires each SPI controller to have a unique ID defined in the Device
      Tree.
      
      As we are about to merge armada-cp110-master.dtsi and
      armada-cp110-slave.dtsi into a single file, those cell-index
      properties that differ between the master CP110 and the slave CP110
      are a difference that would have to be handled.
      
      In order to avoid this, we switch to using the "aliases" DT node to
      assign a unique number to each SPI controller. This is more generic,
      and directly handled by the SPI core.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      e2a393c6
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: use mvebu-icu.h where possible · af9ad5bc
      Thomas Petazzoni authored
      Back when the ICU Device Tree binding was introduced, we could not use
      mvebu-icu.h from the Device Tree files, because the DT files and
      mvebu-icu.h were following different merge routes towards Linus
      tree. Now that both have been merged, we can switch the Marvell Armada
      CP110 Device Tree files to use the mvebu-icu.h header instead of
      duplicating the ICU_GRP_NSR definition.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      af9ad5bc
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: fix compatible string list for Armada CP110 slave NAND · 4003e96a
      Thomas Petazzoni authored
      The Armada CP110 slave NAND controller Device Tree description lists
      the compatible string in the wrong order: marvell,armada-8k-nand
      should come first. This commit alignes the slave CP110 description
      with the master CP110 description from that respect.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      4003e96a
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: fix typos in comment describing the NAND controller · ab8637ed
      Thomas Petazzoni authored
      Fix the same typo duplicated in both master and slave version of
      armada-cp110-*.dtsi file: s/limiation/limitation/.
      
      [gregory.clement@free-electrons.com: add the commit log]
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      ab8637ed
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: use lower case for unit address and reg property · 123c27c8
      Thomas Petazzoni authored
      This fixes the following DTC warning:
      
        <stdout>: Warning (simple_bus_reg): Node /ap806/config-space@f0000000/thermal@6f808C simple-bus unit address format error, expected "6f808c"
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      123c27c8
    • Thomas Petazzoni's avatar
      arm64: dts: marvell: fix watchdog unit address in Armada AP806 · d3ce06b4
      Thomas Petazzoni authored
      This fixes the following DTC warning:
      
        Warning (simple_bus_reg): Node /ap806/config-space@f0000000/watchdog@600000 simple-bus unit address format error, expected "610000"
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      d3ce06b4
    • Antoine Tenart's avatar
      arm64: dts: marvell: armada-37xx: add a crypto node · e2707a28
      Antoine Tenart authored
      This patch adds a crypto node describing the EIP97 engine found in
      Armada 37xx SoCs. The cryptographic engine is enabled by default.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
      Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
      e2707a28