I found that functions in timer.c and rcupdate.c are calling
> tasklet_init() for all CPUs before APs start running.  For this to work,
the per-CPU pages must be allocated at BSP-initialization time.  The patch
below does that.

/proc/kcore is what you need, but it is broken on ia64 (and
has been since the dawn of time for access to region 5) because
it assumes that all kernel virtual addresses are above PAGE+AF8-OFFSET.
This isn't true on ia64, VMALLOC+AF8-START is smaller than PAGE+AF8-OFFSET.

Attached is a patch (applies to 2.4.19 and to 2.5.39) that fixes the
assumption.  After applying you'll be able to use:

        +ACM- gdb vmlinux /proc/kcore

and happily ask gdb to examine addresses in region 5.

Here is the latest discontigmem patch for ia64 against
2.5.39 + ia64 patch + Erich's acpi_numa patch.

    	use CONFIG_NUMA without CONFIG_ACPI_NUMA.

please find attached a first attempt to implement the topology.h
macros/routines for IA64. We need this for the NUMA scheduler setup.

into tiger.hpl.hp.com:/data1/bk/lia64/to-linus-2.5

If CONFIG_HUGETLB is not defined, you get a RAW dependency clash in
ivt.S. (2.5.39)

The following patch fixes ia64 kernel dump on Hot-Add of PCI bridge cards.

pcibios_fixup_bus();
pci_do_scan_bus();
on Hot-Add of bridge adapter;

Here's a small C99 designated initializer patch for the subject file.
The patch is against 2.5.43.

One more bug fix for IA32 exception handler. IA32 exception handler is
not clearing the exception status, before calling the user signal handler
routine.

The IA32 fpstate information is not getting saved/restored during IA32
exception handling. The issue was first observed due to an IA32 binary
(which runs fine on IA32 system), failing on Itanium based system. The
binary was trying to access the fpstate information during an FPE and got a
SEGV, as the fpstate was not getting saved and the sigcontext->fpstate
pointer was NULL.

I found the meaning of fpswa version major and minor is opposite.

The problem was that when the refcount hit 0, it was unconditionally
assuming that it had been added, which is wrong.  The patch below
corrects that, and fixes the Oops when loading the floppy driver.

into home.transmeta.com:/home/torvalds/v2.5/linux

into home.transmeta.com:/home/torvalds/v2.5/linux

Several ports (x86-64,ppc64,sparc64) which do 32bit ioctl emulation
have functions for drivers to let them define their own translation
handlers. So far it was a bit complicated to use because there
was no standard include file that declares the prototypes for this
stuff. Then drivers and other subsystems can start to declare their own
ioctl translation handlers.

This patch add include/linux/ioctl32.h to fix this.

The actual implementation is in arch specific code. It has been coordinated
with DaveM and Anton.

This patch is needed for the x86-64 merge I sent in separate mail.

There is currently no preprocessor symbol that the drivers can test
to see if they should use this. So far they have to check arch symbols.
This will be fixed later when all 64bit ports that need it add the dynamic
ioctl registration API too (that's ia64,s390x,mips64)

This fixes a few files that got lost with the last merge and merges
with 2.5.43/i386.  Only changes architecture specific files.

It depends on one other patch (for linux/ioctl32.h) which I'm sending
separately.

Changes:
- Include missing files (pageattr.c) and Makefile changes
- Update IA32 subsystem. Various small fixes and a big merge
  with sparc64.
- Change HZ to 1000
- Merge some of the 2.5.43/i386 profiling changes. No full oprofile yet.
- Fix many warnings
- Update defconfig
- Various other smaller cleanups and bugfixes.

        * switched to private queues
        * set ->queue

into home.transmeta.com:/home/torvalds/v2.5/linux

        * switched to private queues
        * set ->queue and ->private_data
        * switched to use of ->bd_disk/->rq_disk
        * merged private blocksize, etc. arrays into nbd_dev[]
        * cleaned up

        * switched to private queues
        * set ->queue and ->private_data
	* switched to use of ->rq_disk

	sbpcd.c: removes bogus duplicate definition of sbpcd_lock, use of
CURRENT (we are using private queue) and call of invalidate_buffers() in
->media_changed() (caller does it itself).  That went in a changeset from
davej - looks like a merge problem...
	sr.c: braino in ifdefed printk - s/disk/cd->disk/.  Thanks to jejb
for spotting that one...

into home.transmeta.com:/home/torvalds/v2.5/linux

into home.transmeta.com:/home/torvalds/v2.5/linux

into nuts.ninka.net:/home/davem/src/BK/sparc-2.5

This adds a set of list macros that make handling of list protected
by RCU simpler. The interfaces added are -

list_add_rcu
list_add_tail_rcu
	- Adds an element by taking care of memory barrier (wmb()).

list_del_rcu
	- Deletes an element but doesn't re-initialize the pointers in
	  the element for supporting RCU based traversal.

list_for_each_rcu
__list_for_each_rcu
	- Traversal of RCU protected list - takes care of memory barriers
	  transparently.

This first RCU helper patch adds a read_barrier_depends() primitive
to all archs which is NOP for archs that doesn't require an rmb()
for data dependent reads when writes are ordered using a wmb().
In reality, only alpha requires an rmb(), the rest are NOPs.
It is likely to be necessary in most situations that would use RCU.
Please apply.

 Description :

Sometime ago, during a discussion on lock-free lookups, it was
agreed that an additional memory barrier interface,
read_barrier_depends() that is lighter than an rmb(),
is necessary to make sure that data-dependent reads are not
re-ordered over this barrier. For many processors, data-dependency
enforces order, so this interface is a NOP, but for those that don't
(like alpha), it can be a rmb().

For example, the following code would force ordering (the initial
value of "a" is zero, "b" is one, and "p" is "&a"):

    CPU 0                           CPU 1

    b = 2;
    memory_barrier();
    p = &b;                         q = p;
                                    read_barrier_depends();
                                    d = *q;

because the read of "*q" depends on the read of "p" and these
two reads should be separated by a read_barrier_depends().  However,
the following code, with the same initial values for "a" and "b":

    CPU 0                           CPU 1

    a = 2;
    memory_barrier();
    b = 3;                          y = b;
                                    read_barrier_depends();
                                    x = a;

does not enforce ordering, since there is no data dependency between
the read of "a" and the read of "b".  Therefore, on some CPUs, such
as Alpha, "y" could be set to 3 and "x" to 0.  rmb()
needs to be used here, not read_barrier_depends().

The original discussion can be found at -
http://marc.theaimsgroup.com/?t=100259422200002&r=1&w=2

Explanation of the need for read_barrier_depends()
can be found at http://lse.sf.net/locking/wmbdd.html