- 17 Sep, 2009 1 commit
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Mark Brown authored
Set up some IRQ space to allocation to off-SoC interrupt controllers. Default this to 16 IRQs. If individual boards require more than this then they will need to modify this file so allocating a small number helps reduce the number of modifications required. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by:
Ben Dooks <ben-linux@fluff.org>
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- 16 Aug, 2009 10 commits
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Ben Dooks authored
The show_fiq_list() call in arch/arm/kernel/irq.c currently depends on CONFIG_ARCH_ACORN, but this is not the only architecture that supports the usage of FIQ. Change to calling this if CONFIG_FIQ is set (which is what arch/arm/kernel/fiq.c is built by). Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
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Ben Dooks authored
Currently the S5PC100 does not define S3C_PA_NAND, leaving the NAND device definitions in arch/arm/plat-s3c/dev-nand.c unbuildable. Add a KConfig entry to select whether this is built. As backwards compatibility, both the S3C24XX and S3C64XX define the new configuration in their main Kconfig files until better support for basing this selection on a per-machine basis can be sorted out. Signed-off-by: -
Byungho Min authored
SMDKC100 board support. The board can be obtained from meritech (http://www.meritech.co.kr) Signed-off-by:
Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: fixup subject and description] Signed-off-by:
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Byungho Min authored
S5PC100 is a new SoC with ARM coretex-A8 and numerous peripherals. This SoC is successor of S3C64XX. S5PC100 has peripherals which are still similar to S3C families so some drivers in "arch/arm/plat-s3c" can be shared. S5PC100 specific drivers will be added in "arch/arm/plat-s5pcxx" or "arch/arm/mach-s5pc100" Signed-off-by:
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Byungho Min authored
S5PC100 has 4 PLLs (APLL,MPLL,EPLL,HPLL) and 3 clock domains. Clock scheme is implemented here. Signed-off-by:
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Byungho Min authored
S5PC100 has 3 VICs(Vectored Interrupt Controller). The VICs come from S3C64xx series, so the driver source code can be shared with S3C families. The S5PC100 has 3 VICs while S3C64xx has only 2. Signed-off-by:
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Byungho Min authored
S5PC100 has more GPIO group then previous one. It has 34 groups of GPIO, while S3C6410 has 17 groups. For now, only header files are written. Signed-off-by:
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Byungho Min authored
Signed-off-by:
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Byungho Min authored
Serial driver of S5PC100 is the same as S3C6400, so S5PC100 shares the serial driver with S3C6400. Uart driver is copied from plat-s3c64xx to plat-s5pc1xx, as I do not use plat-s3c64xx directory. Signed-off-by:
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Byungho Min authored
S5PC100's the physical IO space starts at 0xe000"0000. To maximize space for vmalloc, the virtual IO space starts at 0xf400"0000 as same as other samsung CPUs(s3c24xx and s3c64xx) do. Signed-off-by:
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- 14 Aug, 2009 10 commits
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
Add configuration callback for SPI bus 1 on GPD[8..10] and ensure the correct GPIO configuration register definitions in regs-gpio.h Signed-off-by:
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Mark Brown authored
Move the definition of the "generic" IRQ in the process. Signed-off-by:
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Ben Dooks authored
Add support for routing an IRQ from the normal ARM IRQ mechanism to the FIQ input of the processor. Note, also fix a bug where the init_FIQ() function has not been called when CONFIG_FIQ is enabled. Signed-off-by; Ben Dooks <ben@simtec.co.uk> Signed-off-by: -
Mark Brown authored
Allowing us to make the Kconfig a little bit saner. Signed-off-by:
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- 13 Aug, 2009 4 commits
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Mark Brown authored
Signed-off-by:
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Mark Brown authored
Signed-off-by:
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Matt Hsu authored
Add proper uartcfg for UART port 2,3 and tidy it up on SMDK6410. Signed-off-by:
Matt Hsu <matt@0xlab.org> Signed-off-by:
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Marek Szyprowski authored
Make ncp_iodesc struct static to clean a public namespace a bit and move it to __initdata section to save memory a bit. Reviewed-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
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- 30 Jul, 2009 15 commits
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Peter Korsgaard authored
The s3c64xx devices use the same hardware core as s3c24xx, so move the timer/pwm handling to plat-s3c so it can be used by both. Signed-off-by:
Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by:
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Peter Korsgaard authored
Move the s3c_device_nand platform device from plat-s3c24xx to plat-s3c, now that the nand driver also support the s3c64xx devices. Signed-off-by:
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Peter Korsgaard authored
Add support for the Airgoo HMT (home media terminal) device. The HMT is a tablet device with a s3c6410, a 7" LCD and a number of peripheral connections. For more details of the hardware specs, see: http://article.gmane.org/gmane.linux.debian.devel.embedded/4307Signed-off-by:
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Ben Dooks authored
Add debugfs support for the cpufreq driver to allow information about the system state to be exported to the user. Signed-off-by:
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Ben Dooks authored
Add documentation for the S3C24XX style CPUFREQ driver. Signed-off-by:
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Ben Dooks authored
Add armclk for use with the cpufreq support and anything else that may want it. This clock is just a direct descendant of fclk. Signed-off-by:
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Ben Dooks authored
Add board support for CPUFREQ with the Simtec BAST board registering the necessary information with the core. Signed-off-by:
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Ben Dooks authored
Add a sysdev S3C2410A sysdev to allow the differentiation of the S3C2410A from the S3C2410. This is needed for the CPUFREQ code to enable the extra features and update cpu specific information. Signed-off-by:
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Ben Dooks authored
Add IO bank timing support for S3C2412/S3C2443. Signed-off-by:
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Ben Dooks authored
Update the mapping of the memory controler registers and add the missing definitions of the register block for the SSMC. The register contents definitions can be found in the pl093 header. Signed-off-by:
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Ben Dooks authored
Currently map-base.h defines the main virtual address mappings made for all the support S3C SoC series, but does not then define any base for per-cpu mappings to be made from. Add S3C_ADDR_CPU() macro to define an virtual address as an offset from the last of the core mappings. Signed-off-by:
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Ben Dooks authored
Header to define the standard registers for an PL093 SSMC memory controller. Signed-off-by:
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Ben Dooks authored
Add core support for frequency scaling on the S3C2412 SoC. Signed-off-by:
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Ben Dooks authored
Add CPU frequency scalling support to the Simtec Osiris. Signed-off-by:
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Ben Dooks authored
Add entries to select the crystal to select for each different supported board. This information is then available for anything else requiring this, such as the CPUFreq PLL tables. Signed-off-by:
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