- 21 May, 2012 15 commits
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John Crispin authored
When running on a FALC-ON SoC, we need to check the bootstrap options to see if NOR is available. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3815/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Adds bindings for OF and make use of module_platform_driver for lantiq based socs. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3811/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Add support for OF. We also apply the following small fixes * reduce boiler plate by using devm_request_and_ioremap * sane error path for the clock * move LTQ_RST_CAUSE_WDTRST to a soc specific header file * add a message to show that the driver loaded Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Wim Van Sebroeck <wim@iguana.be> Cc: linux-watchdog@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3810/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Add devicetree and handling for our new clkdev clocks. The patch is rather straightforward. .of_match_table is set and the 3 irqs are now loaded from the devicetree. This series converts the lantiq target to clkdev amongst other things. The driver needs to handle two clocks now. The fpi bus clock used to derive the divider and the clock gate needed on some socs to make the secondary port work. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Alan Cox <alan@linux.intel.com> Cc: linux-serial@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3809/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Implements OF support and add code to load custom properties from the DT. The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a peripheral controller used to drive external shift register cascades. At most 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem to drive the 2 LSBs of the cascade automatically. Newer socs are also able to automatically drive some pins via the internal PHYs. The driver currently only supports output functionality. Patches for the input feature found on newer generations of the soc will be provided in a later series. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3839/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Implements OF support and convert to of_mm_gpio. By attaching hardware latches to the External Bus Unit (EBU) on Lantiq SoC, it is possible to create output only gpios. This driver configures a special memory address, which when written to, outputs 16 bit to the latches. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3840/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Move the 2 drivers from arch/mips/lantiq/xway/ to the subsystem and make them buildable. The following 2 patches will convert the drivers to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3838/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Implement support for OF inside the lantiq PCI driver. The patch also splits pcibios_plat_dev_init and pcibios_map_irq out into their own file to accomodate coexistance with the upcoming pcie driver. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3806/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Add code to make the dma driver load as a platform device from the devicetree. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3824/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
This patch unifies all clock generation and gating code into one file. All drivers will now be able to request their clocks via their device. This patch also adds support for the clockout feature, which allows clock generation on external pins. Support for COMMON_CLK will be provided in the next series. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3804/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
As part of the conversion to OF we also implement pinctrl drivers. Previously we used ltq_gpio_request() to set pinmuxing. This is now obselete and we can hence drop the function. Additionally we remove gpio_to_irq() from the gpio driver and move it to a header file. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3801/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Add support for irq_domain on lantiq socs. The conversion is straight forward as the ICU found inside the socs allows the usage of irq_domain_add_linear. Harware IRQ 0->7 are the generic MIPS IRQs. 8->199 are the Lantiq IRQ Modules. Our irq_chip callbacks need to substract 8 (MIPS_CPU_IRQ_CASCADE) from d->hwirq to find out the correct offset into the Interrupt Modules register range. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3802/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Activate USE_OF, add a sample DTS file and convert the core soc code to OF. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3803/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Before we are able to add OF support, we really want to drop all the bloat needed to register all the platform devices. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3800/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
On MIPS we want to call of_irq_map_pci from inside arch/mips/include/asm/pci.h:extern int pcibios_map_irq( const struct pci_dev *dev, u8 slot, u8 pin); For this to work we need to change several functions to const usage. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-pci@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-mips@linux-mips.org Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3710/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- 15 May, 2012 14 commits
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John Crispin authored
Add 2 new soc specifc handlers and remove superflous pr_notice calls. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3705/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Add the soc ids for additional xway socs. The patch also merges the amazon_se code with the other socs. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3707/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Thomas Langer authored
The code tested if the KSEG1 mapped address of argv was != 0. We need to use CPHYSADDR instead to make the conditional actually work. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3722/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Thomas Langer authored
The code was using a 32bit write operations in the early_printk code. This resulted in 3 zero bytes also being written to the serial port. This patch changes the memory access to 8bit. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3721/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Add IPI handlers to the interrupt code. This patch makes MIPS_MT_SMP work on lantiq socs. The code is based on the malta implementation. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3704/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
This patch sets the performance counters irq on Lantiq SoCs. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3720/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Due to missing brackets, the irq modules were not properly reset on boot. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3719/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Trivial fix that removes an orphaned prototype. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3701/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
For clock device lookup tables to work on MIPS, we need to provide this architecture specific header file. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3700/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored
Call early_init_devtree from inside __dt_setup_arch to allow parsing of the chosen node. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3718/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Add __dt_setup_arch() that can be called to load a builtin DT. Additionally we add a macro to allow loading a specific symbol from the __dtb_* section. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3715/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Without I/O ports won't work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3697/
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John Crispin authored
Implement pci_load_of_ranges on MIPS. Due to lack of test hardware only 32bit bus width is supported. This function is based on pci_process_bridge_OF_ranges from powerpc. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3729/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Felix Fietkau authored
Make the oprofile code use the performance counters irq. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3723/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- 13 May, 2012 3 commits
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Linus Torvalds authored
.. and this should hopefully be the last -rc before final 3.4 release.
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM: SoC fixes from Olof Johansson: "I was hoping to be done with fixes for 3.4 but we got two branches from subarch maintainers the last couple of days. So here is one last(?) pull request for arm-soc containing 7 patches: - Five of them are for shmobile dealing with SMP setup and compile failures - The remaining two are for regressions on the Samsung platforms" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1 ARM: EXYNOS: use s5p-timer for UniversalC210 board ARM / mach-shmobile: Invalidate caches when booting secondary cores ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix ARM / mach-shmobile: r8a7779 SMP TWD boot regression fix ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helper ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helper
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git://git.secretlab.ca/git/linux-2.6Linus Torvalds authored
Pull a few more GPIO bug fixes from Grant Likely: "Oops, missed a couple. Here's an updated pull req for GPIO" A set of PCH bug fixes, and one patch to fix up compile warnings * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6: gpio/exynos: Fix compiler warnings when non-exynos machines are selected gpio: pch9: Use proper flow type handlers
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- 12 May, 2012 8 commits
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Olof Johansson authored
Merge branch 'v3.4-samsung-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes * 'v3.4-samsung-fixes-5' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1 ARM: EXYNOS: use s5p-timer for UniversalC210 board
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Kukjin Kim authored
It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Marek Szyprowski authored
Commit 069d4e74 ("ARM: EXYNOS4: Remove clock event timers using ARM private timers") removed support for local timers and forced to use MCT as event source. However MCT is not operating properly on early revision of EXYNOS4 SoCs. All UniversalC210 boards are based on it, so that commit broke support for it. This patch provides a workaround that enables UniversalC210 boards to boot again. s5p-timer is used as an event source, it works only for non-SMP builds. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesasOlof Johansson authored
By Guennadi Liakhovetski (2) and others via Rafael J. Wysocki: "[...] urgent fixes for Renesas ARM-based platforms. Four of these commits are fixes of regressions new in 3.4-rc and the last one is necessary for SMP to work on those systems in general." * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas: ARM / mach-shmobile: Invalidate caches when booting secondary cores ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix ARM / mach-shmobile: r8a7779 SMP TWD boot regression fix ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helper ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helper
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Magnus Damm authored
Make sure L1 caches are invalidated when booting secondary cores. Needed to boot all mach-shmobile SMP systems that are using Cortex-A9 including sh73a0, r8a7779 and EMEV2. Thanks to imx and tegra guys for actual code. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Kuninori Morimoto authored
Fix SMP TWD boot regression on sh73a0 based platforms caused by: 4200b16d ARM: shmobile: convert to twd_local_timer_register() interface After the merge of the above commit it has been impossible to boot sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The kernel crashes at smp_init_cpus() timing which is before the console has been initialized, so to the user this looks like a kernel lock up without any particular error message. This patch fixes the regression on sh73a0 by moving the TWD registration code from smp_init_cpus() to sys_timer->init() time. This patch removed shmobile_twd_init() which is no longer needed Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Magnus Damm authored
Fix SMP TWD boot regression on r8a7779 based platforms caused by: 4200b16d ARM: shmobile: convert to twd_local_timer_register() interface After the merge of the above commit it has been impossible to boot r8a7779 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The kernel crashes at smp_init_cpus() timing which is before the console has been initialized, so to the user this looks like a kernel lock up without any particular error message. This patch fixes the regression on r8a7779 by moving the TWD registration code from smp_init_cpus() to sys_timer->init() time. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Guennadi Liakhovetski authored
This also fixes the following modular mmc build failure: arch/arm/mach-shmobile/built-in.o: In function `mackerel_sdhi0_gpio_cd': pfc-sh7372.c:(.text+0x1138): undefined reference to `mmc_detect_change' on this platform by eliminating the use of an inline function, which calls into the mmc core. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: Simon Horman <horms@verge.net.au> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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