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M2 adapters
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nexedi
M2 adapters
Commits
faadc6df
Commit
faadc6df
authored
Nov 28, 2024
by
Thomas Gambier
🚴🏼
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faadc6df
# M2 to ethernet board design on kicad 8
This repository holds the hardware for M2 to ethernet board w
hich has a intel I225
.
This repository holds the hardware for M2 to ethernet board w
ith a intel I225 controler with TSN feature
.
This board contains :
*
a I225 : KTI225IT S LNNL from intel
-
advance feature : Time Sensitive Networking (TSN) –
*
a
n 8-pin connector to manage an Ethernet network (need specific cable adapter
to connect Ethernet network)
*
a PPS output on UFL connector
Release 1 : not working
Release 1
: fixed bugs
*
fix signal inversion: PCIE_TX_N with PCIE_TX_P
*
fix Intel reference I225 with advance feature to to handle TSN
*
remove from design solder paste from connector
s
*
add solder paste on ethernet transformer pads
*
remove gnd plane under ethernet transformer
Release 2 : add ons
*
PCIE SM bus is now connected I225 (normally not necessary)
*
The flash can be programmed via an external SPI programmer.
-
4 resistors need to be removed to operate this programming
-
SPI bus connection and supply are on 1mm test point
Release 2 published on 28.11.2024
what remains to be done :
*
complete fonctionnel schematic rewiew
*
check bom (possibly reduce bom by grouping components)
*
generate fab files
*
a I225 : KTI225IT S LNNL from intel
–
advance feature : Time Sensitive Networking (TSN) –
*
a
8-pin connector (not RJ45 !) to connect an Ethernet cable
*
a PPS output on UFL connector
Release 1
(July 2024) : first version (not working)
Release 2 (Nov 2024) :
*
fixed bug
s
+
fix signal inversion: PCIE_TX_N with PCIE_TX_P
+
fix Intel reference I225 with advance feature to to handle TSN
+
remove from design solder paste from connectors
+
add solder paste on ethernet transformer pads
+
remove gnd plane under ethernet transformer
*
addons
+
PCIE SM bus is now connected I225 (normally not necessary)
+
The flash can be programmed via an external SPI programmer:
-
4 resistors need to be removed to operate this programming
-
SPI bus connection and supply are on 1mm test point
*
what remains to be done :
*
complete fonctionnel schematic rewiew
*
check bom (possibly reduce bom by grouping components)
*
generate fab files
...
...
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