Commit 8023fc6d authored by Sergey Vojtovich's avatar Sergey Vojtovich

MDEV-17441 - InnoDB transition to C++11 atomics

Almost trivial trx_sys_t::m_rw_trx_hash_version transition. Since C++11
doesn't seem to allow mixed (atomic and non-atomic) access to atomic
variables, we have to perform atomic initialisation.
parent 90377b80
......@@ -801,7 +801,7 @@ class trx_sys_t
@sa assign_new_trx_no()
@sa snapshot_ids()
*/
MY_ALIGNED(CACHE_LINE_SIZE) trx_id_t m_rw_trx_hash_version;
MY_ALIGNED(CACHE_LINE_SIZE) std::atomic<trx_id_t> m_rw_trx_hash_version;
/**
......@@ -982,7 +982,8 @@ class trx_sys_t
/** Initialiser for m_max_trx_id and m_rw_trx_hash_version. */
void init_max_trx_id(trx_id_t value)
{
m_max_trx_id= m_rw_trx_hash_version= value;
m_max_trx_id= value;
m_rw_trx_hash_version.store(value, std::memory_order_relaxed);
}
......@@ -1163,18 +1164,14 @@ class trx_sys_t
/** Getter for m_rw_trx_hash_version, must issue ACQUIRE memory barrier. */
trx_id_t get_rw_trx_hash_version()
{
return static_cast<trx_id_t>
(my_atomic_load64_explicit(reinterpret_cast<int64*>
(&m_rw_trx_hash_version),
MY_MEMORY_ORDER_ACQUIRE));
return m_rw_trx_hash_version.load(std::memory_order_acquire);
}
/** Increments m_rw_trx_hash_version, must issue RELEASE memory barrier. */
void refresh_rw_trx_hash_version()
{
my_atomic_add64_explicit(reinterpret_cast<int64*>(&m_rw_trx_hash_version),
1, MY_MEMORY_ORDER_RELEASE);
m_rw_trx_hash_version.fetch_add(1, std::memory_order_release);
}
......
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