This is the repository containing the sources for the low power radio PCB used inside the ORS.
This is the repository containing the sources for the low power radio PCB used inside the ORS. This PCB is used in conjuction with Amarisoft software to do a all-in-one 4G/5G base station.
## Ownership
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The sources are under "CERN Open Hardware Licence Version 2 - Weakly Reciprocal" license (https://ohwr.org/cern_ohl_w_v2.txt), see [LICENSE](LICENSE) and [COPYRIGHT](COPYRIGHT).
## Specifications
* 40MHz width max (uses an AD9361)
* powered through PoE (supports 24V to 55V), minimum 50W
* connected through miniPCIe to the PC
* MIMO 2x2
* amplification included (2x0.5W)
* supports bands 38, 42 and 43 with the same PCB (3 different versions of the BOM)
## External components
In order to do a full functional product, you will need all those components:
* FPGA firmware: you can get either from RapidSpace or from Amarisoft
* SBC (Single Board Computer): you can get it from Commell (http://www.commell.com.tw/)
* Case: you can get an aluminium case from Rapid.Space
* Power Injector: you can use a Ubiquiti Networks 60W (https://eu.store.ui.com/collections/operator-airmax-and-ltu-accessories/products/poe-injector-50v-60w-airfiber-poe)
## Files
*`LowPwrLTE`: directory containing the Altium sources files and project files
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**Why do you use Altium (proprietary software) for Open Hardware project?*
The project is using Altium to design the PCB because at the beginning of the project (2016) the existing open source PCB designer were not able to handle 8 layers PCB with some constraints on impedance. The goal is to move the project to KiCad EDA (https://www.kicad.org/)
**How to use this PCB?*
You need a PC with miniPCIe connector running Amarisoft enodeB/gnodeB software. The PCB will be seen as a regular SDR board (you need to insmod kernel driver sdr, see Amarisoft documentation).
**How to flash the FPGA?*
We have a convenient FTDI chip on the PCB providing a JTAG connection to the Xilinx. The FTDI chip is seen as a regular USB device though the PCIe connection. You can use openocd with ftdi support to access the FPGA.
The flash (S25FL256LAGNFM010) is connected only in SPI to the Xilinx FPGA. So you will need a proxy bitstream (forwarding from JTAG to SPI) to write the bitstream in the flash.
## Pictures
![top view of the PCB](pcb_top.jpeg)
![bottom view of the PCB](pcb_bottom.jpeg)
![pcb view inside the aluminium case](pcb_in_case.jpeg)