• Linus Walleij's avatar
    drm/pl111: Support the Versatile Express · ca454bd4
    Linus Walleij authored
    The Versatile Express uses a special configuration controller
    deeply embedded in the system motherboard FPGA to multiplex the
    two to three (!) display controller instances out to the single
    SiI9022 bridge.
    
    Set up an extra file with the logic to probe to the FPGA mux
    register on the system controller bus, then parse the device
    tree to see if there is a CLCD or HDLCD instance on the core
    tile (also known as the daughterboard) by looking in the
    root of the device tree for compatible nodes.
    
    - If there is a HDLCD on the core tile, and there is a driver
      for it, we exit probe and deactivate the motherboard CLCD.
      We do not touch the DVI mux in this case, to make sure we
      don't break HDLCD.
    
    - If there is a CLCD on both the motherboard and the core tile
      (only the CA9 has this) the core tile CLCD takes precedence
      and get muxed to the DVI connector.
    
    - Only if there is no working graphics on the core tile, the
      motherboard CLCD is probed and muxed to the DVI connector.
    
    Core tile graphics should always take precedence as it can
    address all memory and is also faster, however the motherboard
    CLCD is good to have around for diagnostics and testing.
    
    It is possible to test the motherboard CLCD by setting the
    status = "disabled" property on the core tile CLCD or
    HDLCD.
    
    Scale down the Versatile Express to 16BPP so we can support a
    1024x768 display despite the bus bandwidth restrictions on this
    platform. (The motherboard CLCD supports slightly lower
    resolution.)
    
    Cc: Liviu Dudau <liviu.dudau@arm.com>
    Cc: Pawel Moll <pawel.moll@arm.com>
    Acked-by: default avatarEric Anholt <eric@anholt.net>
    Tested-by: default avatarRobin Murphy <robin.murphy@arm.com>
    Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
    Link: https://patchwork.freedesktop.org/patch/msgid/20180502134719.8388-1-linus.walleij@linaro.org
    ca454bd4
pl111_vexpress.c 3.17 KB