Commit 55ec7679 authored by Alex Hung's avatar Alex Hung Committed by Alex Deucher

drm/amd/display: Limit array index according to architecture

[WHY & HOW]
ctx->architecture determine array sizes of ODMMode and DPPPerSurface
arrays to __DML2_WRAPPER_MAX_STREAMS_PLANES__ or __DML_NUM_PLANES__,
and these array index should be checked before used

This fixes 2 OVERRUN issues reported by Coverity.
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Acked-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Signed-off-by: default avatarAlex Hung <alex.hung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ae13c8a5
......@@ -1031,6 +1031,7 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
unsigned int stream_disp_cfg_index;
unsigned int plane_disp_cfg_index;
unsigned int disp_cfg_index_max;
unsigned int plane_id;
unsigned int stream_id;
......@@ -1060,6 +1061,7 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
} else {
ODMMode = (unsigned int *)disp_cfg->hw.ODMMode;
DPPPerSurface = disp_cfg->hw.DPPPerSurface;
disp_cfg_index_max = __DML_NUM_PLANES__;
}
for (stream_index = 0; stream_index < state->stream_count; stream_index++) {
......@@ -1067,6 +1069,8 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
stream_id = state->streams[stream_index]->stream_id;
stream_disp_cfg_index = find_disp_cfg_idx_by_stream_id(mapping, stream_id);
if (stream_disp_cfg_index >= disp_cfg_index_max)
continue;
if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_bypass) {
scratch.odm_info.odm_factor = 1;
......@@ -1110,7 +1114,7 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s
// Setup mpc_info for this plane
scratch.mpc_info.prev_odm_pipe = NULL;
if (scratch.odm_info.odm_factor == 1) {
if (scratch.odm_info.odm_factor == 1 && plane_disp_cfg_index < disp_cfg_index_max) {
// If ODM combine is not inuse, then the number of pipes
// per plane is determined by MPC combine factor
scratch.mpc_info.mpc_factor = DPPPerSurface[plane_disp_cfg_index];
......
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