drm/amd/display: Limit array index according to architecture
[WHY & HOW] ctx->architecture determine array sizes of ODMMode and DPPPerSurface arrays to __DML2_WRAPPER_MAX_STREAMS_PLANES__ or __DML_NUM_PLANES__, and these array index should be checked before used This fixes 2 OVERRUN issues reported by Coverity. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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