Skip to content

L
linux
Commit 71363a48 authored by Alexander Stein's avatar Alexander Stein Committed by Shawn Guo
Browse files
Options

arm64: dts: freescale: add initial device tree for TQMa8Xx 

This adds support for TQMa8XQP and TQMa8XDP modules on MBa8Xx board.
As the only difference is the mounted SoC, both module and baseboard
files are shared.
Signed-off-by: default avatarAlexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 95549bba
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 869 additions and 0 deletions
arch/arm64/boot/dts/freescale/Makefile
View file @ 71363a48
......@@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-8-x.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-tqmlx2160a-mblx2160a-14-7-x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
......@@ -199,6 +200,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
......
arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdp-mba8xx.dts 0 → 100644
View file @ 71363a48
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
/dts-v1/;
#include "imx8dxp-tqma8xdp.dtsi"
#include "mba8xx.dtsi"
/ {
model = "TQ-Systems i.MX8DXP TQMa8XDP on MBa8Xx";
compatible = "tq,imx8dxp-tqma8xdp-mba8xx", "tq,imx8dxp-tqma8xdp", "fsl,imx8dxp";
};
arch/arm64/boot/dts/freescale/imx8dxp-tqma8xdp.dtsi 0 → 100644
View file @ 71363a48
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
#include "imx8dxp.dtsi"
#include "tqma8xx.dtsi"
/ {
model = "TQ-Systems i.MX8DXP TQMa8XDP";
compatible = "tq,imx8dxp-tqma8xdp", "fsl,imx8dxp";
};
&pmic_thermal {
cooling-maps {
map0 {
cooling-device =
<&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqp-mba8xx.dts 0 → 100644
View file @ 71363a48
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
/dts-v1/;
#include "imx8qxp-tqma8xqp.dtsi"
#include "mba8xx.dtsi"
/ {
model = "TQ-Systems i.MX8QXP TQMa8XQP on MBa8Xx";
compatible = "tq,imx8qxp-tqma8xqp-mba8xx", "tq,imx8qxp-tqma8xqp", "fsl,imx8qxp";
};
arch/arm64/boot/dts/freescale/imx8qxp-tqma8xqp.dtsi 0 → 100644
View file @ 71363a48
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
#include "imx8qxp.dtsi"
#include "tqma8xx.dtsi"
/ {
model = "TQ-Systems i.MX8QXP TQMa8XQP";
compatible = "tq,imx8qxp-tqma8xqp", "fsl,imx8qxp";
};
arch/arm64/boot/dts/freescale/mba8xx.dtsi 0 → 100644
View file @ 71363a48
This diff is collapsed.
arch/arm64/boot/dts/freescale/tqma8xx.dtsi 0 → 100644
View file @ 71363a48
// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
/*
* Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
/ {
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x40000000>;
};
reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "V_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "V_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/*
* global autoconfigured region for contiguous allocations
* must not exceed memory size and region
*/
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x20000000>;
alloc-ranges = <0 0x96000000 0 0x30000000>;
linux,cma-default;
};
};
};
/* TQMa8Xx only uses industrial grade, reduce trip points accordingly */
&cpu_alert0 {
temperature = <95000>;
};
&cpu_crit0 {
temperature = <100000>;
};
/* end of temperature grade adjustments */
&flexspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexspi0>;
status = "okay";
flash0: flash@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <66000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
};
};
/* TODO GPU */
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_lpi2c1>;
pinctrl-1 = <&pinctrl_lpi2c1gpio>;
scl-gpios = <&lsio_gpio1 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&lsio_gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
se97: temperature-sensor@1b {
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
reg = <0x1b>;
};
pcf85063: rtc@51 {
compatible = "nxp,pcf85063a";
reg = <0x51>;
quartz-load-femtofarads = <7000>;
};
at24c02: eeprom@53 {
compatible = "nxp,se97b", "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
read-only;
vcc-supply = <&reg_3v3>;
};
m24c64: eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
pagesize = <32>;
vcc-supply = <&reg_3v3>;
};
};
&mu_m0 {
status = "okay";
};
&mu1_m0 {
status = "okay";
};
&thermal_zones {
pmic_thermal: pmic-thermal {
polling-delay-passive = <250>;
polling-delay = <2000>;
thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
trips {
pmic_alert0: trip0 {
temperature = <110000>;
hysteresis = <2000>;
type = "passive";
};
pmic_crit0: trip1 {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&pmic_alert0>;
cooling-device =
<&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
vqmmc-supply = <&reg_1v8>;
vmmc-supply = <&reg_3v3>;
bus-width = <8>;
non-removable;
no-sdio;
no-sd;
status = "okay";
};
&vpu {
compatible = "nxp,imx8qxp-vpu";
status = "okay";
};
&vpu_core0 {
memory-region = <&decoder_boot>, <&decoder_rpc>;
status = "okay";
};
&vpu_core1 {
memory-region = <&encoder_boot>, <&encoder_rpc>;
status = "okay";
};
&iomuxc {
pinctrl_flexspi0: flexspi0grp {
fsl,pins = <
IMX8QXP_QSPI0A_DATA0_LSIO_QSPI0A_DATA0 0x0600004d
IMX8QXP_QSPI0A_DATA1_LSIO_QSPI0A_DATA1 0x0600004d
IMX8QXP_QSPI0A_DATA2_LSIO_QSPI0A_DATA2 0x0600004d
IMX8QXP_QSPI0A_DATA3_LSIO_QSPI0A_DATA3 0x0600004d
IMX8QXP_QSPI0A_DQS_LSIO_QSPI0A_DQS 0x0600004d
IMX8QXP_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B 0x0600004d
IMX8QXP_QSPI0A_SCLK_LSIO_QSPI0A_SCLK 0x0600004d
IMX8QXP_QSPI0B_SCLK_LSIO_QSPI0B_SCLK 0x0600004d
IMX8QXP_QSPI0B_DATA0_LSIO_QSPI0B_DATA0 0x0600004d
IMX8QXP_QSPI0B_DATA1_LSIO_QSPI0B_DATA1 0x0600004d
IMX8QXP_QSPI0B_DATA2_LSIO_QSPI0B_DATA2 0x0600004d
IMX8QXP_QSPI0B_DATA3_LSIO_QSPI0B_DATA3 0x0600004d
IMX8QXP_QSPI0B_DQS_LSIO_QSPI0B_DQS 0x0600004d
IMX8QXP_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B 0x0600004d
IMX8QXP_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B 0x0600004d
>;
};
pinctrl_lpi2c1: lpi2c1grp {
fsl,pins = <
IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021
IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021
>;
};
pinctrl_lpi2c1gpio: lpi2c1gpiogrp {
fsl,pins = <
IMX8QXP_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_IO27 0x06000021
IMX8QXP_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO28 0x06000021
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021
IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021
IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021
IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021
IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021
IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021
IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021
IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021
IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021
IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041
>;
};
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040
IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020
IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020
IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020
IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020
IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020
IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020
IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020
IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020
IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020
IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040
>;
};
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040
IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020
IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020
IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020
IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020
IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020
IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020
IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020
IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020
IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020
IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040
>;
};
};
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7