Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
linux
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
Kirill Smelkov
linux
Commits
a31bb032
Commit
a31bb032
authored
Jun 30, 2016
by
Stephen Boyd
Browse files
Options
Browse Files
Download
Plain Diff
Merge branch 'clk-hi6220-rtc' into clk-next
* clk-hi6220-rtc: clk: hi6220: Add RTC clock for pl031
parents
5ff5ec59
6fb924dc
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
5 additions
and
2 deletions
+5
-2
drivers/clk/hisilicon/clk-hi6220.c
drivers/clk/hisilicon/clk-hi6220.c
+2
-0
include/dt-bindings/clock/hi6220-clock.h
include/dt-bindings/clock/hi6220-clock.h
+3
-2
No files found.
drivers/clk/hisilicon/clk-hi6220.c
View file @
a31bb032
...
...
@@ -68,6 +68,8 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_ao[] __initdata = {
{
HI6220_TIMER7_PCLK
,
"timer7_pclk"
,
"clk_tcxo"
,
CLK_SET_RATE_PARENT
|
CLK_IGNORE_UNUSED
,
0x630
,
22
,
0
,
},
{
HI6220_TIMER8_PCLK
,
"timer8_pclk"
,
"clk_tcxo"
,
CLK_SET_RATE_PARENT
|
CLK_IGNORE_UNUSED
,
0x630
,
23
,
0
,
},
{
HI6220_UART0_PCLK
,
"uart0_pclk"
,
"clk_tcxo"
,
CLK_SET_RATE_PARENT
|
CLK_IGNORE_UNUSED
,
0x630
,
24
,
0
,
},
{
HI6220_RTC0_PCLK
,
"rtc0_pclk"
,
"clk_tcxo"
,
CLK_SET_RATE_PARENT
|
CLK_IGNORE_UNUSED
,
0x630
,
25
,
0
,
},
{
HI6220_RTC1_PCLK
,
"rtc1_pclk"
,
"clk_tcxo"
,
CLK_SET_RATE_PARENT
|
CLK_IGNORE_UNUSED
,
0x630
,
26
,
0
,
},
};
static
void
__init
hi6220_clk_ao_init
(
struct
device_node
*
np
)
...
...
include/dt-bindings/clock/hi6220-clock.h
View file @
a31bb032
...
...
@@ -55,8 +55,9 @@
#define HI6220_TIMER7_PCLK 34
#define HI6220_TIMER8_PCLK 35
#define HI6220_UART0_PCLK 36
#define HI6220_AO_NR_CLKS 37
#define HI6220_RTC0_PCLK 37
#define HI6220_RTC1_PCLK 38
#define HI6220_AO_NR_CLKS 39
/* clk in Hi6220 systrl */
/* gate clock */
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment