Commit ba386777 authored by Vignesh Balasubramanian's avatar Vignesh Balasubramanian Committed by Borislav Petkov (AMD)

x86/elf: Add a new FPU buffer layout info to x86 core files

Add a new .note section containing type, size, offset and flags of every
xfeature that is present.

This information will be used by debuggers to understand the XSAVE layout of
the machine where the core file has been dumped, and to read XSAVE registers,
especially during cross-platform debugging.

The XSAVE layouts of modern AMD and Intel CPUs differ, especially since
Memory Protection Keys and the AVX-512 features have been inculcated into
the AMD CPUs.

Since AMD never adopted (and hence never left room in the XSAVE layout for)
the Intel MPX feature, tools like GDB had assumed a fixed XSAVE layout
matching that of Intel (based on the XCR0 mask).

Hence, core dumps from AMD CPUs didn't match the known size for the XCR0 mask.
This resulted in GDB and other tools not being able to access the values of
the AVX-512 and PKRU registers on AMD CPUs.

To solve this, an interim solution has been accepted into GDB, and is already
a part of GDB 14, see

  https://sourceware.org/pipermail/gdb-patches/2023-March/198081.html.

But it depends on heuristics based on the total XSAVE register set size
and the XCR0 mask to infer the layouts of the various register blocks
for core dumps, and hence, is not a foolproof mechanism to determine the
layout of the XSAVE area.

Therefore, add a new core dump note in order to allow GDB/LLDB and other
relevant tools to determine the layout of the XSAVE area of the machine where
the corefile was dumped.

The new core dump note (which is being proposed as a per-process .note
section), NT_X86_XSAVE_LAYOUT (0x205) contains an array of structures.

Each structure describes an individual extended feature containing
offset, size and flags in this format:

  struct x86_xfeat_component {
         u32 type;
         u32 size;
         u32 offset;
         u32 flags;
  };

and in an independent manner, allowing for future extensions without depending
on hw arch specifics like CPUID etc.

  [ bp: Massage commit message, zap trailing whitespace. ]
Co-developed-by: default avatarJini Susan George <jinisusan.george@amd.com>
Signed-off-by: default avatarJini Susan George <jinisusan.george@amd.com>
Co-developed-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: default avatarVignesh Balasubramanian <vigbalas@amd.com>
Link: https://lore.kernel.org/r/20240725161017.112111-2-vigbalas@amd.com
parent 8400291e
......@@ -107,6 +107,7 @@ config X86
select ARCH_HAS_DEBUG_WX
select ARCH_HAS_ZONE_DMA_SET if EXPERT
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select ARCH_HAVE_EXTRA_ELF_NOTES
select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE
select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI
select ARCH_MIGHT_HAVE_PC_PARPORT
......
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _UAPI_ASM_X86_ELF_H
#define _UAPI_ASM_X86_ELF_H
#include <linux/types.h>
struct x86_xfeat_component {
__u32 type;
__u32 size;
__u32 offset;
__u32 flags;
} __packed;
_Static_assert(sizeof(struct x86_xfeat_component) % 4 == 0, "x86_xfeat_component is not aligned");
#endif /* _UAPI_ASM_X86_ELF_H */
......@@ -13,6 +13,7 @@
#include <linux/seq_file.h>
#include <linux/proc_fs.h>
#include <linux/vmalloc.h>
#include <linux/coredump.h>
#include <asm/fpu/api.h>
#include <asm/fpu/regset.h>
......@@ -23,6 +24,8 @@
#include <asm/prctl.h>
#include <asm/elf.h>
#include <uapi/asm/elf.h>
#include "context.h"
#include "internal.h"
#include "legacy.h"
......@@ -1838,3 +1841,89 @@ int proc_pid_arch_status(struct seq_file *m, struct pid_namespace *ns,
return 0;
}
#endif /* CONFIG_PROC_PID_ARCH_STATUS */
#ifdef CONFIG_COREDUMP
static const char owner_name[] = "LINUX";
/*
* Dump type, size, offset and flag values for every xfeature that is present.
*/
static int dump_xsave_layout_desc(struct coredump_params *cprm)
{
int num_records = 0;
int i;
for_each_extended_xfeature(i, fpu_user_cfg.max_features) {
struct x86_xfeat_component xc = {
.type = i,
.size = xstate_sizes[i],
.offset = xstate_offsets[i],
/* reserved for future use */
.flags = 0,
};
if (!dump_emit(cprm, &xc, sizeof(xc)))
return 0;
num_records++;
}
return num_records;
}
static u32 get_xsave_desc_size(void)
{
u32 cnt = 0;
u32 i;
for_each_extended_xfeature(i, fpu_user_cfg.max_features)
cnt++;
return cnt * (sizeof(struct x86_xfeat_component));
}
int elf_coredump_extra_notes_write(struct coredump_params *cprm)
{
int num_records = 0;
struct elf_note en;
if (!fpu_user_cfg.max_features)
return 0;
en.n_namesz = sizeof(owner_name);
en.n_descsz = get_xsave_desc_size();
en.n_type = NT_X86_XSAVE_LAYOUT;
if (!dump_emit(cprm, &en, sizeof(en)))
return 1;
if (!dump_emit(cprm, owner_name, en.n_namesz))
return 1;
if (!dump_align(cprm, 4))
return 1;
num_records = dump_xsave_layout_desc(cprm);
if (!num_records)
return 1;
/* Total size should be equal to the number of records */
if ((sizeof(struct x86_xfeat_component) * num_records) != en.n_descsz)
return 1;
return 0;
}
int elf_coredump_extra_notes_size(void)
{
int size;
if (!fpu_user_cfg.max_features)
return 0;
/* .note header */
size = sizeof(struct elf_note);
/* Name plus alignment to 4 bytes */
size += roundup(sizeof(owner_name), 4);
size += get_xsave_desc_size();
return size;
}
#endif /* CONFIG_COREDUMP */
......@@ -2039,7 +2039,7 @@ static int elf_core_dump(struct coredump_params *cprm)
{
size_t sz = info.size;
/* For cell spufs */
/* For cell spufs and x86 xstate */
sz += elf_coredump_extra_notes_size();
phdr4note = kmalloc(sizeof(*phdr4note), GFP_KERNEL);
......@@ -2103,7 +2103,7 @@ static int elf_core_dump(struct coredump_params *cprm)
if (!write_note_info(&info, cprm))
goto end_coredump;
/* For cell spufs */
/* For cell spufs and x86 xstate */
if (elf_coredump_extra_notes_write(cprm))
goto end_coredump;
......
......@@ -411,6 +411,7 @@ typedef struct elf64_shdr {
#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */
/* Old binutils treats 0x203 as a CET state */
#define NT_X86_SHSTK 0x204 /* x86 SHSTK state */
#define NT_X86_XSAVE_LAYOUT 0x205 /* XSAVE layout description */
#define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */
#define NT_S390_TIMER 0x301 /* s390 timer register */
#define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */
......
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