Commit ca369f96 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'gemini-dts-v6.9' of...

Merge tag 'gemini-dts-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into soc/dt

Gemini DTS changes for the v6.9 kernel:

- Fix the node names of the DSA switch in DIR-685.
- Fix the node names of the Vitesse DSA switches.
- Fix up the Wiligear compatible strings
- Use KEY_RESTART where applicable.

* tag 'gemini-dts-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: gemini: Fix switch node names on Vitesse switches
  ARM: dts: gemini: Map reset keys to KEY_RESTART
  ARM: dts: gemini: Fix wiligear compatible strings
  ARM: dts: gemini: Fix switch node names in the DIR-685

Link: https://lore.kernel.org/r/CACRpkdYQv9cyCZyjgQB4FTrxek9Hfu4EZ3syfHqHF7P6gzddvA@mail.gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d9022091 5ee18186
......@@ -27,10 +27,10 @@ chosen {
gpio_keys {
compatible = "gpio-keys";
button-esc {
button-reset {
debounce-interval = <100>;
wakeup-source;
linux,code = <KEY_ESC>;
linux,code = <KEY_RESTART>;
label = "reset";
/* Collides with LPC_LAD[0], UART DCD, SSP 97RST */
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
......@@ -187,7 +187,7 @@ touchkeys@26 {
};
/* This is a RealTek RTL8366RB switch and PHY using SMI over GPIO */
switch {
ethernet-switch {
compatible = "realtek,rtl8366rb";
/* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
......@@ -204,36 +204,36 @@ switch_intc: interrupt-controller {
#interrupt-cells = <1>;
};
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
label = "lan0";
phy-handle = <&phy0>;
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&phy1>;
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&phy2>;
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&phy3>;
};
port@4 {
ethernet-port@4 {
reg = <4>;
label = "wan";
phy-handle = <&phy4>;
};
rtl8366rb_cpu_port: port@5 {
rtl8366rb_cpu_port: ethernet-port@5 {
reg = <5>;
label = "cpu";
ethernet = <&gmac0>;
......@@ -252,27 +252,27 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@0 {
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&switch_intc>;
interrupts = <0>;
};
phy1: phy@1 {
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&switch_intc>;
interrupts = <1>;
};
phy2: phy@2 {
phy2: ethernet-phy@2 {
reg = <2>;
interrupt-parent = <&switch_intc>;
interrupts = <2>;
};
phy3: phy@3 {
phy3: ethernet-phy@3 {
reg = <3>;
interrupt-parent = <&switch_intc>;
interrupts = <3>;
};
phy4: phy@4 {
phy4: ethernet-phy@4 {
reg = <4>;
interrupt-parent = <&switch_intc>;
interrupts = <12>;
......
......@@ -33,10 +33,10 @@ chosen {
gpio_keys {
compatible = "gpio-keys";
button-esc {
button-reset {
debounce-interval = <100>;
wakeup-source;
linux,code = <KEY_ESC>;
linux,code = <KEY_RESTART>;
label = "reset";
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
};
......
......@@ -43,7 +43,7 @@ button-wps {
button-setup {
debounce-interval = <50>;
wakeup-source;
linux,code = <KEY_SETUP>;
linux,code = <KEY_RESTART>;
label = "factory reset";
/* Conflict with NAND flash */
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
......@@ -93,7 +93,7 @@ spi {
cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
switch@0 {
ethernet-switch@0 {
compatible = "vitesse,vsc7385";
reg = <0>;
/* Specified for 2.5 MHz or below */
......@@ -101,27 +101,27 @@ switch@0 {
gpio-controller;
#gpio-cells = <2>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "lan4";
};
vsc: port@6 {
vsc: ethernet-port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac1>;
......
......@@ -30,7 +30,7 @@ gpio_keys {
button-setup {
debounce-interval = <100>;
wakeup-source;
linux,code = <KEY_SETUP>;
linux,code = <KEY_RESTART>;
label = "factory reset";
/* Conflict with NAND flash */
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
......@@ -78,7 +78,7 @@ spi {
cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
switch@0 {
ethernet-switch@0 {
compatible = "vitesse,vsc7395";
reg = <0>;
/* Specified for 2.5 MHz or below */
......@@ -86,27 +86,27 @@ switch@0 {
gpio-controller;
#gpio-cells = <2>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "lan4";
};
vsc: port@6 {
vsc: ethernet-port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac1>;
......
......@@ -10,7 +10,7 @@
/ {
model = "Wiliboard WBD-111";
compatible = "wiliboard,wbd111", "cortina,gemini";
compatible = "wiligear,wiliboard-wbd111", "cortina,gemini";
#address-cells = <1>;
#size-cells = <1>;
......@@ -28,10 +28,10 @@ chosen {
gpio_keys {
compatible = "gpio-keys";
button-setup {
button-reset {
debounce-interval = <100>;
wakeup-source;
linux,code = <KEY_SETUP>;
linux,code = <KEY_RESTART>;
label = "reset";
/* Conflict with ICE */
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
......
......@@ -10,7 +10,7 @@
/ {
model = "Wiliboard WBD-222";
compatible = "wiliboard,wbd222", "cortina,gemini";
compatible = "wiligear,wiliboard-wbd222", "cortina,gemini";
#address-cells = <1>;
#size-cells = <1>;
......@@ -27,10 +27,10 @@ chosen {
gpio_keys {
compatible = "gpio-keys";
button-setup {
button-reset {
debounce-interval = <100>;
wakeup-source;
linux,code = <KEY_SETUP>;
linux,code = <KEY_RESTART>;
label = "reset";
/* Conflict with ICE */
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
......
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