- 06 Apr, 2021 3 commits
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Sai Prakash Ranjan authored
Add a DT node for Last level cache (aka. system cache) controller which provides control over the last level cache present on SC7280 SoC. Signed-off-by:
Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/5bacaa8350e0d9553dccd623a15513590e795b47.1615832893.git.saiprakash.ranjan@codeaurora.orgSigned-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Jami Kettunen authored
Add device trees for OnePlus 5 (cheeseburger) and 5T (dumpling) MSM8998 SoC smartphones with initial support included for: - UFS internal storage - USB peripheral mode - Display - Touch - Bluetooth - Hall effect sensor - Power and volume buttons - Capacitive keypad button backlight (on cheeseburger) Signed-off-by:
Jami Kettunen <jamipkettunen@gmail.com> Link: https://lore.kernel.org/r/20210406010708.2376807-2-jamipkettunen@gmail.comSigned-off-by:
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Jami Kettunen authored
This was already the case for ADSP and SLPI remoteprocs & doesn't affect existing boards where it has been re-enabled. Signed-off-by:
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- 04 Apr, 2021 11 commits
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Sujit Kautkar authored
Move rmtfs memory region so that it does not overlap with system RAM (kernel data) when KAsan is enabled. This puts rmtfs right after mba_mem which is not supposed to increase beyond 0x94600000 Reviewed-by:
Sujit Kautkar <sujitka@chromium.org> Link: https://lore.kernel.org/r/20210330014610.1451198-1-sujitka@chromium.orgSigned-off-by:
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Srinivasa Rao Mandadapu authored
This is a trgodor variant, required to have sound node variable for coachz specific platform. Tested-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
Srinivasa Rao Mandadapu <srivasam@codeaurora.org> Reviewed-by:
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Ajit Pandey authored
Add dai link for supporting lpass I2S driver, which is used for audio capture and playback. Add lpass-cpu node with pin controls and i2s primary and secondary dai-links. Tested-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by:
Ajit Pandey <ajitp@codeaurora.org> Signed-off-by:
V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by:
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Dmitry Baryshkov authored
Plug dp_phy-provided clocks to display clock controller. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
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Dmitry Baryshkov authored
USB1 QMP PHY is not just a USB3 PHY, but USB3+DP PHY. Change device tree nodes accordingly. Signed-off-by:
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Bryan O'Donoghue authored
Add DT entries for the sm8250 venus encoder/decoder. Co-developed-by:
Jonathan Marek <jonathan@marek.ca> Signed-off-by:
Dikshita Agarwal <dikshita@qti.qualcomm.com> Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by:
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jonathan@marek.ca authored
This commit adds the videocc DTS node for sm8250. Signed-off-by:
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Vinod Koul authored
Add interconnect nodes and add them for modem and cdsp nodes Signed-off-by:
Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210401113252.3078466-1-vkoul@kernel.orgSigned-off-by:
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Robert Foss authored
RNG (Random Number Generator) in SM8350 features PRNG EE (Execution Environment), hence add devicetree support for it. Reviewed-by:
Robert Foss <robert.foss@linaro.org> Link: https://lore.kernel.org/r/20210401101536.1014560-1-robert.foss@linaro.orgSigned-off-by:
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satya priya authored
Add regulator devices for SC7280 as RPMh regulators. This ensures that consumers are able to modify the physical state of PMIC regulators. Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Signed-off-by:
satya priya <skakit@codeaurora.org> Link: https://lore.kernel.org/r/1617192339-3760-4-git-send-email-skakit@codeaurora.orgSigned-off-by:
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Dmitry Baryshkov authored
Specify input clocks to the SDM845's Global Clock Controller as required by the bindings. Signed-off-by:
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- 30 Mar, 2021 4 commits
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Robert Foss authored
sm8350 has 29 thermal sensors split across two tsens controllers. Add the thermal zones to expose them and wireup the cpus to throttle their frequencies on crossing passive temperature thresholds. Signed-off-by:
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Caleb Connolly authored
Tested on the OnePlus 7 Pro (including DMA). Signed-off-by:
Caleb Connolly <caleb@connolly.tech> Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20210321174522.123036-3-caleb@connolly.techSigned-off-by:
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Caleb Connolly authored
Add the first and third qupv3 nodes used to hook up peripherals on some devices, as well as the iommus properties for all of them. Signed-off-by:
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Jonathan Marek authored
Apply these fixes to the newly added sm8250 display ndoes - Remove "notused" interconnect (which apparently was blindly copied from my old patches) - Use dispcc node example from dt-bindings, removing clocks which aren't documented or used by the driver and fixing the region size. Fixes: 7c1dffd4 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes") Signed-off-by:
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- 18 Mar, 2021 4 commits
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Dmitry Baryshkov authored
On the GENI SPI controller is is not very efficient if the chip select line is controlled by the QUP itself (see 37dd4b77 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to use GPIO for CS") for the details). Configure SPI0 CS pin as a GPIO. Signed-off-by:
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Dmitry Baryshkov authored
GENI SPI controller shows several issues if it manages the CS on its own (see 37dd4b77 ("arm64: dts: qcom: sc7180: Provide pinconf for SPI to use GPIO for CS")) for the details. Provide pinctrl entries for SPI controllers using the same CS pin but in GPIO mode. Signed-off-by:
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Dmitry Baryshkov authored
Split "default" device tree nodes into common "data-clk" nodes and "cs" nodes which might differ from board to board depending on how the slave chips are wired. Reviewed-by:
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Dmitry Baryshkov authored
As discussed on linux-arm-msm list, start splitting sm8250 pinctrl settings into generic and board-specific parts. The first part to receive such treatment is the spi, so split spi pinconf to the board device tree. Reviewed-by:
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- 16 Mar, 2021 3 commits
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Robert Foss authored
Enable camss & ov8856 DT nodes. Signed-off-by:
Andrey Konovalov <andrey.konovalov@linaro.org> Link: https://lore.kernel.org/r/20210316171931.812748-23-robert.foss@linaro.orgSigned-off-by:
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Robert Foss authored
Add regulator to camss device tree node. Signed-off-by:
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Robert Foss authored
Add the camss dt node for sdm845. Signed-off-by:
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- 12 Mar, 2021 15 commits
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Bjorn Andersson authored
The PM8150 comes with everything the RTC needs, so let's just leave it enabled instead of having to explicitly enable it for all boards. In effect this patch enables the RTC on the SM8150 MTP and the SM8250 HDK. Acked-by:
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Vinod Koul authored
SM8350-MTP features PM8350, PM8350B, PM8350C, PMK8350, PMR735A and PMR735B. PMICs Add the dtsi for these PMICs to MTP. Signed-off-by:
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Vinod Koul authored
Add base DTS file for PMR735B along with GPIO node Signed-off-by:
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Vinod Koul authored
Add base DTS file for PMR735A along with GPIO node Signed-off-by:
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Vinod Koul authored
Add base DTS file for PM8350C along with GPIO node Signed-off-by:
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Vinod Koul authored
Add base DTS file for PM8350B along with GPIO node Signed-off-by:
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Vinod Koul authored
Add base DTS file for PM8350 along with GPIO node Signed-off-by:
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Vinod Koul authored
Add base DTS file for PMK8350 along with GPIO node Signed-off-by:
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Vinod Koul authored
Add SPMI node found in SM8350 SoC Signed-off-by:
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Srinivas Kandagatla authored
WSA881x powerdown pin is connected to GPIO1 not gpio2, so correct this. This was working so far due to a shift bug in gpio driver, however once that is fixed this will stop working, so fix this! Fixes: 89a32a4e ("arm64: dts: qcom: db845c: add analog audio support") Signed-off-by:
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Bjorn Andersson authored
Document the SM8350 Hardware Development Kit (HDK). Reviewed-by:
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Stephen Boyd authored
This moved from being trogdor specific to being part of the general sc7180.dtsi SoC file in commit 681a607a ("arm64: dts: qcom: sc7180: Add DisplayPort HPD pin dt node"). Then we dropped the pinconf from the general sc7180.dtsi file in commit 8d079bf2 ("arm64: dts: qcom: sc7180: Drop pinconf on dp_hot_plug_det") and added it back to the trogdor dts file in commit f772081f ("arm64: dts: qcom: sc7180: Add "dp_hot_plug_det" pinconf for trogdor"). As part of this we managed to forget to drop the old copy in the trogdor dts. Let's do it now. Signed-off-by:
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Shawn Guo authored
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: b7e8f433 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by:Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210303033106.549-5-shawn.guo@linaro.orgSigned-off-by:
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Shawn Guo authored
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: 16951b49 ("arm64: dts: qcom: sm8250: Add TLMM pinctrl node") Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: -
Shawn Guo authored
The last cell of 'gpio-ranges' should be number of GPIO pins, and in case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather than msm_pinctrl_soc_data.ngpio - 1. This fixes the problem that when the last GPIO pin in the range is configured with the following call sequence, it always fails with -EPROBE_DEFER. pinctrl_gpio_set_config() pinctrl_get_device_gpio_range() pinctrl_match_gpio_range() Fixes: e13c6d14 ("arm64: dts: qcom: sm8150: Add base dts file") Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by:
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