The timing for 640x480-60 was handled different than all others.
This patch changes this by changing the blanking start and end.
The reason for this is that I can't find any reason for the old
behaviour and it was not consistent anyway as the special case for
LCD did not always trigger as the LCD code does not use this
function and it did trigger regardless of whether the display set is
CRT or LCD but only based whether any DVI/LCD device exists.
There are no negative effects observed for CRT or DVI devices.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

As the first argument is just part of the structure passed as the
second argument there is no need for it at all.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

As the result is not used anywhere there is no need to perform the
lookup at all.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

The locking is done within the viafb_set_*_timing functions so there
is no need to do it here. Move a missing hardware reset into the
modesetting function.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch replaces calls to viafb_load_crtc_timing with the code.
This should make it easier to fix the oddity that in the modetable
the blank and sync end entries contain the length and we need to add
the start values to get those to be written to the hardware.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch replaces the old timing setup code with a redesigned one.
The new code might be slightly faster as it has no conditinals and
does not write the same register multiple times. Also it makes the
comparison to the documentation easier.
Regressions are unlikely but could happen as a lot of hardware is
undocumented.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch adds checks for minimum and maximum pitch size to prevent
invalid settings which could otherwise crash the machine. Also the
alignment is done in a slightly more readable way.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: stable@kernel.org

As Laurent pointed out we must not use any information in the passed
var besides xoffset, yoffset and vmode as otherwise applications
might abuse it. Also use the aligned fix.line_length and not the
(possible) unaligned xres_virtual.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: stable@kernel.org

Currently, a long set of viafb options are needed to get the XO-1.5
laptop to output video (there is only 1 configuration that works, that
can't really be autodetected).

This patch automatically detects and configures viafb for the XO-1.5
laptop, meaning all that is required for working display is that
viafb is loaded.
Signed-off-by: Daniel Drake <dsd@laptop.org>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This trivial patch removes unused mode tables.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

The current code might result in trying to remap 512MB video ram on
a 32 bit system which is quite likely to fail.
This patch tries to map less of it down to 8MB as this should still
be enough to get a reasonably well working framebuffer. This should
make viafb work for many people without requiring them to manually
allocate more space.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This can give a speed up of factor 6-9, which is quite notable.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

Conflicts:
	drivers/video/via/viamode.c
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch adds a config option to be compatible with X servers like
OpenChrome. This is required as for example the X server does not
handle things like disabled IGAs/PLLs resulting in a potential
freeze on X startup. With this option disabled we can provide some
nice features like power management and not reinitializing the
hardware on every mode switch (taking long time, causing flickering).
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

When allowing some PLL calculation we get a frequency that seems to
be a bit higher than what the OLPC DCON likes resulting in a still
readable but not so good image. We don't really know whether this is
a problem with the calculation formula or the OLPC but as other
displays seem to be happy with the other modes adjusting the OLPC
refresh looks like the better thing. This patch prevents a
regression when dynamic PLL calculation is allowed.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch fixes the devices connected on OLPC. The OLPC panel seems
to be connected to DVP1 and LVDS2 for some reasons and if not both
are handled correct the display does not work correct or not at all.
This patch prevents regressions on the OLPC where it worked by
accident but would break in future as the driver did not know the
correct devices connected. This might also fix hardware scaling.
Hopefully the OLPC is the only device with such a requirement but it
will be certainly better to actually know what devices are actually
connected and to not work by accident.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch fixes a regression introduced by
	fd3cc698a
	"viafb: remove duplicated clock storage"
caused by an incosistent mode which pretended to have a higher
refresh rate than it actually had. The wrong refresh rate resulted
in a calculated higher pixclock which the OLPC DCON could not handle.
By reducing the refresh rate to 50Hz we get close to the old
pixclock which makes the OLPC display usable again.
Minor other adjustments are needed as 60Hz is assumed to be a safe
value which is not true for OLPC DCON. This is no problem as we only
support 1200x900 on the OLPC.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Reported-by: Daniel Drake <dsd@laptop.org>

We do this also in the real program code so there is no reason to
do it here too (and here it's hardly readable).
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch replaces OK/FAIL by true/false which is simpler and saner.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

We do not need viafb_second{,_virtual}_{xres,yres} outside of
viafbdev.c so move them there and eliminate the virtual ones where
the only sane usage is done during initalization.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch moves all unprotected VGA initialization in one table and
provides some documentation for those values.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch adds support for enabling and configuring the engine on
VIAs IGPs. This is the main clock used for everything but pixel
output.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch introduces dummy functions to execute when we don't know
what we should do (due to missing documentation). They do nothing
but print a nice message in the log explaining the situation.
To trigger this message initial power management support is
activated which might save a bit energy by disabling PLL and clock
if no device is configured to use them.

Note: The message is only shown for the oldest IGPs CLE266 and K400
      as for the other platforms there are reasonable assumptions
      how it does (hopefully) work.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch is a huge move operation with some rename and introduces
an interface to still use the functions. This should be a step in
the right direction to reuse the code whenever possible but cleanly
separate code that differs on different platform and keeping the
complexity as low as possible.
pll_config was renamed to via_pll_config to keep the naming scheme.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch adds functions to enable/disable the display clocks.
It also fixes a tiny bug that slipped in with a previous commit but
could not yet have caused any problems.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch adds some support for clock source selection as well as
PLL power management. The code is unused at the moment but was
successfully tested as far as possible.
The implementation is according to the documentation for VX700,
VX800, VX855, VX900. Probably the source selection works like this
starting with K800 and the power managemennt at least since VX700.
(guessed based on the initialization in viamode.c)
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch splits some functionality to extra functions.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

As no caller is interested in the result call viafb_get_clk_value
directly from viafb_set_vclock to encapsulate the hardware dependend
stuff there.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch removes the max_hres and max_vres which are not used at
the moment. In general they could be useful but it would be better
to get them via any standard EDID implementation and not the buggy
incomplete one currently used which is also removed as far as
possible.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch allows calculating the pll multiplier within limits based
on the previous table. All available information supports that it
should be possible/sane to choose the multiplier free within some
ranges.
Storing the multiplier ranges instead of lots of pll configurations
reduces the memory needed and may as well improve the performance.
It is also expected to provide better pll values resulting in better
frequencies for the connected devices.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

As the iga path is the only remaining information which is also
handled by the active devices there is no reason to keep it.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

Later the correct values will be written so there is no need to
write early some values which might be wrong.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This moves some mode independend initialization code to the function
where the other parts of the initialization are.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch initializes the margins for the initial mode correct.
This is required to get the desired initial refresh rate. Also do
more verbose sanity checking to prevent misbehavior.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch fixes multiple issues with the handling of refresh rates
especially for multi-display setups. If you experienced problems
with wrong refresh rates this patch might fix them.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

This patch splits the pll configs up on pll versions. This allows
easy adding of other known good pll values. Additionally it made it
possible to remove invalid configurations resulting in better
behaviour for such cases. The resulting clocks are no longer stored
resulting in some computing overhead on each mode change.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

The clocks can be easily recalculated by the timing and refresh value.
This brings us one step closer to removing VIAs modetable and use
generic ones and being easier extensible.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>