- 29 Jan, 2021 10 commits
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
ARM64: DT: Hisilicon ARM64 DT updates for 5.12 - Further cleanups of the hisilicon DTS to align with the dtschema - Add or update the I2C, pinctrl and reset nodes for Hikey970 * tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: hi3670.dtsi: add I2C settings arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst arm64: dts: hisilicon: delete unused property smmu-cb-memtype arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes arm64: dts: hisilicon: normalize the node name of the localbus arm64: dts: hisilicon: normalize the node name of the module thermal arm64: dts: hisilicon: place clock-names "bus" before "core" arm64: dts: hisilicon: separate each group of data in the property "ranges" Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.comSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Mauro Carvalho Chehab authored
The I2C buses are not declared at the device tree. As this will be needed by further patches, add them, keeping all in disabled state. Per-board settings can override it. Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Mauro Carvalho Chehab authored
There are several pinctrl settings that are missing at this DT file. Also, the entries are out of order. Add the missing bits, as they'll be required by the DRM driver - and probably by other drivers not upstreamed yet. Reorder the entres, adding the missing bits. Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Mauro Carvalho Chehab authored
This is required in order to support USB. Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
The "smmu-cb-memtype" is a private property developed by the Hisilicon driver in the early stage and is not used now. So delete it. Otherwise, below YAML check warnings are reported: arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by:
Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Currently, the names of several nodes incorrectly match common PHY provider schema. And the phy-provider.yaml requires them must have property "#phy-cells". As a result, false positives similar to the following are reported: usb2-phy@120: '#phy-cells' is a required property Change their names slightly so that they do not match pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$". Signed-off-by:
Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Change the node name of the localbus to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error is detected by simple-bus.yaml. Signed-off-by:
Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
1. Change the node name of the thermal zone to match '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal". 2. Change the node name of the trip point to match '^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@". Signed-off-by:
Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Look at the clock-names schema defined in arm,mali-utgard.yaml: clock-names: items: - const: bus - const: core The "bus" needs to be placed before the "core". Signed-off-by:
Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Do not write the "ranges" of multiple groups of data into a uint32 array, use <> to separate them. Otherwise, the errors similar to the following will be reported: soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \ any of the given schemas (Possible causes of the failure): soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean' soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long Signed-off-by:
Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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- 26 Jan, 2021 1 commit
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Arnd Bergmann authored
Merge tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.12 Correct Samsung PMIC and S3FWRN5 NFC interrupts trigger levels on TM2/TM2E and Espresso boards. * tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: correct S3FWRN5 NFC interrupt trigger level on TM2 arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso arm64: dts: exynos: correct PMIC interrupt trigger level on TM2 Link: https://lore.kernel.org/r/20210125191240.11278-4-krzk@kernel.orgSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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- 25 Jan, 2021 3 commits
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Arnd Bergmann authored
Merge tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt Visconti device tree updates for 5.11 - Add watchdog support for TMPV7708 SoC - Add entries for Toshiba Visconti5 watchdog driver * tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti: arm64: dts: visconti: Add watchdog support for TMPV7708 SoC MAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver Link: https://lore.kernel.org/r/20210125003357.yd72y4f5vcdnvhnr@toshiba.co.jpSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Nobuhiro Iwamatsu authored
Add watchdog node in TMPV7708's dtsi, and tmpv7708-rm-mbrc boards's dts. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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Nobuhiro Iwamatsu authored
Add entries for Toshiba Visconti5 watchdog driver and binding. Signed-off-by:
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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- 22 Jan, 2021 8 commits
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Linus Walleij authored
Fix the node names for the MMC/SD card controller to conform to the standard node name mmc@.. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210122222038.2888747-1-linus.walleij@linaro.org' Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Ux500 DTS updates for the v5.12 kernel cycle: - A new DTS file for the Samsung GT-I9070 (Janice) - Fix up ADC channel name attributes - Add charger interrupts - Add thermistors to the HREF boards - Remove the non-existing AB8505 HW ADC IRQ - Push down the VMMCI setting to each board - Add the die temperature channel to teh AB8505 - Fix up the MMC host names to follow the standard naming convention * tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: Fix up MMC host node names ARM: dts: ux500: Add die temperature to AB8505 ARM: dts: ux500: Push VMMCI down to each tree ARM: dts: ux500: Remove the GPADC HW IRQ ARM: dts: ux500: Add thermistors to the HREF ARM: dts: ux500: Add interrupts to charger ARM: dts: ux500: Fix channel names attributes ARM: dts: ux500: Add a device tree for Janice Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.comSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Linus Walleij authored
The standard mandates that these nodes be named mmc@... not sdi_foo@... Acked-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Daniel Palmer authored
The BreadBee and the BreadBee Crust are the same PCB with a different SoC mounted. There are two top level dts to handle this. To avoid deduplicating the parts that are more related to the PCB than the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can be included in both top level dts. Signed-off-by:
Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com' Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/at91/linuxArnd Bergmann authored
AT91 DT for 5.12: - removing a property never documented nor used - adding i2c recovery GPI for one more board * tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d2: remove atmel,wakeup-type references ARM: dts: at91-sama5d27_wlsom1: add i2c recovery Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.comSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'socfpga_dts_update_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.12 - Add DTS file for eASIC N5X platform - Use generic ngpios in GPIO entries - Add PMU node for Arria10 * tag 'socfpga_dts_update_for_v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: arria10: add PMU node arm64: dts: n5x: Add support for Intel's eASIC N5X platform arm64: dts: socfpga: Use generic "ngpios" rather than "snps,nr-gpios" Link: https://lore.kernel.org/r/20210120012334.25730-1-dinguyen@kernel.orgSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Claudiu Beznea authored
atmel,wakeup-type DT property is not referenced anywhere in the current and previous version of the code thus remove it. Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by:
Nicolas Ferre <nferre@kernel.org> Link: https://lore.kernel.org/r/1609845525-10766-1-git-send-email-claudiu.beznea@microchip.com
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Nicolas Ferre authored
Add the i2c gpio pinctrls to support the i2c bus recovery on this board. Signed-off-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by:
Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20210117183558.5369-1-nicolas.ferre@microchip.com
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- 15 Jan, 2021 3 commits
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Daniel Palmer authored
The prefix for honestar should come before honeywell. Fixes: 43181b5d ("dt-bindings: vendor-prefixes: Add honestar vendor prefix") Signed-off-by:
Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/linux-arm-kernel/CAFr9PXmwOEuHHA-kDeL1YS8bWvovrt43MXxyy1J+hGbXwPUFSA@mail.gmail.com/ Link: https://lore.kernel.org/r/20201212012253.373074-1-daniel@0x0f.com' Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.12 - Document suport for the Beacon EmbeddedWorks RZ/G2N and RZ/H kits. * tag 'renesas-dt-bindings-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: arm: renesas: Add Beacon RZ/G2N and RZ/G2H boards Link: https://lore.kernel.org/r/20210115094610.2334058-3-geert+renesas@glider.beSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.12 - Timer (CMT/TMU) support for R-Car Gen3 SoCs, - Watchdog (RWDT), pincontrol (PFC), GPIO, and DMA (SYS-DMAC) support for the R-Car V3U SoC, - USB2 clock selector and SPI Multi I/O Bus Controller (RPC-IF) support for RZ/G2 SoCs, - Support for the Beacon EmbeddedWorks RZ/G2H and RZ/G2N kits, - Various fixes and improvements. * tag 'renesas-arm-dt-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits) arm64: dts: renesas: r8a779a0: Add SYS-DMAC nodes arm64: dts: renesas: r8a779a0: Add GPIO nodes arm64: dts: renesas: r8a779a0: Add pinctrl device node arm64: dts: renesas: rzg2: Add RPC-IF Support arm64: dts: renesas: rzg2: Add usb2_clksel to RZ/G2 M/N/H arm64: dts: renesas: r8a774e1: Introduce beacon-rzg2h-kit arm64: dts: renesas: r8a774b1: Introduce beacon-rzg2n-kit arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions arm64: dts: renesas: beacon: Better describe keys arm64: dts: renesas: beacon: Configure Audio CODEC clocks arm64: dts: renesas: beacon kit: Fix Audio Clock sources arm64: dts: renesas: beacon: Configure programmable clocks arm64: dts: renesas: falcon: Enable watchdog timer arm64: dts: renesas: r8a779a0: Add RWDT node arm64: dts: renesas: beacon: Correct I2C bus speeds arm64: dts: renesas: beacon: Enable SPI arm64: dts: renesas: beacon: Don't make vccq_sdhi0 always on arm64: dts: renesas: beacon: Fix RGB Display PWM Backlight arm64: dts: renesas: beacon: Fix LVDS PWM Backlight arm64: dts: renesas: beacon: Fix audio-1.8V pin enable ... Link: https://lore.kernel.org/r/20210115094610.2334058-2-geert+renesas@glider.beSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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- 14 Jan, 2021 3 commits
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Geert Uytterhoeven authored
Add device nodes for the Direct Memory Access Controller for System (SYS-DMAC) instances on the Renesas R-Car V3U (r8a779a0) SoC. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210107182045.1948037-1-geert+renesas@glider.be
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Geert Uytterhoeven authored
Add device nodes for the General Purpose Input/Output (GPIO) block on the Renesas R-Car V3U (r8a779a0) SoC. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Tested-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210114111117.2214281-1-geert+renesas@glider.be
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Ulrich Hecht authored
This patch adds the pinctrl device node for the R8A779A0 (V3U) SoC. Signed-off-by:
Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165948.31162-1-uli+renesas@fpond.euSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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- 13 Jan, 2021 7 commits
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Linus Walleij authored
The AB8505 mixed signal ASIC variant has a die temperature channel that is missing in the AB8500 variant. Add it to the DTSI. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The setting of VMMCI differs so much between different boards that we need to handle it on a per-board basis rather that complicating things by overriding stuff from the included DTSI:s. Push it down into top-level tree instead. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The AB8505 variant lacks the hardware conversion IRQ, so do not put it in with this variant. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This adds the two temperature-monitoring thermistors to the HREF reference design, defines a thermal zone for the chassis and sets some reasonable thermal limits. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The different charger nodes in the AB8500 and AB8505 includes was missing the interrupt assignments for the interrupts necessary to drive the AB8500/AB8505 charging state machine. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The AB8500/AB8505 is providing ADC channels and do so using the standard property "io-channel-names" not the mistakenly singular form "io-channel-name". Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This adds a basic device tree for the Samsung GT-I9070 mobile phone also known as Janice. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- 11 Jan, 2021 5 commits
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Adam Ford authored
The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF). Add the nodes, but make them disabled by default. Signed-off-by:
Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Adam Ford authored
Per the reference manual for the RZ/G Series, 2nd Generation, the RZ/G2M, RZ/G2N, and RZ/G2H have a bit that can be set to choose between a crystal oscillator and an external oscillator. Because only boards that need this should enable it, it's marked as disabled by default for backwards compatibility with existing boards. Signed-off-by:
Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201228202221.2327468-2-aford173@gmail.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Adam Ford authored
Beacon EmbeddedWorks is introducing a new kit based on the RZ/G2H SoC from Renesas. The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio. The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM files as the RZ/G2M and RZ/G2N kits. Signed-off-by:
Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201224170502.2254683-8-aford173@gmail.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Adam Ford authored
Beacon EmbeddedWorks is introducing a new kit based on the RZ/G2N SoC from Renesas. The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1 cellular radio. The Baseboard has Ethernet, USB, HDMI, stereo audio in and out, along with a variety of push buttons and LED's, and support for a parallel RGB and an LVDS display. It uses the same baseboard and SOM as the RZ/G2M. This SOM has only 2GB of DDR, and beacon-renesom-som.dtsi contains the base memory node, so an additional memory node isn't necessary. Signed-off-by:
Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201224170502.2254683-7-aford173@gmail.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Adam Ford authored
In preparation for adding new dev kits, move anything specific to the RZ/G2M from the SOM-level and baseboard-levels and move them to the kit-level. This allows the SOM and baseboard to be reused with other SoC's. Signed-off-by:
Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201224170502.2254683-6-aford173@gmail.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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