- 14 Apr, 2017 10 commits
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Takashi Sakamoto authored
Units on TASCAM FireWire series handle MIDI messages with support for running status. Drivers for the series should remember current running status and transfer valid MIDI messages. For this purpose, current ALSA driver for the series has some members in its top-level structure. This is due to better abstraction of async midi port. Nowadays, the abstraction was localized just for the driver. This commit moves the members to structure for async midi port. Signed-off-by:
Takashi Sakamoto <o-takashi@sakamocchi.jp> Signed-off-by:
Takashi Iwai <tiwai@suse.de>
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Takashi Sakamoto authored
In current design of ALSA driver for TASCAM FireWire series, initialization of members in asymc midi port structure is done at device probing. Some of the members should be initialized every time to use rawmidi devices because they're changed in sequence of transmission for MIDI messages. This commit adds a new function to initialize them. Invariant parameters during object lifetime are kept as is. Signed-off-by:
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Takashi Sakamoto authored
ALSA driver for TASCAM FireWire series internally allocates 4 byte buffer for asynchronous transaction to transfer MIDI messages. However, the buffer can be allocated with memory object of parent structure. This commit adds 4 byte array as a member of the structure and obsoletes the redundant allocation. This is deallocated with memory object of parent structure. Signed-off-by:
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Takashi Sakamoto authored
Units on TASCAM FireWire series receive MIDI messages by asynchronous transactions on IEEE 1394 bus. Although the transaction is sent to a certain register, current ALSA driver for this series has a redundant design. This commit use the same address for the transaction. Signed-off-by:
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Takashi Sakamoto authored
TASCAM FireWire series uses asynchronous transactions with fixed length payload for MIDI messaging. On the other hand, ALSA driver for the series has a redundant design to handle different length of payload. This commit removes the redundant abstraction. Signed-off-by:
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Takashi Sakamoto authored
As a result of localization of async midi port, ALSA driver for TASCAM FireWire series can call helper function directly instead of callback registration. This commit removes the redundant design. Signed-off-by:
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Takashi Sakamoto authored
In Linux kernel 4.4, firewire-lib got a feature called as 'async midi port' for transmission of MIDI message via IEEE 1394 asynchronous communication, however actual consumer of this feature is ALSA driver for TASCAM FireWire series only. When adding this feature, I assumed that ALSA driver for Digi00x might also be a consumer, actually it's not. This commit moves the feature from firewire-lib to firewire-tascam module. Two minor kernel APIs are removed. Signed-off-by:
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Takashi Iwai authored
Back-merge to prepare for applying more FireWire updates.
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Takashi Sakamoto authored
In kernel APIs of ALSA control interface, drivers can create a control element set by a call of snd_ctl_new1() with a template. This template is known to have const qualifier in general cases. This commit adds the qualifier to template array, for safer program and runtime. Application of this change moves the symbol from .data section to .rodata section. Cc: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by:
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Takashi Sakamoto authored
An abstraction of asynchronous transaction for transmission of MIDI messages was introduced in Linux v4.4. Each driver can utilize this abstraction to transfer MIDI messages via fixed-length payload of transaction to a certain unit address. Filling payload of the transaction is done by callback. In this callback, each driver can return negative error code, however current implementation assigns the return value to unsigned variable. This commit changes type of the variable to fix the bug. Reported-by:
Julia Lawall <Julia.Lawall@lip6.fr> Cc: <stable@vger.kernel.org> # 4.4+ Fixes: 585d7cba ("ALSA: firewire-lib: add helper functions for asynchronous transactions to transfer MIDI messages") Signed-off-by:
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- 13 Apr, 2017 2 commits
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Takashi Iwai authored
The snd_use_lock_sync() (thus its implementation snd_use_lock_sync_helper()) has the 5 seconds timeout to break out of the sync loop. It was introduced from the beginning, just to be "safer", in terms of avoiding the stupid bugs. However, as Ben Hutchings suggested, this timeout rather introduces a potential leak or use-after-free that was apparently fixed by the commit 2d7d5400 ("ALSA: seq: Fix race during FIFO resize"): for example, snd_seq_fifo_event_in() -> snd_seq_event_dup() -> copy_from_user() could block for a long time, and snd_use_lock_sync() goes timeout and still leaves the cell at releasing the pool. For fixing such a problem, we remove the break by the timeout while still keeping the warning. Suggested-by:
Ben Hutchings <ben.hutchings@codethink.co.uk> Cc: <stable@vger.kernel.org> Signed-off-by:
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Ander Conselvan De Oliveira authored
Geminilake vendor nid is different from other Skylake variants, but rest of the initialization code is same. So a variable is added in hdmi_spec to store the platform specific vendor nid and move the initialization code to a helper function to be used by both platform specific init. Fixes: 126cfa2f ("ALSA: hda: Add Geminilake HDMI codec ID") Signed-off-by:
Ander Conselvan De Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by:
Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by:
Jaikrishna Nemallapudi <jaikrishnax.nemallapudi@intel.com> Cc: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Signed-off-by:
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- 12 Apr, 2017 5 commits
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Bhumika Goyal authored
Declare snd_kcontrol_new strcutures as const as they are only passed as an argument to the function snd_ctl_new1. This argument is of type const, so snd_kcontrol_new structures having this property can be made const too. Done using Coccinelle: @r disable optional_qualifier@ identifier x; position p; @@ static struct snd_kcontrol_new x@p={...}; @ok@ identifier r.x; position p; @@ snd_ctl_new1(&x@p,...) @bad@ position p != {r.p,ok.p}; identifier r.x; @@ x@p @depends on !bad disable optional_qualifier@ identifier r.x; @@ +const struct snd_kcontrol_new x; Signed-off-by:Bhumika Goyal <bhumirks@gmail.com> Signed-off-by:
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Bhumika Goyal authored
Declare snd_kcontrol_new strcutures as const as they are only passed as an argument to the function snd_ctl_new1. This argument is of type const, so snd_kcontrol_new structures having this property can be made const too. Done using Coccinelle: @r disable optional_qualifier@ identifier x; position p; @@ static struct snd_kcontrol_new x@p={...}; @ok@ identifier r.x; position p; @@ snd_ctl_new1(&x@p,...) @bad@ position p != {r.p,ok.p}; identifier r.x; @@ x@p @depends on !bad disable optional_qualifier@ identifier r.x; @@ +const struct snd_kcontrol_new x; Signed-off-by: -
Takashi Sakamoto authored
During packet streaming, maximum length of payload for isochronous packet is invariable, therefore no need to recalculate. Current ALSA IEC 61883-1/6 engine calls a function to calculate it 8,000 or more times per second for incoming packet processing. This commit adds a member to have maximum length of payload into 'struct amdtp_stream', to reduces the function calls. At first callback from isochronous context, the length is calculated and stored for later processing. Signed-off-by:
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Subhransu S. Prusty authored
Geminilake is Skylake family platform. So add it's id to skl_plus check. Fixes: 126cfa2f ("ALSA: hda: Add Geminilake HDMI codec ID") Signed-off-by:
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Takashi Iwai authored
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- 11 Apr, 2017 3 commits
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Takashi Sakamoto authored
MOTU units transfer/receive messages in each data block of their isochronous packet payload. A part of content in the message is cleard for MIDI message transmission, while the rest is unknown yet. Additional features are required to assist users and developers to reveal the details. This commit adds tracepoints for the purpose. The tracepoints are designed for MOTU's protocol version 2 and 3 (Protocol version 1 is not upstreamed yet). In the tracepoints, events are probed to gather first two 24 bit data chunks of each data block. The chunks are formatted into elements of 64 bit array with padding in MSB. Signed-off-by:
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Takashi Sakamoto authored
Unique protocol is used for MOTU FireWire series. In this protocol, data block format is not compliant to AM824 in IEC 61883-1/6. Each of the data block consists of 24 bit data chunks, except for a first quadlet. The quadlet is used for source packet header (SPH) described in IEC 61883-1. The sequence of SPH seems to represent presentation timestamp corresponding to included data. Developers have experienced that invalid sequence brings disorder of units in the series. Unfortunately, current implementation of ALSA IEC 61883-1/6 engine and firewire-motu driver brings periodical noises to the units at sampling transmission frequency based on 44.1 kHz. The engine generates the SPH with even interval and this mechanism seems not to be suitable to the units. Further work is required for this issue and infrastructure is preferable to assist the work. This commit adds tracepoints for the purpose. In the tracepoints, events are probed to gather the SPHs from each data blocks. Signed-off-by:
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Takashi Sakamoto authored
Unique protocol is used for RME Fireface series. In this protocol, payload format for isochronous packet is not compliant to CIP in IEC 61883-1/6. The packet includes data blocks just with data channels, without headers and any metadata. In previous commits, ALSA IEC 61883-1/6 engine supports this protocol. However, tracepoints are not supported yet, unlike implementation for IEC 61883-1/6 protocol. This commit adds support of tracepoints for the protocol. Signed-off-by:
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- 07 Apr, 2017 2 commits
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Libin Yang authored
On some Intel platforms, the audio clock may not be set correctly with initial setting. This will cause the audio playback/capture rates wrong. This patch checks the audio clock setting and will set it to a proper value if it is set incorrectly. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=188411Signed-off-by:
Libin Yang <libin.yang@intel.com> Signed-off-by:
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Libin Yang authored
This patch refines the definition of AZX_MLCTL_SPA and AZX_MLCTL_CPA and add more definitions of ML registers Signed-off-by:
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- 05 Apr, 2017 18 commits
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Takashi Sakamoto authored
In ALSA firewire stack, some AV/C commands are supported, including vendor's extensions. Drivers includes response parser of each command, according to its requirements, while the parser is written with loose fashion in two points; error check and length check. This doesn't cause any issues such as kernel corruption, but should be improved. This commit modifies evaluations of return value on each parsers. Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Takashi Sakamoto authored
In protocol version 3, drivers can read current sampling clock status from register 0x'ffff'f000'0b14. 8 bits of LSB of this register represents type of signal as source of clock. Current driver code includes invalid bitshift to handle the parameter. This commit fixes the bug. Reported-by:
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Takashi Sakamoto authored
At a commit 6c29230e ("ALSA: oxfw: delayed registration of sound card"), ALSA oxfw driver fails to handle SCS.1m/1d, due to -EBUSY at a call of snd_card_register(). The cause is that the driver manages to register two rawmidi instances with the same device number 0. This is a regression introduced since kernel 4.7. This commit fixes the regression, by fixing up device property after discovering stream formats. Fixes: 6c29230e ("ALSA: oxfw: delayed registration of sound card") Cc: <stable@vger.kernel.org> # 4.7+ Signed-off-by:
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Takashi Sakamoto authored
For digi00x series, asynchronous transaction is not used to transfer MIDI messages to/from control surface. One of transction handlers in my previous work loses its practical meaning. This commit removes the handler. I note that unit of console type transfers 0x00001000 to registered address of host space when switching to 'standalone' mode. Then the unit generates bus reset. Signed-off-by:
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Takashi Sakamoto authored
At a commit c5fcee03 ("ALSA: firewire-digi00x: add MIDI operations for MIDI control port"), I described that MIDI messages for control surface is transferred by a different way from the messages for physical ports. However, this is wrong. MIDI messages to/from all of MIDI ports are transferred by isochronous packets. This commit removes codes to transfer MIDI messages via asynchronous transaction, from MIDI handling layer. Signed-off-by:
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Takashi Sakamoto authored
At a commit 9dc5d31c ("ALSA: firewire-digi00x: handle MIDI messages in isochronous packets"), a functionality to handle MIDI messages on isochronous packet was supported. But this includes some of my misunderstanding. This commit is to fix them. For digi00x series, first data channel of data blocks in rx/tx packet includes MIDI messages. The data channel has 0x80 in 8 bit of its MSB, however it's against IEC 61883-6. Unique data format is applied: - Upper 4 bits of LSB represent port number. - 0x0: port 1. - 0x2: port 2. - 0xe: console port. - Lower 4 bits of LSB represent the number of included MIDI message bytes; 0x0/0x1/0x2. - Two bytes of middle of this data channel have MIDI bytes. Especially, MIDI messages from/to console surface are also transferred by isochronous packets, as well as physical MIDI ports. Signed-off-by:
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Takashi Sakamoto authored
Digi00x series includes two types of unit; rack and console. As long as reading information on config rom of Digi 002 console, 'MODEL_ID' field has a different value from the one on Digi 002 rack. We've already got a test report from users with Digi 003 rack. We can assume that console type and rack type has different value in the field. This commit adds a device entry for console type. For following commits, this commit also adds a member to 'struct snd_digi00x' to identify console type. $ cd linux-firewire-utils/src $ python2 ./crpp < /sys/bus/firewire/devices/fw1/config_rom ROM header and bus information block ----------------------------------------------------------------- 400 0404f9d0 bus_info_length 4, crc_length 4, crc 63952 404 31333934 bus_name "1394" 408 60647002 irmc 0, cmc 1, isc 1, bmc 0, cyc_clk_acc 100, max_rec 7 (256) 40c 00a07e00 company_id 00a07e | 410 00a30000 device_id 0000a30000 | EUI-64 00a07e0000a30000 root directory ----------------------------------------------------------------- 414 00058a39 directory_length 5, crc 35385 418 0c0043a0 node capabilities 41c 04000001 hardware version 420 0300a07e vendor 424 81000007 --> descriptor leaf at 440 428 d1000001 --> unit directory at 42c unit directory at 42c ----------------------------------------------------------------- 42c 00046674 directory_length 4, crc 26228 430 120000a3 specifier id 434 13000001 version 438 17000001 model 43c 81000007 --> descriptor leaf at 458 descriptor leaf at 440 ----------------------------------------------------------------- 440 00055913 leaf_length 5, crc 22803 444 000050f2 descriptor_type 00, specifier_ID 50f2 448 80000000 44c 44696769 450 64657369 454 676e0000 descriptor leaf at 458 ----------------------------------------------------------------- 458 0004a6fd leaf_length 4, crc 42749 45c 00000000 textual descriptor 460 00000000 minimal ASCII 464 44696769 "Digi" 468 20303032 " 002" Signed-off-by: -
Takashi Sakamoto authored
Fireface 400 is a second model of RME Fireface series, released in 2006. This commit adds support for this model. This model supports 8 analog channels, 2 S/PDIF channels and 8 ADAT channels in both of tx/rx packet. The number of ADAT channels differs depending on each mode of sampling transmission frequency. $ python2 linux-firewire-utils/src/crpp < /sys/bus/firewire/devices/fw1/config_rom ROM header and bus information block ----------------------------------------------------------------- 400 04107768 bus_info_length 4, crc_length 16, crc 30568 (should be 61311) 404 31333934 bus_name "1394" 408 20009002 irmc 0, cmc 0, isc 1, bmc 0, cyc_clk_acc 0, max_rec 9 (1024) 40c 000a3501 company_id 000a35 | 410 1bd0862a device_id 011bd0862a | EUI-64 000a35011bd0862a root directory ----------------------------------------------------------------- 414 000485ec directory_length 4, crc 34284 418 03000a35 vendor 41c 0c0083c0 node capabilities per IEEE 1394 420 8d000006 --> eui-64 leaf at 438 424 d1000001 --> unit directory at 428 unit directory at 428 ----------------------------------------------------------------- 428 000314c4 directory_length 3, crc 5316 42c 12000a35 specifier id 430 13000002 version 434 17101800 model eui-64 leaf at 438 ----------------------------------------------------------------- 438 000261a8 leaf_length 2, crc 25000 43c 000a3501 company_id 000a35 | 440 1bd0862a device_id 011bd0862a | EUI-64 000a35011bd0862a Signed-off-by: -
Takashi Sakamoto authored
This commit adds hwdep interface so as the other drivers for audio and music units on IEEE 1394 have. This interface is designed for mixer/control applications. By using this interface, an application can get information about firewire node, can lock/unlock kernel streaming and can get notification at starting/stopping kernel streaming. Signed-off-by:
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Takashi Sakamoto authored
This commit adds PCM functionality to transmit/receive PCM frames on isochronous packet streaming. This commit enables userspace applications to start/stop packet streaming via ALSA PCM interface. Sampling rate requested by applications is used as sampling transmission frequency of IEC 61883-1/6packet streaming. As I described in followed commits, units in this series manages sampling clock frequency independently of sampling transmission frequency, and they supports resampling between their packet streaming/data block processing layer and sampling data processing layer. This commit take this driver to utilize these features for usability. When internal clock is selected as source signal of sampling clock, this driver allows user space applications to start PCM substreams at any rate which packet streaming engine supports as sampling transmission frequency. In this case, this driver expects units to perform resampling PCM frames for rx/tx packets when sampling clock frequency and sampling transmission frequency are mismatched. This is for daily use cases. When any external clock is selected as the source signal, this driver gets configured sampling rate from units, then restricts available sampling rate to the rate for PCM applications. This is for studio use cases. Models in this series supports 64.0/128.0 kHz of sampling rate, however these frequencies are not supported by IEC 61883-6 as sampling transmission frequency. Therefore, packet streaming engine of ALSA firewire stack can't handle them. When units are configured to use any external clock as source signal of sampling clock and one of these unsupported rate is configured as rate of the sampling clock, this driver returns EIO to user space applications. Anyway, this driver doesn't voluntarily configure parameters of sampling clock. It's better for users to work with appropriate user space implementations to configure the parameters in advance of usage. Signed-off-by:
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Takashi Sakamoto authored
This commit adds management functionality for packet streaming. As long as investigating Fireface 400, there're three modes depending on sampling transmission frequency. The number of data channels in each data block is different depending on the mode. The set of available data channels for each mode might be different for each protocol and model. The length of registers for the number of isochronous channel is just three bits, therefore 0-7ch are available. When bus reset occurs on IEEE 1394 bus, the device discontinues to transmit packets. This commit aborts PCM substreams at bus reset handler. As I described in followed commits, The device manages its sampling clock independently of sampling transmission frequency against IEC 61883-6. Thus, it's a lower cost to change the sampling transmission frequency, while data fetch between streaming layer and DSP require larger buffer for resampling. As a result, device latency might tend to be larger than ASICs for IEC 61883-1/6 such as DM1000/DM1100/DM1500 (BeBoB), DiceII/TCD2210/TCD2220/TCD3070 and OXFW970/971. Signed-off-by:
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Takashi Sakamoto authored
As long as investigating Fireface 400, format of payload of each isochronous packet is not IEC 61883-1/6, thus its format of data block is not AM824. The remarkable points of the format are: * The payload just consists of some data channels of quadlet size without CIP header. * Each data channels includes data aligned to little endian order. * One data channel consists of two parts; 8 bit ancillary field and 24 bit PCM frame. Due to lack of CIP headers, rx/tx packets include no CIP headers and different way to check packet discontinuity. For tx packet, the ancillary field is used for counter. However, the way of counting is different depending on positions of data channels. At 44.1 kHz, ancillary field in: * 1st/6th/9th/10th/14th/17th data channels: not used for this purpose. * 2nd/18th data channels: incremented every data block (0x00-0xff). * 3rd/4th/5th/11th/12th/13th data channels: incremented every 256 data blocks (0x00-0x07). * 7th/8th/15th/16th data channels: incremented per the number of data blocks in a packet. The increment can occur per packet (0x00-0xff). For tx packet, tag of each isochronous packet is used for this purpose. The value of tag cyclically changes between 0, 1, 2 and 3 in this order. The interval is different depending on sampling transmission frequency. At 44.1/48.0 kHz, it's 256 data blocks. At 88.2 kHz, it's 96 data blocks. The number of data blocks in tx packet is exactly the same as SYT_INTERVAL. There's no empty packet or no-data packet, thus the throughput is not 8,000 packets per sec. On the other hand, the one in rx packet is 8,000 packets per sec, thus the number of data blocks is different between each packet, depending on sampling transmission frequency: * 44.1 kHz: 5 or 6 * 48.0 kHz: 5 or 6 or 7 * 88.2 kHz: 10 or 11 or 12 This commit adds data processing layer to satisfy the above specification in a policy of 'best effort'. Although PCM frames are handled for intermediate buffer to user space, the ancillary data is not handled at all to reduce CPU usage, thus counter is not checked. 0 is always used for tag of isochronous packet. Furthermore, the packet streaming layer is responsible for calculation of the number of data blocks for each packet, thus it's not exactly the same sequence from the above observation. Signed-off-by:
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Takashi Sakamoto authored
As long as investigating Fireface 400, IEC 61883-1/6 is not applied to its packet streaming protocol. Remarks of the specific protocol are: * Each packet doesn't include CIP headers. * 64,0 and 128,0 kHz are supported. * The device doesn't necessarily transmit 8,000 packets per second. * 0, 1, 2, 3 are used as tag for rx isochronous packets, however 0 is used for tx isochronous packets. On the other hand, there's a common feature. The number of data blocks transferred in a second is the same as sampling transmission frequency. Current ALSA IEC 61883-1/6 engine already has a method to calculate it and this driver can utilize it for rx packets, as well as tx packets. This commit adds support for the transferring protocol. CIP_NO_HEADERS flag is newly added. When this flag is set: * Both of 0 (without CIP header) and 1 (with CIP header) are used as tag to handle incoming isochronous packet. * 0 (without CIP header) is used as tag to transfer outgoing isochronous packet. * Skip CIP header evaluation. * Use unique way to calculate the quadlets of isochronous packet payload. In ALSA PCM interface, 128.0 kHz is not supported, and the ALSA IEC 61883-1/6 engine doesn't support 64.0 kHz. These modes are dropped. The sequence of rx packet has a remarkable quirk about tag. This will be described in later commits. Signed-off-by:
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Takashi Sakamoto authored
Audio and music units of RME Fireface series use its own protocol for isochronous packets to transfer data. This protocol requires ALSA IEC 61883-1/6 engine to have alternative functions. This commit is a preparation for the protocol. Signed-off-by:
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Takashi Sakamoto authored
Drivers can retrieve the state and configuration of clock by read transactions. This commit allows protocol abstraction layer to to dump the information for debugging, via proc interface. Signed-off-by:
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Takashi Sakamoto authored
In previous commit, fireface driver supports unique transaction mechanism for MIDI feature. This commit adds MIDI functionality for userspace applications. As I wrote in a followed commit, user space applications get some requirement from this driver. It should not touch a register to which units transmit MIDI messages. It should configure a register in which MIDI transmission is controlled. Signed-off-by:
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Takashi Sakamoto authored
As long as investigating Fireface 400, MIDI messages are transferred by asynchronous communication over IEEE 1394 bus. Fireface 400 receives MIDI messages by write transactions to two addresses; 0x'0000'0801'8000 and 0x'0000'0801'9000. Each of two seems to correspond to MIDI port 1 and 2. Fireface 400 transfers MIDI messages by write transactions to certain addresses which configured by drivers. The drivers can decide upper 4 byte of the addresses by write transactions to 0x'0000'0801'03f4. For the rest part of the address, drivers can select from below options: * 0x'0000'0000 * 0x'0000'0080 * 0x'0000'0100 * 0x'0000'0180 Selected options are represented in register 0x'0000'0801'051c as bit flags. Due to this mechanism, drivers are restricted to use addresses on 'Memory space' of IEEE 1222, even if transactions to the address have some side effects. This commit adds transaction support for MIDI messaging, based on my assumption that the similar mechanism is used on the other protocols. To receive asynchronous transactions, the driver allocates a range of address in 'Memory space'. I apply a strategy to use 0x'0000'0000 as lower 4 byte of the address. When getting failure from Linux FireWire subsystem, this driver retries to allocate addresses. Unfortunately, read transaction to address 0x'0000'0801'051c returns zero always, however write transactions have effects to the other features such as status of sampling clock. For this reason, this commit delegates a task to configure this register to user space applications. The applications should set 3rd bit in LSB in little endian order. Signed-off-by:
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Takashi Sakamoto authored
As of 2016, RME discontinued its Fireface series, thus it's OK for us to focus on released firmwares to drive known units. As long as investigating Fireface 400 with Windows driver and comparing the result to FFADO implementation, I can see these firmwares have different register assignments. On the other hand, according to manuals of each models, features relevant to packet streaming seem to be common, because GUIs for these models have the same options. It's reasonable to assume an abstraction layer of protocols to communicate to each models. This commit adds the abstraction layer for the protocols. This layer includes some functions to operate common features of models in this series. In IEC 61883-1/6, the sequence of packet can transfer timing information to synchronize receivers to transmitters. Units of each node on IEEE 1394 bus can generate transmitter's timing clock by handling value of SYT field in CIP header with high-precision clock. For audio and music units on IEEE 1394 bus, this recovered clock is designed to used for sampling clock to capture/generate PCM frames on DSP/ADC/DAC. (Actually, in this world, there's no units to implement this specification as is, as long as I know). Fireface series doesn't use this mechanism. Besides, It doesn't use isochronous packet with CIP header. It uses internal crystal unit as its initial sampling clock. When detecting input signals which can be available for sampling clock (e.g. ADAT input), drivers can configure units to use the signals as source of sampling clock. When something goes wrong, e.g. frequency mismatching between the signal and configured value, units fallback to the other detected signals alternatively. When detecting no alternatives, internal crystal unit is used as source of sampling clock. On manual of Fireface 400, this mechanism is described as 'Autosync'. On the units, packet streaming is controlled by write transactions to certain registers. Format of the packet, e.g. the number of data channels in a data block, is also configured by the same manner. For this purpose, .begin_session and .finish_session is added. The remarkable point of this protocol is to allow drivers to configure arbitrary sampling transmission frequency; e.g. 12.345 Hz. As long as I know, there's no actual DAC/ADC chips which support this kind of capability. I think a pair of packet streaming layer and data block processing layer is isolated from sampling data processing layer in a point of governed clock. In short, between these parts, resampling layer exists. Actually, for Fireface 400, write transactions to 0x'0000'8010'051c has an effect to change sampling clock frequency with base frequencies (32.0/44.1/48.0 kHz) and its multipliers (x2/x4), regardless of sampling transmission frequency. For this reason, the abstraction layer doesn't handle parameters for sampling clock. Instead, each implementation of .begin_session is expected to configure sampling transmission frequency. For packet streaming layer, it's enough to get current selection of source signals for the sampling clock and its frequency. In the abstraction layer, when internal crystal is selected, drivers can sets arbitrary sampling frequency, else they should follow configured frequency. For this purpose, .get_clock is added. Drivers are allows to bank up data fetching from a pair of packet streaming/data block processing layer and sampling data processing layer. This feature seems to suppress noises at starting/stopping packet streaming. For this purpose, .switch_fetching_mode is added. As I described in the above, units have remarkable mechanism to manage sampling clock and process sampling data. For debugging purpose, .dump_sync_status and .dump_clock_config are added. I don't have a need to common interface to represent the status and configuration, developers can add actual implementation of the abstraction layer as they like. Unlike PCM frames, MIDI messages are transferred by asynchronous communication over IEEE 1394 bus, thus target addresses are important for this feature. The .midi_high_addr_reg, .midi_rx_port_0_reg and .midi_rx_port_1_reg are for this purpose. I'll describe them in following commit. Signed-off-by:
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