bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT.
That's why add it also to Linux to be aligned with bootloader requirement.

On TI K3 J784S4 SoC, only secure_proxy_mcu and secure_proxy_sa3 nodes are
exclusively used by R5 bootloader, rest of the dts nodes with bootph-* are
used by later boot stages also.

And secure_proxy_mcu and secure_proxy_sa3 are disabled in kernel device
tree, and will be only enabled in R5 bootloader device tree.
So, bootph-pre-ram for secure_proxy_mcu and secure_proxy_sa3 will be
added in R5 bootloader device tree only.

Add bootph-all for all other nodes that are used in the bootloader on
K3 J784S4 SoC, and bootph-pre-ram is not needed specifically for any node
in kernel dts.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230811192030.3480616-2-a-nandan@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

The DSS outputs DPI signals via its second video port (VP2). The DPI
output from DSS is 24 bits (RGB888) and is forwarded to an HDMI
transmitter (ITE-IT66121) on the BeaglePlay platform. For audio output,
BeaglePlay uses mcasp1.

Add pinmux info for DSS DPI signals.

Further, add support for HDMI audio and video output.
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230809084559.17322-6-a-bhatia1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

Enable audio output over HDMI instead of the 3.5mm jack.

A FET switch (U65) on the EVM muxes serial audio lines coming from McASP
between the codec (tlv320aic3106) and the HDMI bridge (sii9022).

By default it uses the codec, but it can be toggled to use the HDMI
bridge by shorting a (J24) header on the board.
Signed-off-by: Jai Luthra <j-luthra@ti.com>
[a-bhatia1: Cosmetic changes]
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230809084559.17322-5-a-bhatia1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

The DSS outputs DPI signals via its second video port (VP2). The DPI
output from DSS is 24 bits (RGB888) and is forwarded to an HDMI
transmitter (SIL9022) on the board.

Add pinmux info for DSS DPI output.

Add DT nodes for SIL9022 HDMI transmitter (TX), and the HDMI connector
on the AM625 SK and AM62-LP SK platforms.

Additionally, connect the output of DSS (VP2) with input of the HDMI TX,
and the output of HDMI TX to the input of the HDMI connector.
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230809084559.17322-4-a-bhatia1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

Add Display SubSystem (DSS) DT node for the AM625 SoC.

The DSS supports one each of video pipeline (vid) and video-lite
pipeline (vidl1). It outputs OLDI signals on one video port (VP1) and
DPI signals on another (VP2). The video ports are connected to the
pipelines via 2 identical overlay managers (ovr1 and ovr2).

Also add the DT node for DSS clock divider. This is a fixed-factor-clock
and does not have any register. This comes into effect whenenver OLDI
display is used. The input to this divider is a serial clock used by
OLDI TXes. The divider divides the input clock by 7, and provides the
pixel clock to VP1.
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230809084559.17322-3-a-bhatia1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

The Display Data Channel (DDC) transactions between an HDMI transmitter
(SIL9022A in this case) and an HDMI monitor, occur at a maximum of
100KHz. That's the maximum supported frequency within DDC standards.

While the SIL9022A can transact with the core at 400KHz, it needs to
drop the frequency to 100KHz when communicating with the monitor,
otherwise, the i2c controller times out and shows warning like this.

[  985.773431] omap_i2c 20010000.i2c: controller timed out

That feature, however, has not been enabled in the SIL9022 driver.

Since, dropping the frequency doesn't affect any other devices on the
bus, drop the main-i2c1 frequency from 400KHz to 100KHz.

Fixes: a8415814 ("arm64: dts: ti: Refractor AM625 SK dts")
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230809084559.17322-2-a-bhatia1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended with both mboxes and
memory-region information.

As theses only known about at the board integration level, these nodes
should only be enabled when provided with this information.

Disable the C6x DSP nodes in the dtsi files and only enable the ones that
are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Hari Nagalla <hnagalla@ti.com>
Tested-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230809180145.53158-3-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

C7x DSP nodes defined in the top-level J784s4 SoC dtsi files are incomplete
and will not be functional unless they are extended with both mboxes and
memory-region information.

As theses only known about at the board integration level, these nodes
should only be enabled when provided with this information.

Disable the C7x DSP nodes in the dtsi files and only enable the ones that
are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Hari Nagalla <hnagalla@ti.com>
Tested-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230809180145.53158-2-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

C7x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended with both mboxes and
memory-region information.

As theses only known about at the board integration level, these nodes
should only be enabled when provided with this information.

Disable the C7x DSP nodes in the dtsi files and only enable the ones that
are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Hari Nagalla <hnagalla@ti.com>
Tested-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230809180145.53158-1-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

Fix these fss node warnings that dtbs_check throws:

fss@47000000: $nodename:0: 'fss@47000000' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'

By renaming fss to bus.

Cc: Nishant Menon <nm@ti.com>
Suggested-by: Andrew Davis <afd@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Reid Tonking <reidt@ti.com>
Link: https://lore.kernel.org/r/20230810081847.277094-1-d-gole@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

TSCADC nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-14-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

TSCADC nodes defined in the top-level AM65 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the top-level dtsi files and only enable the
ones that are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-13-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and/or
device information.

Disable the TSCADC nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-12-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

GPIO nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-11-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

GPIO nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-10-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

GPIO nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

Disable the GPIO nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-9-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

OSPI nodes defined in the top-level AM64 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-8-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-7-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

OSPI nodes defined in the top-level J721e SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-6-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

OSPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.

As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.

Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-5-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

SDHCI nodes defined in the top-level J721s2 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-4-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-3-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete
and will not be functional unless they are extended.

As the attached SD/eMMC is only known about at the board integration level,
these nodes should only be enabled when provided with this information.

Disable the SDHCI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230810003814.85450-2-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

This patch fixes the interrupt range for wakeup and main domain gpio
interrupt routers. They were wrongly subtracted by 32 instead of
following what is defined in the interrupt map in the TRM (Table 9-35).

Link:  http://www.ti.com/lit/pdf/spruj52
Fixes: 4664ebd8 ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com>
Signed-off-by: Esteban Blanc <eblanc@baylibre.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20230810-tps6594-v6-4-2b2e2399e2ef@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

Add register range of ringacc cfg node to all k3 SoC dtsi files. This is
normally under Device Management firmware control but some entities like
bootloader have to access directly and thus required to be present in DT.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230809175932.2553156-3-vigneshr@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

RINGACC module on K3 SoCs have CFG register region which is usually
configured by a Device Management firmware. But certain entities such as
bootloader (like U-Boot) may have to access them directly. Describe this
region in the binding documentation for completeness of module
description.

Keep the binding compatible with existing DTS files by requiring first
four regions to be present at least.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230809175932.2553156-2-vigneshr@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for ADC nodes were not updated to align with new
regions, due to this while probing ADC driver out of range
error was seen.

Pin mux offsets for ADC nodes are corrected in this patch.

Fixes: 14462bd0 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230809050108.751164-1-u-kumar1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

Add WM8904 based analog sound card to Dahlia carrier board.
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-5-francesco@dolcini.itSigned-off-by: Nishanth Menon <nm@ti.com>

Add NAU8822 based analog sound card to Development carrier board.
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-4-francesco@dolcini.itSigned-off-by: Nishanth Menon <nm@ti.com>

Set AUDIO_EXT_REFCLK1, used as I2S_1_MCLK on Verdin AM62 family, to 25MHz
(this is the only valid option according to TI [1]).

[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1188051/am625-audio_ext_refclk1-clock-output---dts-support/4476322#4476322Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-3-francesco@dolcini.itSigned-off-by: Nishanth Menon <nm@ti.com>

On AM62-based SoCs the AUDIO_REFCLKx clocks can be used as an input to
external peripherals when configured through CTRL_MMR, so add the
clock nodes.
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230807202159.13095-2-francesco@dolcini.itSigned-off-by: Nishanth Menon <nm@ti.com>

Due to non-addressable regions in J721S2 SOC wkup_pmx was split
into four regions from wkup_pmx0 to wkup_pmx3.

Correcting OSPI1 pin mux, which now falls under wkup_pmx1.
Along with that removing unused pin mux for OSPI-0.

Fixes: 6bc829ce ("arm64: dts: ti: k3-j721s2: Fix wkup pinmux range")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230804075341.3858488-1-u-kumar1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

After splitting wkup_pmx pin mux for J784S4 into four regions.
Pin mux offset for OSPI nodes were not updated to align with new
regions, due to this while setting ospi pin muxes out of range
error was seen.

Pin mux offsets for OSPI nodes are corrected in this patch.

Fixes: 14462bd0 ("arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230802114126.162445-1-u-kumar1@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

On AM62ax there are no hardware interrupts routed to A53 GIC
interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were
omitted from MCU dtsi.

Timer polling was introduced in commits [1][2] enabling 3x MCAN
on AM62ax, so now add MCU MCAN nodes to the mcu dtsi for the Cortex A53.

[1] commit b382380c ("can: m_can: Add hrtimer to generate software interrupt")
[2] commit bb410c03 ("dt-bindings: net: can: Remove interrupt properties for MCAN")
Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20230804220137.425442-1-jm@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

AM68-SK has an HDMI port. The bridge used is TI-TFP410.
Add support to enable the connection:
DSS => TI TFP410 DPI-to-DVI Bridge => HDMI connector
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230803081800.368582-3-j-choudhary@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

Add DSS node for J721S2 SoC. DSS IP in J721S2 is
same as DSS IP in J721E, so same compatible is used.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20230803081800.368582-2-j-choudhary@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

The name "clock" is not allowed for nodes, use "clock-controller" to
remove the DTS check warning.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230802174521.236255-3-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

There are two nodes representing the same register space, this looks to
have been created by some merge or copy/paste error. Remove the second
instance of this node and move its children into the first instance.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230802174521.236255-2-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

The other instances have been fixed, but AM62a seems to have been missed,
fix this here.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230802174521.236255-1-afd@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>

USB0 is interfaced with a Type-C DRP connector and is managed via a
USB PD controller. Add support for the Type-C port with dual data
and power sink role.
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230725103651.1612-1-r-gunasekaran@ti.comSigned-off-by: Nishanth Menon <nm@ti.com>