- 01 Jun, 2023 3 commits
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Thomas Zimmermann authored
Many fbdev drivers use the same set of fb_ops helpers. Add Kconfig options to select them at once. This will help with making DRM's fbdev emulation code more modular, but can also be used to simplify fbdev's driver configs. v3: * fix select statement (Jingfeng) Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Sui Jingfeng <suijingfeng@loongson.cn> Reviewed-by:
Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230530151228.22979-2-tzimmermann@suse.de
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Thomas Zimmermann authored
Backmerging from drm-next to get commit e24e6d69 ("drm/i915/display: Implement fb_mmap callback function"). Signed-off-by:
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Fabio Estevam authored
Use port-base reference for port@1. This fixes the following schema warning: imx8mp-dhcom-pdk3.dtb: dsi@32e60000: ports:port@1:endpoint: Unevaluated properties are not allowed ('data-lanes' was unexpected) From schema: Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml Fixes: 1f0d40d8 ("dt-bindings: bridge: Convert Samsung MIPI DSIM bridge to yaml") Signed-off-by:Fabio Estevam <festevam@denx.de> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [narmstrong: removed line break between tags] Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230531224407.1611952-1-festevam@gmail.com
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- 31 May, 2023 5 commits
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Ma Jun authored
Remove redundant assignment code for ttm->caching as it's overwritten just a few lines later. v2: - Update the commit message. Signed-off-by:
Ma Jun <Jun.Ma2@amd.com> Reviewed-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Dmitry Baryshkov authored
On some devices the +5V Power pin of the HDMI connector and/or the ESD protection logic is powered on by a separate regulator. Instead of declaring this regulator as always-on, make hdmi-connector support the additional hdmi-pwr supply. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
In preparation to adding support for the hdmi_pwr supply, rename dp_pwr structure field to the generic connector_pwr. Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Dmitry Baryshkov authored
Follow the dp-connector example and add hdmi-pwr supply to drive the 5V pin of the HDMI connector (together with some simple glue logic possibly attached to the connector). Reviewed-by:
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Uwe Kleine-König authored
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. panel_edp_remove() always returned zero, so convert it to return void without any loss and then just drop the return from panel_edp_platform_remove(). Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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- 30 May, 2023 2 commits
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Uwe Kleine-König authored
After commit b8a1a4cd ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f4 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by:
Kieran Bingham <kieran.bingham@ideasonboard.com> Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Reviewed-by:
Martyn Welch <martyn.welch@collabora.com> Reviewed-by:
Guenter Roeck <groeck@chromium.org> Signed-off-by:
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Adam Ford authored
In the event a device is connected to the samsung-dsim controller that doesn't support the burst-clock, the driver is able to get the requested pixel clock from the attached device or bridge. In these instances, the samsung,burst-clock-frequency isn't needed, so remove it from the required list. The pll-clock frequency can be set by the device tree entry for samsung,pll-clock-frequency, but in some cases, the pll-clock may have the same clock rate as sclk_mipi clock. If they are equal, this flag is not needed since the driver will use the sclk_mipi rate as a fallback. Signed-off-by:
Adam Ford <aford173@gmail.com> Reviewed-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com> Signed-off-by:
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- 28 May, 2023 1 commit
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Dave Airlie authored
Merge tag 'drm-intel-gt-next-2023-05-24' of git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - New getparam for querying PXP support and load status Cross-subsystem Changes: - GSC/MEI proxy driver Driver Changes: Fixes/improvements/new stuff: - Avoid clearing pre-allocated framebuffers with the TTM backend (Nirmoy Das) - Implement framebuffer mmap support (Nirmoy Das) - Disable sampler indirect state in bindless heap (Lionel Landwerlin) - Avoid out-of-bounds access when loading HuC (Lucas De Marchi) - Actually return an error if GuC version range check fails (John Harrison) - Get mutex and rpm ref just once in hwm_power_max_write (Ashutosh Dixit) - Disable PL1 power limit when loading GuC firmware (Ashutosh Dixit) - Block in hwmon while waiting for GuC reset to complete (Ashutosh Dixit) - Provide sysfs for SLPC efficient freq (Vinay Belgaumkar) - Add support for total context runtime for GuC back-end (Umesh Nerlige Ramappa) - Enable fdinfo for GuC backends (Umesh Nerlige Ramappa) - Don't capture Gen8 regs on Xe devices (John Harrison) - Fix error capture for virtual engines (John Harrison) - Track patch level versions on reduced version firmware files (John Harrison) - Decode another GuC load failure case (John Harrison) - GuC loading and firmware table handling fixes (John Harrison) - Fix confused register capture list creation (John Harrison) - Dump error capture to kernel log (John Harrison) - Dump error capture to dmesg on CTB error (John Harrison) - Disable rps_boost debugfs when SLPC is used (Vinay Belgaumkar) Future platform enablement: - Disable stolen memory backed FB for A0 [mtl] (Nirmoy Das) - Various refactors for multi-tile enablement (Andi Shyti, Tejas Upadhyay) - Extend Wa_22011802037 to MTL A-step (Madhumitha Tolakanahalli Pradeep) - WA to clear RDOP clock gating [mtl] (Haridhar Kalvala) - Set has_llc=0 [mtl] (Fei Yang) - Define MOCS and PAT tables for MTL (Madhumitha Tolakanahalli Pradeep) - Add PTE encode function [mtl] (Fei Yang) - fix mocs selftest [mtl] (Fei Yang) - Workaround coherency issue for Media [mtl] (Fei Yang) - Add workaround 14018778641 [mtl] (Tejas Upadhyay) - Implement Wa_14019141245 [mtl] (Radhakrishna Sripada) - Fix the wa number for Wa_22016670082 [mtl] (Radhakrishna Sripada) - Use correct huge page manager for MTL (Jonathan Cavitt) - GSC/MEI support for Meteorlake (Alexander Usyskin, Daniele Ceraolo Spurio) - Define GuC firmware version for MTL (John Harrison) - Drop FLAT CCS check [mtl] (Pallavi Mishra) - Add MTL for remapping CCS FBs [mtl] (Clint Taylor) - Meteorlake PXP enablement (Alan Previn) - Do not enable render power-gating on MTL (Andrzej Hajda) - Add MTL performance tuning changes (Radhakrishna Sripada) - Extend Wa_16014892111 to MTL A-step (Radhakrishna Sripada) - PMU multi-tile support (Tvrtko Ursulin) - End support for set caching ioctl [mtl] (Fei Yang) Driver refactors: - Use i915 instead of dev_priv insied the file_priv structure (Andi Shyti) - Use proper parameter naming in for_each_engine() (Andi Shyti) - Use gt_err for GT info (Tejas Upadhyay) - Consolidate duplicated capture list code (John Harrison) - Capture list naming clean up (John Harrison) - Use kernel-doc -Werror when CONFIG_DRM_I915_WERROR=y (Jani Nikula) - Preparation for using PAT index (Fei Yang) - Use pat_index instead of cache_level (Fei Yang) Miscellaneous: - Fix memory leaks in i915 selftests (Cong Liu) - Record GT error for gt failure (Tejas Upadhyay) - Migrate platform-dependent mock hugepage selftests to live (Jonathan Cavitt) - Update the SLPC selftest (Vinay Belgaumkar) - Throw out set() wrapper (Jani Nikula) - Large driver kernel doc cleanup (Jani Nikula) - Fix probe injection CI failures after recent change (John Harrison) - Make unexpected firmware versions an error in debug builds (John Harrison) - Silence UBSAN uninitialized bool variable warning (Ashutosh Dixit) - Fix memory leaks in function live_nop_switch (Cong Liu) Merges: - Merge drm/drm-next into drm-intel-gt-next (Joonas Lahtinen) Signed-off-by:
Dave Airlie <airlied@redhat.com> # Conflicts: # drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZG5SxCWRSkZhTDtY@tursulin-desk
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- 26 May, 2023 21 commits
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Liu Ying authored
With all previous preparations done to make it possible for the single LCDIF embedded in i.MX93 SoC to drive multiple displays simultaneously, add i.MX93 LCDIF compatible string as the last step of adding i.MX93 LCDIF support. Tested-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Liu Ying <victor.liu@nxp.com> Signed-off-by:
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Liu Ying authored
The single LCDIF embedded in i.MX93 SoC may drive multiple displays simultaneously. Look at LCDIF output port's remote port parents to find all enabled first bridges. Add an encoder for each found bridge and attach the bridge to the encoder. This is a preparation for adding i.MX93 LCDIF support. Tested-by:
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Liu Ying authored
The single LCDIF embedded in i.MX93 SoC may drive multiple displays simultaneously. Check bus format and flags across first bridges in ->atomic_check() to ensure they are consistent. This is a preparation for adding i.MX93 LCDIF support. Acked-by:
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Liu Ying authored
Instead of determining LCDIF output bus format and bus flags in ->atomic_enable(), do that in ->atomic_check(). This is a preparation for the upcoming patch to check consistent bus format and bus flags across all first downstream bridges in ->atomic_check(). New lcdif_crtc_state structure is introduced to cache bus format and bus flags states in ->atomic_check() so that they can be read in ->atomic_enable(). Tested-by:
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Liu Ying authored
A valid bridge is already found in lcdif_attach_bridge() and set to lcdif->bridge, so lcdif->bridge cannot be a NULL pointer. Drop the unnecessary NULL pointer check in KMS stage. Tested-by:
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Liu Ying authored
There is one LCDIF embedded in i.MX93 SoC to connect with MIPI DSI controller through LCDIF cross line pattern(controlled by mediamix blk-ctrl) or connect with LVDS display bridge(LDB) directly or connect with a parallel display through parallel display format(also controlled by mediamix blk-ctrl). i.MX93 LCDIF IP is essentially the same to i.MX8MP LCDIF IP. Add device tree binding for i.MX93 LCDIF. Acked-by:
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Raphael Gallais-Pou authored
In ltdc_crtc_set_crc_source(), struct drm_crtc was dereferenced in a container_of() before the pointer check. This could cause a kernel panic. Fix this smatch warning: drivers/gpu/drm/stm/ltdc.c:1124 ltdc_crtc_set_crc_source() warn: variable dereferenced before check 'crtc' (see line 1119) Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/lkml/202212241802.zeLFZCXB-lkp@intel.com/Reported-by:
Dan Carpenter <error27@gmail.com> Closes: https://lore.kernel.org/lkml/202212241802.zeLFZCXB-lkp@intel.com/Signed-off-by:
Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Acked-by:
Philippe Cornu <philippe.cornu@foss.st.com> Signed-off-by:
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Yang Li authored
Convert platform_get_resource(),devm_ioremap_resource() to a single call to devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
Yang Li <yang.lee@linux.alibaba.com> Acked-by:
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Neil Armstrong authored
This reverts commit cfaf76d3 which was applied without review due to a bad tool manipulation. Acked-by:
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Dario Binacchi authored
The previous setting was related to the overall dimension and not to the active display area. In the "PHYSICAL SPECIFICATIONS" section, the datasheet shows the following parameters: ---------------------------------------------------------- | Item | Specifications | unit | ---------------------------------------------------------- | Display area | 98.7 (W) x 57.5 (H) | mm | ---------------------------------------------------------- | Overall dimension | 105.5(W) x 67.2(H) x 4.96(D) | mm | ---------------------------------------------------------- Fixes: 966fea78 ("drm/panel: simple: Add support for Ampire AM-480272H3TMQW-T01H") Signed-off-by:
Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by:
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Geert Uytterhoeven authored
Add support for the Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
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Geert Uytterhoeven authored
Document support for the Ampire AM-800480L1TMQW-T00H 5" WVGA TFT LCD panel. Signed-off-by:
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Adam Ford authored
In the event a device is connected to the samsung-dsim controller that doesn't support the burst-clock, the driver is able to get the requested pixel clock from the attached device or bridge. In these instances, the samsung,burst-clock-frequency isn't needed, so remove it from the required list. The pll-clock frequency can be set by the device tree entry for samsung,pll-clock-frequency, but in some cases, the pll-clock may have the same clock rate as sclk_mipi clock. If they are equal, this flag is not needed since the driver will use the sclk_mipi rate as a fallback. Signed-off-by:
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Adam Ford authored
The high-speed clock is hard-coded to the burst-clock frequency specified in the device tree. However, when using devices like certain bridge chips without burst mode and varying resolutions and refresh rates, it may be necessary to set the high-speed clock dynamically based on the desired pixel clock for the connected device. This also removes the need to set a clock speed from the device tree for non-burst mode operation, since the pixel clock rate is the rate requested from the attached device like a bridge chip. This should have no impact for people using burst-mode and setting the burst clock rate is still required for those users. If the burst clock is not present, change the error message to dev_info indicating the clock use the pixel clock. Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> Tested-by:
Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
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Adam Ford authored
The DPHY timings are currently hard coded. Since the input clock can be variable, the phy timings need to be variable too. To facilitate this, we need to cache the hs_clock based on what is generated from the PLL. The phy_mipi_dphy_get_default_config_for_hsclk function configures the DPHY timings in pico-seconds, and a small macro converts those timings into clock cycles based on the hs_clk. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Tested-by:
Michael Walle <michael@walle.cc> Tested-by:
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Adam Ford authored
In order to support variable DPHY timings, it's necessary to enable GENERIC_PHY_MIPI_DPHY so phy_mipi_dphy_get_default_config can be used to determine the nominal values for a given resolution and refresh rate. Signed-off-by:
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Adam Ford authored
Make the pll-clock-frequency optional. If it's present, use it to maintain backwards compatibility with existing hardware. If it is absent, read clock rate of "sclk_mipi" to determine the rate. Since it can be optional, change the message from an error to dev_info. Signed-off-by:
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Adam Ford authored
According to Table 13-45 of the i.MX8M Mini Reference Manual, the min and max values for M and the frequency range for the VCO_out calculator were incorrect. This information was contradicted in other parts of the mini, nano and plus manuals. After reaching out to my NXP Rep, when confronting him about discrepencies in the Nano manual, he responded with: "Yes it is definitely wrong, the one that is part of the NOTE in MIPI_DPHY_M_PLLPMS register table against PMS_P, PMS_M and PMS_S is not correct. I will report this to Doc team, the one customer should be take into account is the Table 13-40 DPHY PLL Parameters and the Note above." These updated values also match what is used in the NXP downstream kernel. To fix this, make new variables to hold the min and max values of m and the minimum value of VCO_out, and update the PMS calculator to use these new variables instead of using hard-coded values to keep the backwards compatibility with other parts using this driver. Fixes: 4d562c70 ("drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support") Signed-off-by:
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Lucas Stach authored
Scale the blanking packet sizes to match the ratio between HS clock and DPI interface clock. The controller seems to do internal scaling to the number of active lanes, so we don't take those into account. Signed-off-by:
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Rob Clark authored
Fixes undefined symbol when PROC_FS is not enabled. Reported-by:
Rob Clark <robdclark@chromium.org> Reviewed-by: <alexander.deucher@amd.com> Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for v6.5: UAPI Changes: Cross-subsystem Changes: * fbdev: Move framebuffer I/O helpers to <asm/fb.h>, fix naming * firmware: Init sysfb as early as possible Core Changes: * DRM scheduler: Rename interfaces * ttm: Store ttm_device_funcs in .rodata * Replace strlcpy() with strscpy() in various places * Cleanups Driver Changes: * bridge: analogix: Fix endless probe loop; samsung-dsim: Support swapping clock/data polarity; tc358767: Use devm_ Cleanups; * gma500: Fix I/O-memory access * panel: boe-tv101wum-nl6: Improve initialization; sharp-ls043t1le001: Mode fixes; simple: Add BOE EV121WXM-N10-1850 plus DT bindings; AddS6D7AA0 plus DT bindings; Cleanups * ssd1307x: Style fixes * sun4i: Release clocks * msm: Fix I/O-memory access * nouveau: Cleanups * shmobile: Support Renesas; Enable framebuffer console; Various fixes * vkms: Fix RGB565 conversion Signed-off-by:
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- 25 May, 2023 3 commits
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Frieder Schrempf authored
The datasheet describes the following initialization flow including minimum delay times between each step: 1. DSI data lanes need to be in LP-11 and the clock lane in HS mode 2. toggle EN signal 3. initialize registers 4. enable PLL 5. soft reset 6. enable DSI stream 7. check error status register To meet this requirement we need to make sure the host bridge's pre_enable() is called first by using the pre_enable_prev_first flag. Furthermore we need to split enable() into pre_enable() which covers steps 2-5 from above and enable() which covers step 7 and is called after the host bridge's enable(). Signed-off-by:
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Frieder Schrempf authored
According to the documentation [1] the proper enable flow is: 1. Enable DSI link and keep data lanes in LP-11 (stop state) 2. Disable stop state to bring data lanes into HS mode Currently we do this all at once within enable(), which doesn't allow to meet the requirements of some downstream bridges. To fix this we now enable the DSI in pre_enable() and force it into stop state using the FORCE_STOP_STATE bit in the ESCMODE register until enable() is called where we reset the bit. We currently do this only for i.MX8M as Exynos uses a different init flow where samsung_dsim_init() is called from samsung_dsim_host_transfer(). [1] https://docs.kernel.org/gpu/drm-kms-helpers.html#mipi-dsi-bridge-operationSigned-off-by:
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Alexander Stein authored
This map was created from register map from datasheet (section 5.1.2). Unused registers are stated by address, so they show up in debugfs as well. Signed-off-by:
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- 24 May, 2023 5 commits
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Rob Clark authored
The restriction about no whitespace, etc, really only applies to the usage of strings in keys. Values can contain anything (other than newline). Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by:
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Rob Clark authored
Use the new helper to export stats about memory usage. v2: Drop unintended hunk v3: Rebase Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com> Acked-by:
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Rob Clark authored
Add support to dump GEM stats to fdinfo. v2: Fix typos, change size units to match docs, use div_u64 v3: Do it in core v4: more kerneldoc v5: doc fixes v6: Actually use u64, bit more comment docs Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by:
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Rob Clark authored
v2: Rebase on drm-misc-next Signed-off-by:
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Rob Clark authored
Now that we have a common helper, use it. v2: Rebase on drm-misc-next Signed-off-by:
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