- 13 Jun, 2022 1 commit
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Rob Clark authored
In msm_devfreq_suspend() we cancel idle_work synchronously so that it doesn't run after we power of the hw or in the resume path. But this means that we want to ensure that idle_work is not scheduled *after* we no longer hold a runpm ref. So switch the ordering of pm_runtime_put() vs msm_devfreq_idle(). v2. Only move the runpm _put_autosuspend, and not the _mark_last_busy() Fixes: 9bc95570 ("drm/msm: Devfreq tuning") Signed-off-by:
Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20210927152928.831245-1-robdclark@gmail.comReviewed-by:
Akhil P Oommen <quic_akhilpo@quicinc.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20220608161334.2140611-1-robdclark@gmail.comSigned-off-by:
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- 07 Jun, 2022 1 commit
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Maximilian Luz authored
Following commit 17e822f7 ("drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}"), any call to adreno_unbind() will disable runtime PM twice, as indicated by the call trees below: adreno_unbind() -> pm_runtime_force_suspend() -> pm_runtime_disable() adreno_unbind() -> gpu->funcs->destroy() [= aNxx_destroy()] -> adreno_gpu_cleanup() -> pm_runtime_disable() Note that pm_runtime_force_suspend() is called right before gpu->funcs->destroy() and both functions are called unconditionally. With recent addition of the eDP AUX bus code, this problem manifests itself when the eDP panel cannot be found yet and probing is deferred. On the first probe attempt, we disable runtime PM twice as described above. This then causes any later probe attempt to fail with [drm:adreno_load_gpu [msm]] *ERROR* Couldn't power up the GPU: -13 preventing the driver from loading. As there seem to be scenarios where the aNxx_destroy() functions are not called from adreno_unbind(), simply removing pm_runtime_disable() from inside adreno_unbind() does not seem to be the proper fix. This is what commit 17e822f7 ("drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}") intended to fix. Therefore, instead check whether runtime PM is still enabled, and only disable it in that case. Fixes: 17e822f7 ("drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup}") Signed-off-by:
Maximilian Luz <luzmaximilian@gmail.com> Tested-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Rob Clark <robdclark@gmail.com> Link: https://lore.kernel.org/r/20220606211305.189585-1-luzmaximilian@gmail.comSigned-off-by:
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- 02 Jun, 2022 2 commits
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Rob Clark authored
If a GEM object is allocated, and then exported as a dma-buf fd which is mmap'd before or without the GEM buffer being directly mmap'd, the vma_node could be unitialized. This leads to a situation where the CPU mapping is not correctly torn down in drm_vma_node_unmap(). Fixes: e5516553 ("drm: call drm_gem_object_funcs.mmap with fake offset") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220531200857.136547-1-robdclark@gmail.com
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Rob Clark authored
Merge tag 'msm-next-5.19-fixes-06-01' of https://gitlab.freedesktop.org/abhinavk/msm into msm-fixes-staging 5.19 fixes for msm-next - Fix to add minimum ICC vote in the msm_mdss pm_resume path to address bootup splats - Fix to avoid dereferencing without checking in WB encoder - Fix to avoid crash during suspend in DP driver by ensuring interrupt mask bits are updated - Remove unused code from dpu_encoder_virt_atomic_check() - Fix to remove redundant init of dsc variable Signed-off-by:
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- 01 Jun, 2022 5 commits
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Douglas Anderson authored
In commit a670ff57 ("drm/msm/dpu: always use mdp device to scale bandwidth") we fully moved interconnect stuff to the DPU driver. This had no change for sc7180 but _did_ have an impact for other SoCs. It made them match the sc7180 scheme. Unfortunately, the sc7180 scheme seems like it was a bit broken. Specifically the interconnect needs to be on for more than just the DPU driver's AXI bus. In the very least it also needs to be on for the DSI driver's AXI bus. This can be seen fairly easily by doing this on a ChromeOS sc7180-trogdor class device: set_power_policy --ac_screen_dim_delay=5 --ac_screen_off_delay=10 sleep 10 cd /sys/bus/platform/devices/ae94000.dsi/power echo on > control When you do that, you'll get a warning splat in the logs about "gcc_disp_hf_axi_clk status stuck at 'off'". One could argue that perhaps what I have done above is "illegal" and that it can't happen naturally in the system because in normal system usage the DPU is pretty much always on when DSI is on. That being said: * In official ChromeOS builds (admittedly a 5.4 kernel with backports) we have seen that splat at bootup. * Even though we don't use "autosuspend" for these components, we don't use the "put_sync" variants. Thus plausibly the DSI could stay "runtime enabled" past when the DPU is enabled. Techncially we shouldn't do that if the DPU's suspend ends up yanking our clock. Let's change things such that the "bare minimum" request for the interconnect happens in the mdss driver again. That means that all of the children can assume that the interconnect is on at the minimum bandwidth. We'll then let the DPU request the higher amount that it wants. It should be noted that this isn't as hacky of a solution as it might initially appear. Specifically: * Since MDSS and DPU individually get their own references to the interconnect then the framework will actually handle aggregating them. The two drivers are _not_ clobbering each other. * When the Qualcomm interconnect driver aggregates it takes the max of all the peaks. Thus having MDSS request a peak, as we're doing here, won't actually change the total interconnect bandwidth (it won't be added to the request for the DPU). This perhaps explains why the "average" requested in MDSS was historically 0 since that one _would_ be added in. NOTE also that in the downstream ChromeOS 5.4 and 5.15 kernels, we're also seeing some RPMH hangs that are addressed by this fix. These hangs are showing up in the field and on _some_ devices with enough stress testing of suspend/resume. Specifically right at suspend time with a stack crawl that looks like this (from chromeos-5.15 tree): rpmh_write_batch+0x19c/0x240 qcom_icc_bcm_voter_commit+0x210/0x420 qcom_icc_set+0x28/0x38 apply_constraints+0x70/0xa4 icc_set_bw+0x150/0x24c dpu_runtime_resume+0x50/0x1c4 pm_generic_runtime_resume+0x30/0x44 __genpd_runtime_resume+0x68/0x7c genpd_runtime_resume+0x12c/0x20c __rpm_callback+0x98/0x138 rpm_callback+0x30/0x88 rpm_resume+0x370/0x4a0 __pm_runtime_resume+0x80/0xb0 dpu_kms_enable_commit+0x24/0x30 msm_atomic_commit_tail+0x12c/0x630 commit_tail+0xac/0x150 drm_atomic_helper_commit+0x114/0x11c drm_atomic_commit+0x68/0x78 drm_atomic_helper_disable_all+0x158/0x1c8 drm_atomic_helper_suspend+0xc0/0x1c0 drm_mode_config_helper_suspend+0x2c/0x60 msm_pm_prepare+0x2c/0x40 pm_generic_prepare+0x30/0x44 genpd_prepare+0x80/0xd0 device_prepare+0x78/0x17c dpm_prepare+0xb0/0x384 dpm_suspend_start+0x34/0xc0 We don't completely understand all the mechanisms in play, but the hang seemed to come and go with random factors. It's not terribly surprising that the hang is gone after this patch since the line of code that was failing is no longer present in the kernel. Fixes: a670ff57 ("drm/msm/dpu: always use mdp device to scale bandwidth") Fixes: c33b7c03 ("drm/msm/dpu: add support for clk and bw scaling for display") Signed-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> # RB3 (sdm845) and Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
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Haowen Bai authored
The phys_enc->wb_idx is dereferencing before null checking, so move it after checking. Signed-off-by:
Haowen Bai <baihaowen@meizu.com> Reviewed-by:
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Jiapeng Chong authored
Eliminate the follow clang warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:544:33: warning: variable ‘mode’ set but not used [-Wunused-but-set-variable]. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Fixes: 3177589c("drm/msm/dpu: encoder: drop unused mode_fixup callback") Reviewed-by:
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Vinod Koul authored
Commit 58dca981 ("drm/msm/disp/dpu1: Add support for DSC in encoder") added dsc_common_mode variable which was set to zero but then again programmed, so drop the superfluous init. Fixes: 58dca981 ("drm/msm/disp/dpu1: Add support for DSC in encoder") Reported-by:
kernel test robot <yujie.liu@intel.com> Reviewed-by:
Vinod Koul <vkoul@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/487208/ Link: https://lore.kernel.org/r/20220525073912.2706505-1-vkoul@kernel.orgSigned-off-by:
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Kuogee Hsieh authored
dp_catalog_ctrl_reset() will software reset DP controller. But it will not reset programmable registers to default value. DP driver still have to clear mask bits to interrupt status registers to disable interrupts after software reset of controller. At current implementation, dp_ctrl_reset_irq_ctrl() will software reset dp controller but did not call dp_catalog_ctrl_enable_irq(false) to clear hpd related interrupt mask bits to disable hpd related interrupts due to it mistakenly think hpd related interrupt mask bits will be cleared by software reset of dp controller automatically. This mistake may cause system to crash during suspending procedure due to unexpected irq fired and trigger event thread to access dp controller registers with controller clocks are disabled. This patch fixes system crash during suspending problem by removing "enable" flag condition checking at dp_ctrl_reset_irq_ctrl() so that hpd related interrupt mask bits are cleared to prevent unexpected from happening. Changes in v2: -- add more details commit text Changes in v3: -- add synchrons_irq() -- add atomic_t suspended Changes in v4: -- correct Fixes's commit ID -- remove synchrons_irq() Changes in v5: -- revise commit text Changes in v6: -- add event_lock to protect "suspended" Changes in v7: -- delete "suspended" flag Fixes: 989ebe7b ("drm/msm/dp: do not initialize phy until plugin interrupt received") Signed-off-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by:
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- 19 May, 2022 2 commits
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https://gitlab.freedesktop.org/abhinavk/msmRob Clark authored
Merge tag 'msm-next-5.19-fixes' of https://gitlab.freedesktop.org/abhinavk/msm into msm-fixes-staging 5.19 fixes for msm-next - Limiting WB modes to max sspp linewidth - Fixing the supported rotations to add 180 back for IGT - Fix to handle pm_runtime_get_sync() errors to avoid unclocked access in the bind() path for dpu driver - Fix the irq_free() without request issue which was a big-time hitter in the CI-runs. Signed-off-by:
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Abhinav Kumar authored
If there are errors while trying to enable the pm in the bind path, it will lead to unclocked access of hw revision register thereby crashing the device. This will not address why the pm_runtime_get_sync() fails but at the very least we should be able to prevent the crash by handling the error and bailing out earlier. changes in v2: - use pm_runtime_resume_and_get() instead of pm_runtime_get_sync() Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support") Signed-off-by:
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- 18 May, 2022 7 commits
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Abhinav Kumar authored
DRM_MODE_ROTATE_180 was previously marked as supported even for devices not supporting inline rotation. This is true because the SSPPs can always flip the image. After inline rotation support changes, this bit was removed and kms_rotation_crc IGT test starts skipping now whereas it was previously passing. Restore DRM_MODE_ROTATE_180 bit to the supported rotations list. Fixes: dabfdd89 ("add inline rotation support for sc7280") Signed-off-by:
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Dmitry Baryshkov authored
As msm_drm_uninit() is called from the msm_drm_init() error path, additional care should be necessary as not to call the free_irq() for the IRQ that was not requested before (because an error occured earlier than the request_irq() call). This fixed the issue reported with the following backtrace: [ 8.571329] Trying to free already-free IRQ 187 [ 8.571339] WARNING: CPU: 0 PID: 76 at kernel/irq/manage.c:1895 free_irq+0x1e0/0x35c [ 8.588746] Modules linked in: pmic_glink pdr_interface fastrpc qrtr_smd snd_soc_hdmi_codec msm fsa4480 gpu_sched drm_dp_aux_bus qrtr i2c_qcom_geni crct10dif_ce qcom_stats qcom_q6v5_pas drm_display_helper gpi qcom_pil_info drm_kms_helper qcom_q6v5 qcom_sysmon qcom_common qcom_glink_smem qcom_rng mdt_loader qmi_helpers phy_qcom_qmp ufs_qcom typec qnoc_sm8350 socinfo rmtfs_mem fuse drm ipv6 [ 8.624154] CPU: 0 PID: 76 Comm: kworker/u16:2 Not tainted 5.18.0-rc5-next-20220506-00033-g6cee8cab6089-dirty #419 [ 8.624161] Hardware name: Qualcomm Technologies, Inc. SM8350 HDK (DT) [ 8.641496] Workqueue: events_unbound deferred_probe_work_func [ 8.647510] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 8.654681] pc : free_irq+0x1e0/0x35c [ 8.658454] lr : free_irq+0x1e0/0x35c [ 8.662228] sp : ffff800008ab3950 [ 8.665642] x29: ffff800008ab3950 x28: 0000000000000000 x27: ffff16350f56a700 [ 8.672994] x26: ffff1635025df080 x25: ffff16350251badc x24: ffff16350251bb90 [ 8.680343] x23: 0000000000000000 x22: 00000000000000bb x21: ffff16350e8f9800 [ 8.687690] x20: ffff16350251ba00 x19: ffff16350cbd5880 x18: ffffffffffffffff [ 8.695039] x17: 0000000000000000 x16: ffffa2dd12179434 x15: ffffa2dd1431d02d [ 8.702391] x14: 0000000000000000 x13: ffffa2dd1431d028 x12: 662d79646165726c [ 8.709740] x11: ffffa2dd13fd2438 x10: 000000000000000a x9 : 00000000000000bb [ 8.717111] x8 : ffffa2dd13fd23f0 x7 : ffff800008ab3750 x6 : 00000000fffff202 [ 8.724487] x5 : ffff16377e870a18 x4 : 00000000fffff202 x3 : ffff735a6ae1b000 [ 8.731851] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff1635015f8000 [ 8.739217] Call trace: [ 8.741755] free_irq+0x1e0/0x35c [ 8.745198] msm_drm_uninit.isra.0+0x14c/0x294 [msm] [ 8.750548] msm_drm_bind+0x28c/0x5d0 [msm] [ 8.755081] try_to_bring_up_aggregate_device+0x164/0x1d0 [ 8.760657] __component_add+0xa0/0x170 [ 8.764626] component_add+0x14/0x20 [ 8.768337] dp_display_probe+0x2a4/0x464 [msm] [ 8.773242] platform_probe+0x68/0xe0 [ 8.777043] really_probe.part.0+0x9c/0x28c [ 8.781368] __driver_probe_device+0x98/0x144 [ 8.785871] driver_probe_device+0x40/0x140 [ 8.790191] __device_attach_driver+0xb4/0x120 [ 8.794788] bus_for_each_drv+0x78/0xd0 [ 8.798751] __device_attach+0xdc/0x184 [ 8.802713] device_initial_probe+0x14/0x20 [ 8.807031] bus_probe_device+0x9c/0xa4 [ 8.810991] deferred_probe_work_func+0x88/0xc0 [ 8.815667] process_one_work+0x1d0/0x320 [ 8.819809] worker_thread+0x14c/0x444 [ 8.823688] kthread+0x10c/0x110 [ 8.827036] ret_from_fork+0x10/0x20 Reported-by:
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Abhinav Kumar authored
Writeback modes were being added according to mode_config.max_width but this is assigned to double of max_mixer_width. For compositors/clients using a single SSPP, this will fail the dpu_plane's atomic check as it checks for max_linewidth. Limit writeback modes according to max_linewidth to allow even compositors/clients which use only a single SSPP to use writeback. Fixes: 77b001ac ("drm/msm/dpu: add the writeback connector layer") Reported-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Signed-off-by:
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Hangyu Hua authored
drm_gem_object_lookup will call drm_gem_object_get inside. So cursor_bo needs to be put when msm_gem_get_and_pin_iova fails. Fixes: e172d10a ("drm/msm/mdp5: Add hardware cursor support") Signed-off-by:
Hangyu Hua <hbh25y@gmail.com> Link: https://lore.kernel.org/r/20220509061125.18585-1-hbh25y@gmail.comSigned-off-by:
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Rob Clark authored
The offset got dropped by accident. Fixes: d413e6f9 ("drm/msm: Drop msm_gem_iova()") Signed-off-by:
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Miaoqian Lin authored
of_parse_phandle() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. a6xx_gmu_init() passes the node to of_find_device_by_node() and of_dma_configure(), of_find_device_by_node() will takes its reference, of_dma_configure() doesn't need the node after usage. Add missing of_node_put() to avoid refcount leak. Fixes: 4b565ca5 ("drm/msm: Add A6XX device support") Signed-off-by:
Miaoqian Lin <linmq006@gmail.com> Reviewed-by:
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Douglas Anderson authored
Commit 7d8e9a90 ("drm/msm/dsi: move DSI host powerup to modeset time") caused sc7180 Chromebooks that use the parade-ps8640 bridge chip to fail to turn the display back on after it turns off. Unfortunately, it doesn't look easy to fix the parade-ps8640 driver to handle the new power sequence. The Linux driver has almost nothing in it and most of the logic for this bridge chip is in black-box firmware that the bridge chip uses. Also unfortunately, reverting the patch will break "tc358762". The long term solution here is probably Dave Stevenson's series [1] that would give more flexibility. However, that is likely not a quick fix. For the short term, we'll look at the compatible of the next bridge in the chain and go back to the old way for the Parade PS8640 bridge chip. If it's found that other bridge chips also need this workaround then we can add them to the list or consider inverting the condition. However, the hope is that the framework will not take too much longer to land and we won't have to add anything other than ps8640 here. [1] https://lore.kernel.org/r/cover.1646406653.git.dave.stevenson@raspberrypi.com Fixes: 7d8e9a90 ("drm/msm/dsi: move DSI host powerup to modeset time") Suggested-by:
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- 07 May, 2022 3 commits
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Dmitry Baryshkov authored
For the past several releases I have been assisting Rob by writing, collecting, testing and integrating patches for non-GPU and non-core parts of MSM DRM driver, while Rob is more interested in improving the GPU-related part. Let's note this in the MAINTAINERS file. While we are at it, per Rob's suggestion let's also promote Abhinav Kumar to M: (as he is actively working on the driver) and switch Sean Paul to R: (since he isn't doing much on msm these days). Signed-off-by:
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Dmitry Baryshkov authored
There is no need to check that kfree() argument is not NULL. Remove extra check and call kfree() unconditionally. Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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Rob Clark authored
Running the GPU without an IOMMU is not really a supported (or sane) configuration. Yet it can be useful during SoC bringup (ie. if the iommu driver doesn't work yet). Lets limit it to users who already have /dev/mem access, to avoid the chance that a user accidentially configures kernel without IOMMU support. Signed-off-by:
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- 06 May, 2022 11 commits
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Dmitry Baryshkov authored
Remove dividers that are not recommended for DSI DPHY mode when setting up the clock tree for the DSI pixel clock. Signed-off-by:
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Douglas Anderson authored
When rebooting on my sc7280-herobrine based device, I got a crash. Upon debugging, I found that I was in msm_drv_shutdown() and my "pdev" was the one associated with mdss_probe(). From source, I found that mdss_probe() has the line: platform_set_drvdata(pdev, mdss); ...where "mdss" is of type "struct msm_mdss *". Also from source, I saw that in msm_drv_shutdown() we have the line: struct msm_drm_private *priv = platform_get_drvdata(pdev); This is a mismatch and is the root of the problem. Further digging made it apparent that msm_drv_shutdown() is only supposed to be used for parts of the msm display framework that also call msm_drv_probe() but mdss_probe() doesn't call msm_drv_probe(). Let's remove the shutdown functon from msm_mdss.c. Digging a little further, code inspection found that two drivers that use msm_drv_probe() weren't calling msm_drv_shutdown(). Let's add it to them. Fixes: 6874f48b ("drm/msm: make mdp5/dpu devices master components") Signed-off-by:
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Dan Carpenter authored
The msm_gem_prime_get_sg_table() needs to return error pointers on error. This is called from drm_gem_map_dma_buf() and returning a NULL will lead to a crash in that function. Fixes: ac451467 ("drm/msm: fix msm_gem_prime_get_sg_table()") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
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Jessica Zhang authored
There is a possibility for mdp5_get_global_state to return -EDEADLK when acquiring the modeset lock, but currently global_state in mdp5_mixer_release doesn't check for if an error is returned. To avoid a NULL dereference error, let's have mdp5_mixer_release check if an error is returned and propagate that error. Reported-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by:
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Jessica Zhang authored
mdp5_get_global_state runs the risk of hitting a -EDEADLK when acquiring the modeset lock, but currently mdp5_pipe_release doesn't check for if an error is returned. Because of this, there is a possibility of mdp5_pipe_release hitting a NULL dereference error. To avoid this, let's have mdp5_pipe_release check if mdp5_get_global_state returns an error and propogate that error. Changes since v1: - Separated declaration and initialization of *new_state to avoid compiler warning - Fixed some spelling mistakes in commit message Changes since v2: - Return 0 in case where hwpipe is NULL as this is considered normal behavior - Added 2nd patch in series to fix a similar NULL dereference issue in mdp5_mixer_release Reported-by:
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Kuogee Hsieh authored
Event thread supposed to exit from its while loop after kthread_stop(). However there may has possibility that event thread is pending in the middle of wait_event due to condition checking never become true. To make sure event thread exit its loop after kthread_stop(), this patch OR kthread_should_stop() into wait_event's condition checking so that event thread will exit its loop after kernal_stop(). Changes in v2: -- correct spelling error at commit title Changes in v3: -- remove unnecessary parenthesis -- while(1) to replace while (!kthread_should_stop()) Reported-by:
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Dmitry Baryshkov authored
Correct a typo in the address of the second DSI PHY in the SDM660 device config. Fixes: 694dd304 ("drm/msm/dsi: Add phy configuration for SDM630/636/660") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/484697/ Link: https://lore.kernel.org/r/20220503204340.935532-1-dmitry.baryshkov@linaro.orgSigned-off-by:
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Konrad Dybcio authored
Due to MSM8998 support having been stuck in review for so long, another struct was added nearby, which confused git and resulted in the definitions not being sorted alphabetically. Fix it. Signed-off-by:
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Vinod Polimera authored
If edp modeset init is failed due to panel being not ready and probe defers during drm bind, avoid clearing irqs and dereference hw_intr when hw_intr is null. BUG: Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000 Call trace: dpu_core_irq_uninstall+0x50/0xb0 dpu_irq_uninstall+0x18/0x24 msm_drm_uninit+0xd8/0x16c msm_drm_bind+0x580/0x5fc try_to_bring_up_master+0x168/0x1c0 __component_add+0xb4/0x178 component_add+0x1c/0x28 dp_display_probe+0x38c/0x400 platform_probe+0xb0/0xd0 really_probe+0xcc/0x2c8 __driver_probe_device+0xbc/0xe8 driver_probe_device+0x48/0xf0 __device_attach_driver+0xa0/0xc8 bus_for_each_drv+0x8c/0xd8 __device_attach+0xc4/0x150 device_initial_probe+0x1c/0x28 Changes in V2: - Update commit message and coreect fixes tag. Fixes: f25f6566 ("drm/msm/dpu: merge struct dpu_irq into struct dpu_hw_intr") Signed-off-by:
Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-by:
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Dmitry Baryshkov authored
Move the initializer for the mode variable to the declaration point to remove unitialized variable access from the DEBUG_DPU macro. This fixes the following warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c:250:37: note: initialize the variable 'mode' to silence this warning Fixes: d7d0e73f ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") Reported-by:
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Abhinav Kumar authored
Add missing break statement for dpu_hw_ctl_update_pending_flush_wb(). Otherwise this leads to below build warning. drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: warning: unannotated fall-through between switch labels default: ^ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c:273:2: note: insert 'break;' to avoid fall-through default: ^ break; 1 warning generated. Fixes: 6d084806 ("drm/msm/dpu: add changes to support writeback in hw_ctl") Reported-by:
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- 02 May, 2022 1 commit
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Luca Weiss authored
Check if 'aspace' is set before using it as it will stay null without IOMMU, such as on msm8974. Fixes: bc211258 ("drm/msm/gpu: Track global faults per address-space") Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20220421203455.313523-1-luca@z3ntu.xyzSigned-off-by:
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- 01 May, 2022 7 commits
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Dmitry Baryshkov authored
The msm driver has dropped support for older eDP block. However the merge conflict in the commit 4ce2ca4b ("drm/msm: Fix include statements for DisplayPort") was resolved incorrectly and two files were left in place. Drop them now (again). Fixes: 4ce2ca4b ("drm/msm: Fix include statements for DisplayPort") Signed-off-by:
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Dmitry Baryshkov authored
Add explicit include of drm_bridge.h to the msm_drv.c to fix the following warning: drivers/gpu/drm/msm/msm_drv.c:236:17: error: implicit declaration of function 'drm_bridge_remove'; did you mean 'drm_bridge_detach'? [-Werror=implicit-function-declaration] Fixes: d28ea556 ("drm/msm: properly add and remove internal bridges") Reported-by:
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Dmitry Baryshkov authored
The downstream uses read-modify-write for updating command mode compression registers. Let's follow this approach. This also fixes the following warning: drivers/gpu/drm/msm/dsi/dsi_host.c:918:23: warning: variable 'reg_ctrl' set but not used [-Wunused-but-set-variable] Reported-by:
Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/484305/ Link: https://lore.kernel.org/r/20220430175533.3817792-1-dmitry.baryshkov@linaro.orgSigned-off-by:
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Marijn Suijten authored
While there's a comment pointing from dpu_intr_set to dpu_hw_intr_reg and vice-versa, an array initializer using indices makes it so that the indices between the enum and array cannot possibly get out of sync even if they're accidentially ordered wrongly. It is still useful to keep the comment to be made aware where the register offset mapping resides while looking at dpu_hw_intr_reg. Signed-off-by:
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Jessica Zhang authored
Currently, dpu_hw_lm_collect_misr returns EINVAL if CRC is disabled. This causes a lot of spam in the DRM debug logs as it's called for every vblank. Instead of returning EINVAL when CRC is disabled in dpu_hw_lm_collect_misr, let's return ENODATA and add an extra ENODATA check before the debug log in dpu_crtc_get_crc. Changes since V1: - Added reported-by and suggested-by tags Reported-by:
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Vinod Polimera authored
Set mdp clock to max clock rate during probe/bind sequence from the opp table so that rails are not at undetermined state. Since we do not know what will be the rate set in boot loader, it would be ideal to vote at max frequency. There could be a firmware display programmed in bootloader and we want to transition it to kernel without underflowing. The clock will be scaled down later when framework sends an update. Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support") Signed-off-by:
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Abhinav Kumar authored
Remove the unused local variable refcount for encoder_phys_wb as the one part of wb_enc is used directly. changes in v2: - remove usage of ret variable also - remove the if (ret) code as it was dead-code anyway Fixes: d7d0e73f ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") Reported-by:
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