1. 24 Dec, 2010 1 commit
    • eric miao's avatar
      ARM: 6532/1: Allow machine to specify it's own IRQ handlers at run-time · 52108641
      eric miao authored
      Normally different ARM platform has different way to decode the IRQ
      hardware status and demultiplex to the corresponding IRQ handler.
      This is highly optimized by macro irq_handler in entry-armv.S, and
      each machine defines their own macro to decode the IRQ number.
      However, this prevents multiple machine classes to be built into a
      single kernel.
      
      By allowing each machine to specify thier own handler, and making
      function pointer 'handle_arch_irq' to point to it at run time, this
      can be solved. And introduce CONFIG_MULTI_IRQ_HANDLER to allow both
      solutions to work.
      
      Comparing with the highly optimized macro of irq_handler, the new
      function must be written with care not to lose too much performance.
      And the IPI stuff on SMP is expected to move to the provided arch
      IRQ handler as well.
      
      The assembly code to invoke handle_arch_irq is optimized by Russell
      King.
      Signed-off-by: default avatarEric Miao <eric.miao@canonical.com>
      Acked-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      52108641
  2. 05 Dec, 2010 4 commits
  3. 26 Nov, 2010 3 commits
  4. 04 Nov, 2010 2 commits
    • Leif Lindholm's avatar
      ARM: 6396/1: Add SWP/SWPB emulation for ARMv7 processors · 64d2dc38
      Leif Lindholm authored
      The SWP instruction was deprecated in the ARMv6 architecture,
      superseded by the LDREX/STREX family of instructions for
      load-linked/store-conditional operations. The ARMv7 multiprocessing
      extensions mandate that SWP/SWPB instructions are treated as undefined
      from reset, with the ability to enable them through the System Control
      Register SW bit.
      
      This patch adds the alternative solution to emulate the SWP and SWPB
      instructions using LDREX/STREX sequences, and log statistics to
      /proc/cpu/swp_emulation. To correctly deal with copy-on-write, it also
      modifies cpu_v7_set_pte_ext to change the mappings to priviliged RO when
      user RO.
      Signed-off-by: default avatarLeif Lindholm <leif.lindholm@arm.com>
      Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Acked-by: default avatarKirill A. Shutemov <kirill@shutemov.name>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      64d2dc38
    • Catalin Marinas's avatar
      ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUs · 247055aa
      Catalin Marinas authored
      This patch removes the domain switching functionality via the set_fs and
      __switch_to functions on cores that have a TLS register.
      
      Currently, the ioremap and vmalloc areas share the same level 1 page
      tables and therefore have the same domain (DOMAIN_KERNEL). When the
      kernel domain is modified from Client to Manager (via the __set_fs or in
      the __switch_to function), the XN (eXecute Never) bit is overridden and
      newer CPUs can speculatively prefetch the ioremap'ed memory.
      
      Linux performs the kernel domain switching to allow user-specific
      functions (copy_to/from_user, get/put_user etc.) to access kernel
      memory. In order for these functions to work with the kernel domain set
      to Client, the patch modifies the LDRT/STRT and related instructions to
      the LDR/STR ones.
      
      The user pages access rights are also modified for kernel read-only
      access rather than read/write so that the copy-on-write mechanism still
      works. CPU_USE_DOMAINS gets disabled only if the hardware has a TLS register
      (CPU_32v6K is defined) since writing the TLS value to the high vectors page
      isn't possible.
      
      The user addresses passed to the kernel are checked by the access_ok()
      function so that they do not point to the kernel space.
      Tested-by: default avatarAnton Vorontsov <cbouatmailru@gmail.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      247055aa
  5. 03 Nov, 2010 6 commits
  6. 02 Nov, 2010 7 commits
  7. 01 Nov, 2010 17 commits