Add the required nodes to support display output via the HDMI port.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-10-4cbb567743bb@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add interconnect provider nodes and hook up interconnects to consumer
devices, including bwmon.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-9-4cbb567743bb@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add the required nodes to support display on QCM2290.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-8-4cbb567743bb@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one.
Failing to provide it may result in register accesses failing and that's
never good.

Add the missing path.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-7-4cbb567743bb@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

MDSS, aside from the MDP-MEM path, also requires the CPU-DISP_CFG one.
Failing to provide it may result in register accesses failing and that's
never good.

Add the missing path.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-6-4cbb567743bb@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

When a handle to QMP is accessible, we can query even more internal
power management stats. Add it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231130-topic-ddr_sleep_stats-v1-3-5981c2e764b6@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add type-c node to feature otg function and set usb-role-switch property
for usb_1_dwc3 to enable usb otg.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20231126022849.14273-2-lujianhua000@gmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

There are two typos in this dtsi, so fix it.
  classis -> chassis.
  80700000 -> 80600000
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Link: https://lore.kernel.org/r/20231126022849.14273-1-lujianhua000@gmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Consider an object near to the sensor when their distance is about 4 cm
or below.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20231126-bqm5_prox-v2-1-b7defc3979ac@apitzsch.euSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Enable the QCA bluetooth on RB2. It identifies like the following:

Bluetooth: hci0: QCA Product ID   :0x0000000a
Bluetooth: hci0: QCA SOC Version  :0x40020150
Bluetooth: hci0: QCA ROM Version  :0x00000201
Bluetooth: hci0: QCA Patch Version:0x00000001
Bluetooth: hci0: QCA controller version 0x01500201
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-2-4bbf266258ef@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Hook up UART3, usually used for communicating with a Bluetooth module.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231120-topic-rb2_bt-v2-1-4bbf266258ef@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Configure and enable the WCNSS which provides WiFi and Bluetooth on this
device using the WCN3680B chip.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20231127-fp3-wcnss-v2-1-a5154fae4768@z3ntu.xyzSigned-off-by: Bjorn Andersson <andersson@kernel.org>

This link got broken by commit e790a4ce ("arm: docs: Move Arm
documentation to Documentation/arch/") when the doc moved from arm/ to
arch/arm/. Fix the link so that it can continue to be followed.

Fixes: e790a4ce ("arm: docs: Move Arm documentation to Documentation/arch/")
Cc: Alexandre TORGUE <alexandre.torgue@foss.st.com>
Cc: Yanteng Si <siyanteng@loongson.cn>
Cc: Jonathan Corbet <corbet@lwn.net>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20231129030443.2753833-1-swboyd@chromium.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add DTS for Qualcomm qcs6490-rb3gen2 board which uses
QCS6490 SoC. This adds debug uart and usb support along
with regulators found on this board.
Co-developed-by: Naina Mehta <quic_nainmeht@quicinc.com>
Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20231129065816.26409-4-quic_kbajaj@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add DTS for Qualcomm IDP platform using QCM6490 SoC.
This adds debug uart, eMMC and usb support along with
regulators found on this board.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20231129065816.26409-3-quic_kbajaj@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Document the qcom,qcm6490-idp and qcs6490-rb3gen2 boards.
qcm6490-idp based off qcm6490 SoC derived from sc7280 meant for
various form factor including IoT and qcs6490-rb3gen2 based off
qcs6490 SoC derivative of qcm6490 without internal modem.

Co-developed by: Naina Mehta <quic_nainmeht@quicinc.com>
Signed-off by: Naina Mehta <quic_nainmeht@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231129065816.26409-2-quic_kbajaj@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Some gpios are reserved for other subsystems, so mark these reserved
gpios.
Suggested-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231129103325.24854-6-quic_tengfan@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add uart support for QRD4450 for enable uart console.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20231129103325.24854-5-quic_tengfan@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add base description of UART and TLMM nodes which helps SM4450
boot to shell with console on boards with this SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20231129103325.24854-4-quic_tengfan@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add device node for RPMH and Global clock controller on Qualcomm
SM4450 platform.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20231129103325.24854-3-quic_tengfan@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add apps_rsc node and cmd_db memory region for sm4450.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20231129103325.24854-2-quic_tengfan@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to
find them by matching globaly by name.

If not passed directly, driver maintains backwards compatibility by then
falling back to global lookup.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231013164025.3541606-2-robimarko@gmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

QMP PCI PHY PIPE clocks are inputs for the GCC clock controller.
In order to describe this in DTS, allow passing them as the inputs to GCC.

This has a benefit that it avoids doing a global matching by name.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231013164025.3541606-1-robimarko@gmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

This change add spi_3, spi_5 and spi_6 interfaces to
MSM8953 devices.
Signed-off-by: Gianluca Boiano <morf3089@gmail.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231013110531.84140-1-morf3089@gmail.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Configure the thermals for the QUIET_THERM, CAM_FLASH_THERM, MSM_THERM
and RFC_CAM_THERM thermistors connected to PM7325.

With this PMIC the software communication to the ADC is going through
PMK7325 (= PMK8350).
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-4-f14df01922e6@fairphone.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Configure the thermals for the XO_THERM line connected to PMK7325 (named
in software PMK8350).
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-3-f14df01922e6@fairphone.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Configure the thermals for the CHARGER_SKIN_THERM and USB_CONN_THERM
thermistors connected to PM7250B.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-2-f14df01922e6@fairphone.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add the defines for the ADC channels found on the PM7325. The list is
taken from downstream msm-5.4 and adjusted for mainline.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20231013-fp5-thermals-v1-1-f14df01922e6@fairphone.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

UFS host controller, when scaling gears, should choose appropriate
performance state of RPMh power domain controller along with clock
frequency. So let's add the OPP table support to specify both clock
frequency and RPMh performance states replacing the old "freq-table-hz"
property.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20231012172129.65172-6-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

UFS host controller, when scaling gears, should choose appropriate
performance state of RPMh power domain controller along with clock
frequency. So let's add the OPP table support to specify both clock
frequency and RPMh performance states replacing the old "freq-table-hz"
property.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[mani: Splitted pd change and used rpmhpd_opp_low_svs]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20231012172129.65172-5-manivannan.sadhasivam@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

IPQ bootloaders do not need these information to select the
the DTB blob. So dropping the board names from board section.
Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230927093130.4098385-1-quic_sridsn@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Add the APCS, A53 PLL, cpu-opp-table nodes to set
the CPU frequency at 800MHz (idle) or 1.008GHz.
Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230925102826.405446-4-quic_gokulsri@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-15-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-14-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-13-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-12-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-11-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-10-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-9-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>

Change the USB QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230824211952.1397699-8-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>