- 12 Sep, 2009 1 commit
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Russell King authored
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- 08 Sep, 2009 2 commits
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git://git.marvell.com/orionRussell King authored
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Simon Guinot authored
This patch add support for the 2Big Network LaCie boards. Signed-off-by:
Simon Guinot <sguinot@lacie.com> Signed-off-by:
Nicolas Pitre <nico@marvell.com>
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- 17 Aug, 2009 1 commit
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- 16 Aug, 2009 10 commits
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Ben Dooks authored
The show_fiq_list() call in arch/arm/kernel/irq.c currently depends on CONFIG_ARCH_ACORN, but this is not the only architecture that supports the usage of FIQ. Change to calling this if CONFIG_FIQ is set (which is what arch/arm/kernel/fiq.c is built by). Signed-off-by:
Ben Dooks <ben@simtec.co.uk> Signed-off-by:
Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Currently the S5PC100 does not define S3C_PA_NAND, leaving the NAND device definitions in arch/arm/plat-s3c/dev-nand.c unbuildable. Add a KConfig entry to select whether this is built. As backwards compatibility, both the S3C24XX and S3C64XX define the new configuration in their main Kconfig files until better support for basing this selection on a per-machine basis can be sorted out. Signed-off-by: -
Byungho Min authored
SMDKC100 board support. The board can be obtained from meritech (http://www.meritech.co.kr) Signed-off-by:
Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: fixup subject and description] Signed-off-by:
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Byungho Min authored
S5PC100 is a new SoC with ARM coretex-A8 and numerous peripherals. This SoC is successor of S3C64XX. S5PC100 has peripherals which are still similar to S3C families so some drivers in "arch/arm/plat-s3c" can be shared. S5PC100 specific drivers will be added in "arch/arm/plat-s5pcxx" or "arch/arm/mach-s5pc100" Signed-off-by:
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Byungho Min authored
S5PC100 has 4 PLLs (APLL,MPLL,EPLL,HPLL) and 3 clock domains. Clock scheme is implemented here. Signed-off-by:
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Byungho Min authored
S5PC100 has 3 VICs(Vectored Interrupt Controller). The VICs come from S3C64xx series, so the driver source code can be shared with S3C families. The S5PC100 has 3 VICs while S3C64xx has only 2. Signed-off-by:
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Byungho Min authored
S5PC100 has more GPIO group then previous one. It has 34 groups of GPIO, while S3C6410 has 17 groups. For now, only header files are written. Signed-off-by:
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Byungho Min authored
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Byungho Min authored
Serial driver of S5PC100 is the same as S3C6400, so S5PC100 shares the serial driver with S3C6400. Uart driver is copied from plat-s3c64xx to plat-s5pc1xx, as I do not use plat-s3c64xx directory. Signed-off-by:
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Byungho Min authored
S5PC100's the physical IO space starts at 0xe000"0000. To maximize space for vmalloc, the virtual IO space starts at 0xf400"0000 as same as other samsung CPUs(s3c24xx and s3c64xx) do. Signed-off-by:
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- 15 Aug, 2009 2 commits
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- 14 Aug, 2009 24 commits
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Ben Dooks authored
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Sascha Hauer authored
struct imx_fb_platform_data has changed and the mx21ads was forgotten to change. Fix it. Signed-off-by:Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
The OTG devices are only available on i.MX27, so ifdef them out for i.MX21. Signed-off-by: -
Valentin Longchamp authored
Signed-off-by:
Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by:
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Valentin Longchamp authored
These gpios are exported to userspace and are here to be used as a selector Signed-off-by:
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Valentin Longchamp authored
Signed-off-by:
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Valentin Longchamp authored
Signed-off-by:
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Luotao Fu authored
Signed-off-by:Luotao Fu <l.fu@pengutronix.de>
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Luotao Fu authored
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Luotao Fu authored
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Sascha Hauer authored
Fix the SPI clock names to match the device names. Signed-off-by: -
Sascha Hauer authored
The i.MX31 and the i.MX35 have different USB base addresses. Adjust the resources accordingly. Signed-off-by: -
Luotao Fu authored
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Sascha Hauer authored
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Sascha Hauer authored
Signed-off-by: -
Sascha Hauer authored
Signed-off-by: -
Valentin Longchamp authored
since all boards finally have this device Signed-off-by:
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Valentin Longchamp authored
Signed-off-by:
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Valentin Longchamp authored
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