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  1. 03 May, 2011 23 commits
  3. 02 May, 2011 17 commits
    • Anatolij Gustschin's avatar
      USB: extend ehci-fsl and fsl_udc_core driver for OTG operation · 83722bc9
      Anatolij Gustschin authored 
      Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
Cc: Li Yang <leoli@freescale.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      83722bc9
    • Li Yang's avatar
      USB: add Freescale USB OTG Transceiver driver · 0807c500
      Li Yang authored 
      Slightly reworked and cleaned up driver from Freescale LTIB
for MPC5121E. The driver has been ported to the current kernel,
proc interface "/proc/driver/fsl_usb2_otg" has been replaced by
sysfs interface.
Signed-off-by: default avatarLi Yang <leoli@freescale.com>
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      0807c500
    • Anatolij Gustschin's avatar
      USB: fsl_udc_core: support device mode of MPC5121E DR USB Controller · 2ea6698d
      Anatolij Gustschin authored 
      Extend the FSL UDC driver to support MPC5121E DR USB Controller
operation in device mode. Add MPC5121E specific init/uninit
at probe and remove and isolate system interface register accesses
when running on MPC5121E SoC, as these registers are not available
on this platform. This patch relies on previous patch for supporting
big endian registers and descriptors access in the FSL UDC driver.
Additionally support endpoint FIFO status operation by providing
appropriate callback in endpoint ops structure.

Also flush cache for the req buffer used for GetStatus reply.
Without this, the correct reply to an endpoint GetStatus
is written to 'req', but doesn't make it out to the USB bus
since the buffer hasn't been flushed. This would cause the
USBCV Halt Endpoint test to fail (according to changelog in
Freescale LTIB driver code).
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
Cc: Li Yang <leoli@freescale.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      2ea6698d
    • Anatolij Gustschin's avatar
      USB: fsl_udc_core: prepare for SoCs with BE registers and descriptors · 09ba0def
      Anatolij Gustschin authored 
      On some SoCs, the USB controller registers and descriptors can be big
or little endian, depending on the version of the chip. In order to be
able to run the same kernel binary on different versions of an SoC, the
BE/LE decision must be made at run time. Provide appropriate register
and descriptor accessors which are configurable at run time using the
configuration flags from fsl_usb2_platform_data data structure.

This is in preparation for adding support for MPC5121E DR USB2 Controller
to the FSL UDC driver.
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
Cc: Li Yang <leoli@freescale.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      09ba0def
    • Anatolij Gustschin's avatar
      USB: fix build of FSL MPH DR OF platform driver · b703e47e
      Anatolij Gustschin authored 
      When only FSL USB gadget driver is selected in the kernel
configuration the MPH DR OF driver for creation of FSL
USB platform devices from device tree won't be built.
As a result no USB platform devices for MPH DR USB controller
will be created at run time and no probing will be done in
the fsl_udc_core driver.

Add an entry to the Makefile to build the MPH DR OF
platform driver if CONFIG_USB_FSL_MPH_DR_OF is defined.
Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      b703e47e
    • Anatolij Gustschin's avatar
      USB: ehci-fsl: add MPC5121E specific suspend and resume · 13b7ee2a
      Anatolij Gustschin authored 
      Signed-off-by: default avatarAnatolij Gustschin <agust@denx.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
      13b7ee2a
    • Sarah Sharp's avatar
      xhci 1.0: Set transfer burst last packet count field. · b61d378f
      Sarah Sharp authored 
      The xHCI 1.0 specification defines a new isochronous TRB field, called
transfer burst last packet count (TBLPC).  This field defines the number
of packets in the last "burst" of packets in a TD.  Only SuperSpeed
endpoints can handle more than one burst, so this is set to the number for
packets in a TD for all non-SuperSpeed devices (minus one, since the field
is zero based).

This patch should have no effect on host controllers that don't advertise
the xHCI 1.0 (0x100) version number in their hci_version field.
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      b61d378f
    • Sarah Sharp's avatar
      xhci 1.0: Set transfer burst count field. · 5cd43e33
      Sarah Sharp authored 
      The xHCI 1.0 specification adds a new field to the fourth dword in an
isochronous TRB: the transfer burst count (TBC).  This field is only
non-zero for SuperSpeed devices.  Each SS endpoint sets the bMaxBurst
field in the SuperSpeed endpoint companion descriptor, which indicates how
many max-packet-sized "bursts" it can handle in one service interval.  The
device driver may choose to burst less max packet sized chunks each
service interval (which is defined by one TD).  The xHCI driver indicates
to the host controller how many bursts it needs to schedule through the
transfer burst count field.

This patch will only effect xHCI hosts that advertise 1.0 support (0x100)
in the HCI version field of their capabilities register.
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      5cd43e33
    • Sarah Sharp's avatar
      xhci 1.0: Update TD size field format. · 4da6e6f2
      Sarah Sharp authored 
      The xHCI 1.0 specification changes the format of the TD size field in
Normal and Isochronous TRBs.  The field in control TRBs is still set to
reserved zero.  Instead of representing the number of bytes left to
transfer in the TD (including the current TRB's buffer), it now represents
the number of packets left to transfer (*not* including this TRB).

See section 4.11.2.4 of the xHCI 1.0 specification for details.  The math
is basically copied straight from there.

Create a new function, xhci_v1_0_td_remainder(), that should be called for
all xHCI 1.0 host controllers.  The field location and maximum value is
still the same, so reuse the old function, xhci_td_remainder(), to handle
the bit shifting.
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      4da6e6f2
    • Sarah Sharp's avatar
      xhci 1.0: Only interrupt on short packet for IN EPs. · af8b9e63
      Sarah Sharp authored 
      It doesn't make sense to set the interrupt on short packet (TRB_ISP) flag
for TRBs queued to endpoints that only receive packets from the host
controller (i.e. OUT endpoints).  Packets can only be short when they are
sent from a USB device.  Plus, the xHCI 1.0 specification forbids setting
the flag for anything but IN endpoints.

While we're at it, remove some of my snide remarks about the inefficiency
of event data TRBs.
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      af8b9e63
    • Sarah Sharp's avatar
      xhci: Remove sparse warning about cmd_status. · 00161f7d
      Sarah Sharp authored 
      Sparse complains about the arguments to xhci_evaluate_context_result() and
xhci_configure_endpoint_result():

  CHECK   drivers/usb/host/xhci.c
drivers/usb/host/xhci.c:1647:53: warning: incorrect type in argument 3 (different signedness)
drivers/usb/host/xhci.c:1647:53:    expected int *cmd_status
drivers/usb/host/xhci.c:1647:53:    got unsigned int [usertype] *[assigned] cmd_status
drivers/usb/host/xhci.c:1648:50: warning: incorrect type in argument 3 (different signedness)
drivers/usb/host/xhci.c:1648:50:    expected int *cmd_status
drivers/usb/host/xhci.c:1648:50:    got unsigned int [usertype] *[assigned] cmd_status

The command status is taken from the command completion event TRB, and
will always be a positive number.  Change the signature of
xhci_evaluate_context_result() and xhci_configure_endpoint_result() to
take a u32 for cmd_status.
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      00161f7d
    • Andiry Xu's avatar
      usbcore: warm reset USB3 port in SS.Inactive state · 5e467f6e
      Andiry Xu authored 
      Some USB3.0 devices go to SS.Inactive state when hot plug to USB3 ports.
Warm reset the port to transition it to U0 state.

This patch fixes the issue that Kingston USB3.0 flash drive can not be
recognized when hot plug to USB3 port.
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      5e467f6e
    • Andiry Xu's avatar
      usbcore: Refine USB3.0 device suspend and resume · a7114230
      Andiry Xu authored 
      In the past, we use USB2.0 request to suspend and resume a USB3.0 device.
Actually, USB3.0 hub does not support Set/Clear PORT_SUSPEND request,
instead, it uses Set PORT_LINK_STATE request. This patch makes USB3.0 device
suspend/resume comply with USB3.0 specification.

This patch fixes the issue that USB3.0 device can not be suspended when
connected to a USB3.0 external hub.
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      a7114230
    • Andiry Xu's avatar
      xHCI: report USB3.0 portstatus comply with USB3.0 specification · 0ed9a57e
      Andiry Xu authored 
      USB3.0 specification has different wPortStatus and wPortChange definitions
from USB2.0 specification. Since USB3 root hub and USB2 root hub are split
now and USB3 hub only has USB3 protocol ports, we should modify the
portstatus and portchange report of USB3 ports to comply with USB3.0
specification.
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      0ed9a57e
    • Andiry Xu's avatar
      xHCI: Set link state support · 2c441780
      Andiry Xu authored 
      This patch adds support for Set Port Feature(PORT_LINK_STATE) request.

The most significant byte (bits 15..8) of the wIndex field specifies
the U state the host software wants to put the link connected to the
port into. This request is only valid when the PORT_ENABLE bit is set
and the PORT_LINK_STATE should not be above value '5' (Rx.Detect).

This request will be later used to replace the set/clear suspend USB3
protocol ports in hub driver.
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      2c441780
    • Andiry Xu's avatar
      xHCI: Clear link state change support · 85387c0e
      Andiry Xu authored 
      This patch adds support for Clear Port Feature(C_PORT_LINK_STATE)
request from usbcore.
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      85387c0e
    • Andiry Xu's avatar
      xHCI: warm reset support · a11496eb
      Andiry Xu authored 
      This patch adds warm reset support to xhci hub control.
It handles Set Port Feature(BH_PORT_RESET) and Clear Port Feature
(C_BH_PORT_RESET) request from usbcore.
Note warm reset is called BH reset some places in USB3.0 specification.
Signed-off-by: default avatarAndiry Xu <andiry.xu@amd.com>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      a11496eb
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