- 30 Jan, 2021 1 commit
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Arnd Bergmann authored
Merge tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.12-rc1 Fixes the pinmux configuration for the eMMC on the Ouya to fix issues with certain bootloaders. * tag 'tegra-for-5.12-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: ouya: Fix eMMC on specific bootloaders Link: https://lore.kernel.org/r/20210129193254.3610492-3-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 29 Jan, 2021 19 commits
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Peter Geis authored
Ouya fails to detect the eMMC module when booted via certain bootloaders. Fastboot and hard-kexec bootloaders fail while u-boot does not. It was discovered that the issue manifests if the sdmmc4 alternate configuration clock pin is input disabled. Ouya uses sdmmc4 in the primary pin configuration. It is unknown why this occurs, though it is likely related to other eMMC limitations experienced on Ouya. For now, fix it by enabling input on cam_mclk_pcc0. Fixes: d7195ac5 ("ARM: tegra: Add device-tree for Ouya") Reported-by: Matt Merhar <mattmerhar@protonmail.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Arnd Bergmann authored
Merge tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes for omaps for v5.12 merge window This includes the following earlier patches that were considered too late for v5.11 as discussed between Arnd and me on freenode #armlinux in December: - More updates to use cpsw switchdev driver - Enable gta04 PMIC power management - Updates for dra7 for ECC support, 1.8GHz speed and keep the ldo0 regulator always on as specified in the data manual And then we have the new devicetree changes: - Configure the original Amazon Echo to for audio - Configure missing thermal interrupt for omap4430 - Configure mapphone devices for passive thermal cooling, and add 1.2GHz mode. - Correct omap4430 sgx clock rate to use the runtime Android kernel value, the earlier value was for a lower power operating point - Drop turbo mode for 1GHz omap3 variants as we now have passive cooling configured - Update email address for Javier - Add new MYIR Tech Limited board support * tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board ARM: dts: omap3-igep: Change email address in copyright notice ARM: dts: omap36xx: Remove turbo mode for 1GHz variants ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel ARM: dts: motorola-mapphone: Add 1.2GHz OPP ARM: dts: motorola-mapphone: Configure lower temperature passive cooling ARM: dts: Configure missing thermal interrupt for 4430 ARM: dts: omap3-echo: Add speaker sound card support ARM: dts: dra71-evm: mark ldo0 regulator as always on ARM: dts: dra76x: add support for OPP_PLUS ARM: dts: am574x-idk: add support for EMIF1 ECC ARM: dts: omap3-gta04: fix twl4030-power settings ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.12, round 1 Highlights: ---------- MCU part: -Rename mmc nodes to match with yaml validation. MPU part: -Rename mmc nodes to match with yaml validation. -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files to SoC dtsi file. -LXA: -Fix leds schema for yaml validation. -DH: -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock on DHCOM. -Add SDMMC1 init state inorder to use some gpios during probing phase. -Disable KS8851 and FMC on PicoITX board. * tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151 ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151 ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux ARM: dts: stm32: Rename mmc controller nodes to mmc@ ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM ARM: dts: stm32: Add additional init state for SDMMC1 pins ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02 ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX ARM: dts: stm32: Fix GPIO hog names on DHCOM ARM: dts: stm32: Disable optional TSC2004 on DRC02 board ARM: dts: stm32: Disable WP on DHCOM uSD slot ARM: dts: stm32: Connect card-detect signal on DHCOM ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.12 (take two) - Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U SoC on the Renesas Falcon board, - Disable SD functions for plain eMMC, - A minor fix. * tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: beacon: Fix EEPROM compatible value arm64: dts: renesas: falcon: Enable MMC arm64: dts: renesas: r8a779a0: Add MMC node arm64: dts: renesas: r8a779a0: Add HSCIF support arm64: dts: renesas: falcon: Complete SCIF0 nodes arm64: dts: renesas: r8a779a0: Add & update SCIF nodes arm64: dts: renesas: falcon: Add Ethernet-AVB0 support arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support arm64: dts: renesas: falcon: Add I2C0,1,6 support arm64: dts: renesas: r8a779a0: Add I2C nodes arm64: dts: renesas: Disable SD functions for plain eMMC arm64: dts: renesas: r8a779a0: Add MSIOF device nodes Link: https://lore.kernel.org/r/20210129090815.2552425-2-geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
ARM64: DT: Hisilicon ARM64 DT updates for 5.12 - Further cleanups of the hisilicon DTS to align with the dtschema - Add or update the I2C, pinctrl and reset nodes for Hikey970 * tag 'hisi-arm64-dt-for-5.12v2' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: hi3670.dtsi: add I2C settings arm64: dts: hisilicon: hikey970-pinctrl.dtsi: add missing pinctrl settings arm64: dts: hisilicon: hi3670.dtsi: add iomcu_rst arm64: dts: hisilicon: delete unused property smmu-cb-memtype arm64: dts: hisilicon: avoid irrelevant nodes being mistakenly identified as PHY nodes arm64: dts: hisilicon: normalize the node name of the localbus arm64: dts: hisilicon: normalize the node name of the module thermal arm64: dts: hisilicon: place clock-names "bus" before "core" arm64: dts: hisilicon: separate each group of data in the property "ranges" Link: https://lore.kernel.org/r/6013D1C7.90902@hisilicon.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Mauro Carvalho Chehab authored
The I2C buses are not declared at the device tree. As this will be needed by further patches, add them, keeping all in disabled state. Per-board settings can override it. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Mauro Carvalho Chehab authored
There are several pinctrl settings that are missing at this DT file. Also, the entries are out of order. Add the missing bits, as they'll be required by the DRM driver - and probably by other drivers not upstreamed yet. Reorder the entres, adding the missing bits. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Mauro Carvalho Chehab authored
This is required in order to support USB. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
The "smmu-cb-memtype" is a private property developed by the Hisilicon driver in the early stage and is not used now. So delete it. Otherwise, below YAML check warnings are reported: arch/arm64/boot/dts/hisilicon/hip06-d03.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/hisilicon/hip07-d05.dt.yaml: iommu@a0040000: \ 'smmu-cb-memtype' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Currently, the names of several nodes incorrectly match common PHY provider schema. And the phy-provider.yaml requires them must have property "#phy-cells". As a result, false positives similar to the following are reported: usb2-phy@120: '#phy-cells' is a required property Change their names slightly so that they do not match pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Change the node name of the localbus to match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'. This error is detected by simple-bus.yaml. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
1. Change the node name of the thermal zone to match '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', add suffix "-thermal". 2. Change the node name of the trip point to match '^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', delete character "@". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Look at the clock-names schema defined in arm,mali-utgard.yaml: clock-names: items: - const: bus - const: core The "bus" needs to be placed before the "core". Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
Do not write the "ranges" of multiple groups of data into a uint32 array, use <> to separate them. Otherwise, the errors similar to the following will be reported: soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not valid under \ any of the given schemas (Possible causes of the failure): soc: pcie@a0090000:ranges: [[33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536]] is not of type 'boolean' soc: pcie@a0090000:ranges:0: [33554432, 0, 2986344448, 0, 2986344448, 0, \ 100597760, 16777216, 0, 0, 0, 3086942208, 0, 65536] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Amelie Delaunay authored
usbphyc is a 48Mhz clock provider: the clock can be used as clock source for USB OTG. Add #clock-cells property to usbphyc node to reflect this capability. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Amelie Delaunay authored
vdda1v1 and vdda1v8 supplies are required by USB PLL, not by the PHYs. Remove them from usbphyc child phy nodes now that they are managed in usbphyc parent node at SoC level. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Amelie Delaunay authored
vdda1v1 and vdda1v8 supplies are required by USB PLL. Add them in usbphyc node. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Jagan Teki authored
Add SDA/SCL pinmux lines for I2C6 on STM32MP1. This support adds both in default and sleep states. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Geert Uytterhoeven authored
"make dtbs_check" fails with: arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dt.yaml: eeprom@50: compatible: 'oneOf' conditional failed, one must be fixed: 'microchip,at24c64' does not match '^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$' Fix this by dropping the bogus "at" prefix. Fixes: a1d8a344 ("arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210128110136.2293490-1-geert+renesas@glider.be
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- 26 Jan, 2021 9 commits
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Arnd Bergmann authored
Merge tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.12 Correct Samsung PMIC and S3FWRN5 NFC interrupts trigger levels on TM2/TM2E and Espresso boards. * tag 'samsung-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: correct S3FWRN5 NFC interrupt trigger level on TM2 arm64: dts: exynos: correct PMIC interrupt trigger level on Espresso arm64: dts: exynos: correct PMIC interrupt trigger level on TM2 Link: https://lore.kernel.org/r/20210125191240.11278-4-krzk@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Alexander Shiyan authored
This patch adds basic support for MYIR Tech MYC-AM335X CPU Module: - Up to 1GHz TI AM335X Series ARM Cortex-A8 Processors - Up to 512MB DDR3 SDRAM - Up to 512MB Nand Flash and MYD-AM335X Development Board: - MYC-AM335X CPU Module as Controller Board - Serial ports, 4 x USB Host, OTG, 2 x Gigabit Ethernet, CAN, RS485, TF, Audio - Supports HDMI and LCD Display Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Javier Martinez Canillas authored
I've switched employer a long time ago and the mentioned email address no longer exists. Use my personal address to prevent the issue in the future. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Adam Ford authored
Previously, the 1GHz variants were marked as a turbo, because that variant has reduced thermal operating range. Now that the thermal throttling is in place, it should be safe to remove the turbo-mode from the 1GHz variants, because the CPU will automatically slow if the thermal limit is reached. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Carl Philipp Klemm authored
The Android vendor kernel uses 307.2MHz or a divider ratio of /5 while active 153600000 or /10 is only used when the sgx core is inactive. Signed-off-by: Carl Philipp Klemm <philipp@uvos.xyz> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Carl Philipp Klemm authored
The omap4430 HS HIGH performance devces support 1.2GHz opp, lower speed variants do not. However for mapphone devices Motorola seems to have decided that this does not really matter for the SoC variants they have tested to use, and decided to clock all devices, including the ones with STANDARD performance chips at 1.2GHz upon release of the 3.0.8 vendor kernel shiped with Android 4.0. Therefore it seems safe to do the same, but let's only do it for Motorola devices as the others have not been tested. Note that we prevent overheating with the passive cooling device cpu_alert0 configured in the dts file that starts lowering the speed as needed. This also removes the "failed to find current OPP for freq 1200000000" warning. Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Carl Philipp Klemm <philipp@uvos.xyz> [tony@atomide.com: made motorola specific, updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
The current cooling device temperature is too high at 100C as we have a battery on the device right next to the SoC as pointed out by Carl Philipp Klemm <philipp@uvos.xyz>. Let's configure the max temperature to 80C. As we only have a tshut interrupt and no talert interrupt on 4430, we have a passive cooling device configured for 4430. However, we want the poll interval to be 10 seconds instead of 1 second for power management. The value of 10 seconds seems like plenty of time to notice the temperature increase above the 75C temperatures. Having the bandgap temperature change seems to take several tens of seconds because of heat dissipation above 75C range as monitored with a full CPU load. Cc: Carl Philipp Klemm <philipp@uvos.xyz> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Suggested-by: Carl Philipp Klemm <philipp@uvos.xyz> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We have gpio_86 wired internally to the bandgap thermal shutdown interrupt on 4430 like we have it on 4460 according to the TRM. This can be found easily by searching for TSHUT. For some reason the thermal shutdown interrupt was never added for 4430, let's add it. I believe this is needed for the thermal shutdown interrupt handler ti_bandgap_tshut_irq_handler() to call orderly_poweroff(). Fixes: aa9bb4bb ("arm: dts: add omap4430 thermal data") Cc: Carl Philipp Klemm <philipp@uvos.xyz> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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André Hentschel authored
This adds audio playback to the first generation Amazon Echo Signed-off-by: André Hentschel <nerv@dawncrow.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 25 Jan, 2021 11 commits
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Marek Vasut authored
Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" , so adjust the node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Cc: devicetree@vger.kernel.org Acked-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Marek Vasut authored
The DHCOM SoM uSD slot has an optional voltage level translator, add DT bindings which permit the MMCI driver to detect the translator automatically. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Marek Vasut authored
Add "init" mux option for SDMMC1, where the CMD, CK, CKIN lines are not configured, so they can be claimed as GPIOs early on in driver probe(). This is used for probing optional voltage level translator. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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Arnd Bergmann authored
Merge tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt Visconti device tree updates for 5.11 - Add watchdog support for TMPV7708 SoC - Add entries for Toshiba Visconti5 watchdog driver * tag 'visconti-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti: arm64: dts: visconti: Add watchdog support for TMPV7708 SoC MAINTAINERS: Add entries for Toshiba Visconti5 watchdog driver Link: https://lore.kernel.org/r/20210125003357.yd72y4f5vcdnvhnr@toshiba.co.jpSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Takeshi Saito authored
Enable MMC on the Falcon board. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> [wsa: double checked, rebased, slightly improved, moved to falcon-cpu] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210125075845.3864-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Takeshi Saito authored
Add a device node for MMC. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> [wsa: double checked & rebased] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210125075845.3864-2-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Linh Phung authored
Define the generic parts of the HSCIF[0-3] device nodes. Signed-off-by: Linh Phung <linh.phung.jy@renesas.com> Signed-off-by: Wolfram Sang <wsa@kernel.org> Link: https://lore.kernel.org/r/20210121110008.15894-4-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Wolfram Sang authored
SCIF0 has been enabled by the firmware, so it worked already. Still, add the proper nodes to make it work in any case. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210121110008.15894-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Wolfram Sang authored
This is the result of multiple patches taken from the BSP, combined, rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are entirely new. Signed-off-by: Linh Phung <linh.phung.jy@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210121110008.15894-2-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Wolfram Sang authored
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210121100619.5653-5-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Tho Vu authored
Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was tested because it was the only port with a PHY on current hardware. Signed-off-by: Tho Vu <tho.vu.wh@renesas.com> [wsa: double checked, rebased, added "internal-delay" properties] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210121100619.5653-4-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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