CS gpios is not mandatory, the driver should allow working
even when CS are not given.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1612551572-495-3-git-send-email-alain.volmat@foss.st.comSigned-off-by: Mark Brown <broonie@kernel.org>

On 0 byte transfer request, return straight from the
xfer function after finalizing the transfer.

Fixes: dcbe0d84 ("spi: add driver for STM32 SPI controller")
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1612551572-495-2-git-send-email-alain.volmat@foss.st.comSigned-off-by: Mark Brown <broonie@kernel.org>

Merge series "spi: Add support for Realtek RTL838x/RTL839x SoC SPI" from Bert Vermeulen <bert@biot.com>:

v5:
- Changed SoC compatible to list exact models

v4:
- Added SoC series-specific compatible matches.

v3:
- Added cpu_relax() to busy loop.
- Dropped .remove callback from driver struct.
- Use (variations of) realtek-rtl as prefix.
- Dropped Kconfig entry, and use MACH_REALTEK_RTL setting to build the
  driver, since there's no point booting without the SPI-connected flash.

v2:
- Rewrote from spi-nor driver to regular spi driver, implementing only
  set_cs() and transfer_one(). (Thanks Chuanhong Guo!)

Bert Vermeulen (2):
  dt-bindings: spi: Realtek RTL838x/RTL839x SPI controller
  spi: realtek-rtl: Add support for Realtek RTL838x/RTL839x SPI
    controllers

 .../bindings/spi/realtek,rtl-spi.yaml         |  41 ++++
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-realtek-rtl.c                 | 209 ++++++++++++++++++
 3 files changed, 251 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml
 create mode 100644 drivers/spi/spi-realtek-rtl.c

--
2.25.1

Remove redundant white-space, no functional change.
Signed-off-by: Junhao He <hejunhao2@hisilicon.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/1612436886-42839-1-git-send-email-yangyicong@hisilicon.comSigned-off-by: Mark Brown <broonie@kernel.org>

Signed-off-by: Bert Vermeulen <bert@biot.com>
Link: https://lore.kernel.org/r/20210120135928.246054-2-bert@biot.comSigned-off-by: Mark Brown <broonie@kernel.org>

This driver likely also supports earlier (RTL8196) and later (RTL93xx)
SoCs.

The SPI hardware in these SoCs is specifically intended for connecting NOR
bootflash chips, and only used for that in dozens of examined devices.
However boiled down to basics, it's really just a half-duplex SPI
controller.

The hardware appears to have a vestigial second chip-select control, but
it hasn't been seen in the wild and is thus not supported.
Signed-off-by: Bert Vermeulen <bert@biot.com>
Link: https://lore.kernel.org/r/20210120135928.246054-3-bert@biot.comSigned-off-by: Mark Brown <broonie@kernel.org>

The address mode is either 3 or 4 for the controller, which is configured
by the firmware and cannot be modified in the OS driver. Get the
firmware configuration and add address mode check in the .supports_op()
to block invalid operations.
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Acked-by: John Garry <john.garry@huawei.com>
Link: https://lore.kernel.org/r/1611740450-47975-3-git-send-email-yangyicong@hisilicon.comSigned-off-by: Mark Brown <broonie@kernel.org>

Add the obvious compatible name to the existing SPI binding, and pair
it with the existing H3 fallback compatible string, as the devices are
compatible.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210125151811.11871-14-andre.przywara@arm.comSigned-off-by: Mark Brown <broonie@kernel.org>

Signed-off-by: corentin <corentin.noel56@gmail.com>
Link: https://lore.kernel.org/r/20210122082040.30788-1-corentin.noel.external@stormshield.euSigned-off-by: Mark Brown <broonie@kernel.org>

Signed-off-by: corentin <corentin.noel56@gmail.com>
Link: https://lore.kernel.org/r/20210122113052.40429-1-corentin.noel56@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>

The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.

Cc: Barry Song <baohua@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Barry Song <baohua@kernel.org>
Link: https://lore.kernel.org/r/20210120161658.3820610-1-arnd@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>

The allocated master is not released. Goto error handling label rather
than directly return.

Fixes: 5e9af37e ("spi: atmel: introduce probe deferring")
Signed-off-by: Pan Bian <bianpan2016@163.com>
Fixes: 5e9af37e ("spi: atmel: introduce probe deferring")
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20210120050025.25426-1-bianpan2016@163.comSigned-off-by: Mark Brown <broonie@kernel.org>

In a recent change to the SPI subsystem [1], a new `delay` struct was added
to replace the `delay_usecs`. This change replaces the current
`delay_usecs` with `delay` for this driver.

The `spi_transfer_delay_exec()` function [in the SPI framework] makes sure
that both `delay_usecs` & `delay` are used (in this order to preserve
backwards compatibility).

[1] commit bebcfd27 ("spi: introduce `delay` field for
`spi_transfer` + spi_transfer_delay_exec()")
Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>
Link: https://lore.kernel.org/r/20200227143931.20688-1-sergiu.cuciurean@analog.comSigned-off-by: Mark Brown <broonie@kernel.org>

Signed-off-by: corentin <corentin.noel56@gmail.com>
Link: https://lore.kernel.org/r/20210121145236.26460-1-corentin.noel.external@stormshield.euSigned-off-by: Mark Brown <broonie@kernel.org>

This avoids

[    0.962538] spi_imx 30820000.spi: bitbang start failed with -517

durig driver probe.

Fixes: 8197f489 ("spi: imx: Fix failure path leak on GPIO request error correctly")
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/0f51ab42e7c7a3452f2f8652794d81584303ea0d.1610987414.git.agx@sigxcpu.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Uwe Kleine-König <uwe.kleine-koenig@pengutronix.de>:

From: Uwe Kleine-König <uwe.kleine-koenig@pengutronix.de>

Hello,

there are no known active users of the efm32 platform. Given that the
only machine that is supported has only 4 MiB of RAM its use is also
quite limited.

Back then it served as the platform to develop ARMv7-M support in Linux
which was quite fun and still is a blissful memory.

Still given that the code serves no purpose and this probably won't
change anytime soon, remove all platform support.

I'm unsure what to do with the device tree bindings. Should we delete
them, too?

Best regards
Uwe

Uwe Kleine-König (7):
  ARM: drop efm32 platform
  clk: Drop unused efm32gg driver
  clocksource: Drop unused efm32 timer code
  spi: Drop unused efm32 bus driver
  i2c: Drop unused efm32 bus driver
  tty: Drop unused efm32 serial driver
  MAINTAINERS: Remove deleted platform efm32

 MAINTAINERS                              |   7 -
 arch/arm/Kconfig                         |  10 +-
 arch/arm/Kconfig.debug                   |  17 -
 arch/arm/Makefile                        |   1 -
 arch/arm/boot/dts/Makefile               |   2 -
 arch/arm/boot/dts/efm32gg-dk3750.dts     |  88 ---
 arch/arm/boot/dts/efm32gg.dtsi           | 177 -----
 arch/arm/configs/efm32_defconfig         |  98 ---
 arch/arm/include/debug/efm32.S           |  45 --
 arch/arm/mach-efm32/Makefile             |   2 -
 arch/arm/mach-efm32/Makefile.boot        |   4 -
 arch/arm/mach-efm32/dtmachine.c          |  16 -
 arch/arm/mm/Kconfig                      |   1 -
 drivers/clk/Makefile                     |   1 -
 drivers/clk/clk-efm32gg.c                |  84 ---
 drivers/clocksource/Kconfig              |   9 -
 drivers/clocksource/Makefile             |   1 -
 drivers/clocksource/timer-efm32.c        | 278 --------
 drivers/i2c/busses/Kconfig               |   7 -
 drivers/i2c/busses/Makefile              |   1 -
 drivers/i2c/busses/i2c-efm32.c           | 469 -------------
 drivers/spi/Kconfig                      |   7 -
 drivers/spi/Makefile                     |   1 -
 drivers/spi/spi-efm32.c                  | 462 ------------
 drivers/tty/serial/Kconfig               |  13 -
 drivers/tty/serial/Makefile              |   1 -
 drivers/tty/serial/efm32-uart.c          | 852 -----------------------
 include/linux/platform_data/efm32-spi.h  |  15 -
 include/linux/platform_data/efm32-uart.h |  19 -
 include/uapi/linux/serial_core.h         |   3 -
 30 files changed, 1 insertion(+), 2690 deletions(-)
 delete mode 100644 arch/arm/boot/dts/efm32gg-dk3750.dts
 delete mode 100644 arch/arm/boot/dts/efm32gg.dtsi
 delete mode 100644 arch/arm/configs/efm32_defconfig
 delete mode 100644 arch/arm/include/debug/efm32.S
 delete mode 100644 arch/arm/mach-efm32/Makefile
 delete mode 100644 arch/arm/mach-efm32/Makefile.boot
 delete mode 100644 arch/arm/mach-efm32/dtmachine.c
 delete mode 100644 drivers/clk/clk-efm32gg.c
 delete mode 100644 drivers/clocksource/timer-efm32.c
 delete mode 100644 drivers/i2c/busses/i2c-efm32.c
 delete mode 100644 drivers/spi/spi-efm32.c
 delete mode 100644 drivers/tty/serial/efm32-uart.c
 delete mode 100644 include/linux/platform_data/efm32-spi.h
 delete mode 100644 include/linux/platform_data/efm32-uart.h

base-commit: 5c8fe583
--
2.29.2

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Support for this machine was just removed, so drop the now unused spi
bus driver, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20210114151630.128830-5-u.kleine-koenig@pengutronix.deSigned-off-by: Mark Brown <broonie@kernel.org>

Add support for LPSS SPI on Intel Alder Lake PCH-P variant.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Link: https://lore.kernel.org/r/20210114144021.1820262-1-jarkko.nikula@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

spi_finalize_current_transfer currently only calls "complete", so no
functional change is expected.
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
Link: https://lore.kernel.org/r/2636096a3b40febf680f9fff33944a5480561df9.1610062884.git.plr.vincent@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>

spi_finalize_current_transfer currently only calls "complete", so no
functional change is expected.
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
Link: https://lore.kernel.org/r/f3e1cf19a7dcdd77adc0a719adf46449b84ccadd.1610062884.git.plr.vincent@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>

spi_finalize_current_transfer currently only calls "complete", so no
functional change is expected.
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
Link: https://lore.kernel.org/r/633c3d5c350dde4d14ce2120c32698c25b95d302.1610062884.git.plr.vincent@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>

Set the struct spi_controller max_speed_hz. This is based on the
reported source clock frequency during probe. The maximum bus clock
is half the source clock (as per the code in bcm2835_spi_transfer_one).
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210107164825.21919-1-rf@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>

Merge series "spi: sh-msiof: Advertize bit rate limits and actual speed" from Geert Uytterhoeven <geert+renesas@glider.be>:

	Hi Mark,

This patch series makes the Renesas MSIOF SPI driver fill in actual
transfer speeds and controller limits, so the SPI core can take them
into account.

This has been tested on R-Car Gen2 and Gen3.
Thanks!

Geert Uytterhoeven (2):
  spi: sh-msiof: Fill in spi_transfer.effective_speed_hz
  spi: sh-msiof: Fill in controller speed limits

 drivers/spi/spi-sh-msiof.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

--
2.25.1

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Merge series "spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC" from "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>:

Add QSPI controller support for Intel LGM SoC.

Patches to move move bindings over to
"Documentation/devicetree/bindings/spi/" directory and also added compatible
Support for Intel platform.

dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
(earlier patch mail thread and Ack-by)
link: "https://lore.kernel.org/lkml/5d6d1b85.1c69fb81.96938.0315@mx.google.com/"

Reference:
        https://lkml.org/lkml/2020/6/1/50
---
v9:
  - Vignesh review comments address and update
  - Retain the patchv4 move the binding documentation from mtd to spi
    directory.
  - Add intel's compatible string over the legacy documentation
  - Remove unused variable, CQSPI_SUPPORTS_MULTI_CHIPSELECT macro and check
  - YAML convertion patch alone dropped
v8:
  - As Mark suggested to add the dt-bindings documentation patches
    end of the series , so dropped.
v7:
  - Rob's review comments address and fixed dt-schema warning
  - Pratyush review comments address and update
  - DAC bit reset to 0 and 1 (enable/disable)
  - tested QSI-NOR flash mx25l12805d on LGM soc, it's working after disable DAC
  - Linus suggested to use 'num-cs' prperty instead of 'num-chipselect'
v6:
  - Rob's review comments update
  - add compatible string in properly aligned
  - remove cadence-qspi extra comaptible string in example
v5:
  - Rob's review comments update
  - const with single compatible string kept
v4:
  - Rob's review comments update
  - remove '|' no formatting to preserve
  - child node attributes follows under 'properties' under '@[0-9a-f]+$'.
v3:
  - Pratyush review comments update
  - CQSPI_SUPPORTS_MULTI_CHIPSELECT macro used instead of cqspi->use_direct_mode
  - disable DAC support placed in end of controller_init
v2:
  - Rob's review comments update for dt-bindings
  - add 'oneOf' for compatible selection
  - drop un-neccessary descriptions
  - add the cdns,is-decoded-cs and cdns,rclk-en properties as schema
  - remove 'allOf' in not required place
  - add AdditionalProperties false
  - add minItems/maxItems for qspi reset attributes

resend-v1:
  - As per Mark's suggestion , reorder the patch series 1-3 driver
    support patches, series 4-6 dt-bindings patches.
v1:
  - initial version

Ramuthevar Vadivel Murugan (5):
  spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
  spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
  spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
  spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
  dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi

 .../bindings/{mtd => spi}/cadence-quadspi.txt      |  1 +
 drivers/spi/Kconfig                                |  2 +-
 drivers/spi/spi-cadence-quadspi.c                  | 24 ++++++++++++++++++----
 3 files changed, 22 insertions(+), 5 deletions(-)
 rename Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt (97%)

--
2.11.0

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

Simplify stm32h7_spi_prepare_fthlv() function implementation,
no functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alain Volmat <alain.volmat@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Amelie Delaunay <amelie.delaunay@st.com>
Cc: Antonio Borneo <antonio.borneo@st.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Roman Guskov <rguskov@dh-electronics.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-spi@vger.kernel.org
Link: https://lore.kernel.org/r/20210104123114.261596-1-marex@denx.deSigned-off-by: Mark Brown <broonie@kernel.org>

We don't need to force this to be trigger high here, as the firmware
properly configures the irq flags already. Drop it to save a line.

Cc: Douglas Anderson <dianders@chromium.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
Cc: Akash Asthana <akashast@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210112001301.687628-1-swboyd@chromium.orgSigned-off-by: Mark Brown <broonie@kernel.org>

Currently we use concrete version to determine the max_cmd_dword.
New entries should be added for compatible hardwares of new version
or on new platform, otherwise the device will use 16 dwords instead
of 64 even if it supports, which will degrade the performance.
This will decrease the compatibility and the maintainability.

Drop the switch-case statement of the version checking. Only version
less than 0x351 supports maximum 16 command dwords.
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Acked-by: John Garry <john.garry@huawei.com>
Link: https://lore.kernel.org/r/1610526716-14882-1-git-send-email-yangyicong@hisilicon.comSigned-off-by: Mark Brown <broonie@kernel.org>

Fill in the controller speed limits, so the SPI core can use them for
validating SPI transfers, and adjust or reject transfers when needed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210113101916.1147695-3-geert+renesas@glider.beSigned-off-by: Mark Brown <broonie@kernel.org>

Fill in the effective bit rate used for transfers, so the SPI core can
calculate instead of estimate delays.

Restore "reverse Christmas tree" order of local variables while adding
new variables.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210113101916.1147695-2-geert+renesas@glider.beSigned-off-by: Mark Brown <broonie@kernel.org>

Add new vendor specific compatible string to check Intel's Lightning
Mountain(LGM) QSPI features enablement in cadence-quadspi driver.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201124041840.31066-6-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Move the Documentation/devicetree/bindings/mtd/cadence-quadspi.txt to
Documentation/devicetree/bindings/spi/
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201124041840.31066-5-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Add multiple chipselect support for Intel LGM SoCs,
currently QSPI-NOR and QSPI-NAND supported.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Link: https://lore.kernel.org/r/20201124041840.31066-4-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use
Direct Access Controller(DAC).

This patch adds a quirk to disable the Direct Access Controller
for data transfer instead it uses indirect data transfe

DAC bit resets to 1 so there is no need to explicitly set it.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Link: https://lore.kernel.org/r/20201124041840.31066-3-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

Add QSPI controller support for Intel LGM SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Link: https://lore.kernel.org/r/20201124041840.31066-2-vadivel.muruganx.ramuthevar@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>

With CONFIG_PM_SLEEP disabled the rpcif_spi_pm_ops variable is still
referenced and thus increasing the size of kernel.

Fix this issue by adding CONFIG_PM_SLEEP #ifdef check around the .pm
assignment (image size is critical on RZ/A SoC's where the SRAM sizes
range 4~5 MiB).

Fixes: 9584fc95 ("spi: rpc-if: Remove CONFIG_PM_SLEEP ifdefery")
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Suggested-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210107145329.27966-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>

The kernel test robot reports the following warning.

drivers/spi/spi-cadence-quadspi.c:966:24: warning: comparison of distinct pointer types ('typeof (len) *' (aka 'unsigned int *') and 'typeof (500UL) *' (aka 'unsigned long *')) [-Wcompare-distinct-pointer-types]
                                            msecs_to_jiffies(max(len, 500UL)))) {
                                                             ^~~~~~~~~~~~~~~
   include/linux/minmax.h:58:19: note: expanded from macro 'max'
   #define max(x, y)       __careful_cmp(x, y, >)
                           ^~~~~~~~~~~~~~~~~~~~~~
   include/linux/minmax.h:42:24: note: expanded from macro '__careful_cmp'
           __builtin_choose_expr(__safe_cmp(x, y), \
                                 ^~~~~~~~~~~~~~~~
   include/linux/minmax.h:32:4: note: expanded from macro '__safe_cmp'
                   (__typecheck(x, y) && __no_side_effects(x, y))
                    ^~~~~~~~~~~~~~~~~
   include/linux/minmax.h:18:28: note: expanded from macro '__typecheck'
           (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1)))
                      ~~~~~~~~~~~~~~ ^  ~~~~~~~~~~~~~~
   1 warning generated.

This happens because size_t is unsigned long on 64-bit platforms like
arm64 but it is unsigned int on 32-bit platforms like arm. Omitting the
"UL" would result in a warning on 64-bit platforms. Squash it by type
casting the arguments to size_t using max_t(). This way builds on both
type of platforms can be satisfied. There is no chance of any truncation
since 500 is small enough to fit into both int and long.

Fixes: f453f293 ("spi: cadence-quadspi: Wait at least 500 ms for direct reads")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20210108181457.30291-1-p.yadav@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>

Fix the following coccicheck warning:
./drivers/spi/spi-bcm-qspi.c:884:5-34: WARNING: Comparison to bool
Signed-off-by: YANG LI <abaci-bugfix@linux.alibaba.com>
Reported-by: Abaci Robot<abaci@linux.alibaba.com>
Link: https://lore.kernel.org/r/1610357189-60031-1-git-send-email-abaci-bugfix@linux.alibaba.comSigned-off-by: Mark Brown <broonie@kernel.org>

Merge tag 'kbuild-fixes-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull Kbuild fixes from Masahiro Yamada:

 - Search for <ncurses.h> in the default header path of HOSTCC

 - Tweak the option order to be kind to old BSD awk

 - Remove 'kvmconfig' and 'xenconfig' shorthands

 - Fix documentation

* tag 'kbuild-fixes-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  Documentation: kbuild: Fix section reference
  kconfig: remove 'kvmconfig' and 'xenconfig' shorthands
  lib/raid6: Let $(UNROLL) rules work with macOS userland
  kconfig: Support building mconf with vendor sysroot ncurses
  kconfig: config script: add a little user help
  MAINTAINERS: adjust GCC PLUGINS after gcc-plugin.sh removal