- 11 Mar, 2011 8 commits
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Tony Lindgren authored
Merge branch 'integration-2.6.39-for-tony' of git://git.pwsan.com/linux-integration into omap-for-linus Conflicts: arch/arm/mach-omap2/pm34xx.c
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Paul Walmsley authored
Conflicts: arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
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Paul Walmsley authored
Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c arch/arm/plat-omap/include/plat/omap_hwmod.h
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Paul Walmsley authored
Merge remote branches 'remotes/origin/pwrdm_clkdm_b_2.6.39', 'remotes/origin/pwrdm_add_can_lose_context_fns_2.6.39', 'remotes/origin/omap_device_a_2.6.39', 'remotes/origin/mmc_a_2.6.39', 'remotes/origin/hwmod_b_2.6.39', 'remotes/origin/dmtimer_a_2.6.39', 'remotes/origin/pwrdm_clkdm_a_2.6.39', 'remotes/origin/clkdm_statdep_omap4_2.6.39', 'remotes/origin/clk_a_2.6.39', 'remotes/origin/clk_autoidle_a_2.6.39', 'remotes/origin/clk_autoidle_b_2.6.39', 'remotes/origin/clk_b_2.6.39', 'remotes/origin/clk_clkdm_a_2.6.39', 'remotes/origin/misc_a_2.6.39', 'remotes/origin/for_2.6.39/omap3_hwmod_data' and 'remotes/origin/wdtimer_a_2.6.39' into tmp-integration-2.6.39-20110310-024
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Paul Walmsley authored
The HW superwised smart idle for wdtimer in OMAP3 prevents CORE power domain idle transitions. Disable it by swithing to SW supervised transitions. This could be a hardware bug in the OMAP3 wdtimer2 block. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Acked-by: Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
The omap_wdt should only be in full active state when the registers are being accessed. Otherwise the device can be on lower power mode. This patch is based on a patch created by Kalle Jokiniemi: https://patchwork.kernel.org/patch/618231/ which is itself based on a patch created by Atal Shargorodsky: http://lkml.org/lkml/2009/3/10/266. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com> Tested-by: Kalle Jokiniemi <kalle.jokiniemi@nokia.com> Cc: Wim Van Sebroeck <wim@iguana.be> Acked-by: Wim Van Sebroeck <wim@iguana.be> Acked-by: Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
This is a first pass at reorganizing mach-omap2/voltage.c: - Separate almost all of the data from the code of mach-omap2/voltage.c. The code remains in mach-omap2/voltage.c. The data goes into one of several places, depending on what type of data it is: - Silicon process/validation data: mach-omap2/opp*_data.c - VC (Voltage Controller) data: mach-omap2/vc*_data.c - VP (Voltage Processor) data: mach-omap2/vp*_data.c - Voltage domain data: mach-omap2/voltagedomains*_data.c The ultimate goal is for all this data to be autogenerated, the same way we autogenerate the rest of our data. - Separate VC and VP common data from VDD-specific VC and VP data. - Separate common voltage.c code from SoC-specific code; reuse common code. - Reorganize structures to avoid unnecessary memory loss due to unpacked fields. There is much left to be done. VC code and VP code should be separated out into vc*.c and vp*.c files. Many fields in the existing structures are superfluous, and should be removed. Some code in voltage.c seems to be duplicated; that code should be moved into functions of its own. Proper voltage domain code should be created, as was done with the powerdomain and clockdomains, and powerdomains should reference voltagedomains. Thanks to Shweta Gulati <shweta.gulati@ti.com> for comments. Thanks to Rajendra Nayak <rnayak@ti.com> for finding and fixing some bugs that prevented OMAP4 from booting: https://patchwork.kernel.org/patch/587311/ His patch has been folded into this one to avoid breaking OMAP4 between patches. Thanks also to Kevin Hilman <khilman@ti.com> for finding and fixing a compile problem when !CONFIG_PM: http://www.spinics.net/lists/arm-kernel/msg118067.html His patch has also been folded into this one to avoid breaking !CONFIG_PM builds. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Shweta Gulati <shweta.gulati@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Kevin Hilman <khilman@ti.com>
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Tony Lindgren authored
Merge branch 'for_2.6.39/pm-misc' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
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- 10 Mar, 2011 32 commits
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Santosh Shilimkar authored
On the newer ARM processors like CortexA8, CortexA9, the caches can be speculatively loaded while they are getting flushed. Clear the SCTLR C bit to prevent further data cache allocation as part of cache clean routine Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
The current code saves few un-necessary registers which are read-only or write-only, unused CP15 registers. Remove them and keep only necessary CP15 registers part of low power context save/restore. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
When L1 cache is suppose to be lost, it needs to be cleaned before entrering to the low power mode. While at this, also fix few comments and remove un-necessary clean_l2 lable. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
Add necessary barriers after enabling MMU. Also use the sane way to load pc and jump to it instead of executing ldma first up. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
On ARMv7 dsb, dmb instructions are supported and can be used directly instead of their cp15 equivalnet. Also remove the opcodes for smc and use the available instruction directly in OMAP3 low power asm code Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Tero Kristo authored
This saves some power. OMAP4 version should check for GPT module ID, as autoidle is only supported on a subset of these. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
Add a new clockdomain flag, CLKDM_NO_AUTODEPS, which, when marked on a clockdomain, will prevent "autodeps" from being associated with the clockdomain. ("Autodeps" are sleep dependencies and wakeup dependencies from/to processor modules that are automatically added to a clockdomain when it is in hardware-supervised idle mode. They are deprecated -- a relic from the old CDP trees -- but are still in use for OMAP3.) Also, prevent the hwmod code from adding or removing initiator dependencies for clockdomains with this flag set. This patch should allow others to test which clockdomains actually still need autodeps. Thanks to Kevin Hilman <khilman@ti.com> for noting that the original version should also modify the hwmod code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com>
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Kishon Vijay Abraham I authored
Create a new API that forms a wrapper to _set_module_autoidle() to modify the AUTOIDLE bit. This API is intended to be used by drivers that requires direct manipulation of the AUTOIDLE bits in SYSCONFIG register. McBSP driver requires autoidle bit to be enabled/disabled while using sidetone feature. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> [paul@pwsan.com: restrict the hwmod states that the autoidle bit can be changed in; changed function name; dropped "int" from "unsigned int long"] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
Some boards can't tolerate IP blocks being reset when they are initialized. Michael Büsch cites a case with the Nokia N810: http://www.spinics.net/lists/linux-omap/msg47277.html To allow such boards to continue working normally, allow board file maintainers to mark IP blocks to prevent them from being reset upon init. This is done via a hwmod function, omap_hwmod_no_setup_reset(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Michael Buesch <mb@bu3sch.de>
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omar ramirez authored
On OMAP2 and OMAP3 the reset ctrl shift doesn't match the status bit, as it does on OMAP4, when handling the reset lines. This patch adds a new member in the reset info structure, so now it can be added as part of hwmod data, and checked accordingly for OMAP2 or 3; otherwise, there could be cases when the shift masks doesn't match both of the registers, and a successful reset might throw an error message or vice versa. Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com> [paul@pwsan.com: added a warning if st_shift used on OMAP4; renamed 'r' variable; improved some documentation] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
The documented name of the HWMOD_NO_OCP_AUTOIDLE flag was incorrect; fix it. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Rajendra Nayak authored
_init_clock always returns 0 and does not propogate the error (in case of failure) back to the caller, causing _init_clocks to fail silently. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Avinash.H.M authored
Some of the omap2, omap3 peripherals support software reset. This can be done through the softreset bit in sysconfig register. The reset status can be checked through resetdone bit of sysstatus register. syss_has_reset_status is added to the hwmod database of peripherals which have resetdone bit in sysstatus register. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Reviewed-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Tarun Kanti DebBarma authored
Autoidle is a single bit, TIOCP_CFG[0], setting on OMAP1/2/3/4 platforms. In _set_module_autoidle() I am seeing 0x3 value where the mask is computed. This should be 0x1. v2: (1) Modified the subject. (2) Modified the description with further specific information. Baseline: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git Tested Info: Boot tested on OMAP 1/2/3/4. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Rajendra Nayak <rnayak@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Benoit Cousson authored
Master ports from interconnect are generating some annoying circular references that become tricky to handle if we have to dynamically remove some IP on some variant platforms. Since they are not used for the moment, and since we can still build that relation using the reverse relation (slave port from the IP toward master port of the interconnect), let remove them for the moment like it is done on OMAP4. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com>
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Benoit Cousson authored
Commit d3442726 ("OMAP3: PM: Adding smartreflex hwmod data") added data that claims that the L4 CORE has two slave interfaces that originate from the SmartReflex modules, omap3_l4_core__sr1 and omap3_l4_core__sr2. But as those two data structure records show, it's L4 CORE that has a master port towards SR1 and SR2. Move the incorrect data from slaves list to master list. Based on a path by Paul Walmsley <paul@pwsan.com> https://patchwork.kernel.org/patch/623171/ That is based on a patch by Benoît Cousson <b-cousson@ti.com>: https://patchwork.kernel.org/patch/590561/Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com> Cc: Sanjeev Premi <premi@ti.com> Cc: Thara Gopinath <thara@ti.com>
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Paul Walmsley authored
Add Rajendra Nayak and myself as maintainers for the OMAP powerdomain/clockdomain per-SoC layer code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Felipe Balbi authored
if building kernels without OMAP2 support, we will see a warning such as: arch/arm/mach-omap2/io.c: In function 'omap2_init_common_infrastructure': arch/arm/mach-omap2/io.c:389:3: warning: statement with no effect arch/arm/mach-omap2/io.c:391:3: warning: statement with no effect Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Anand S Sawant authored
omap_sr_probe() creates the smartreflex debug directory and its underlying nvalue debug directory. These directories are removed in omap_sr_remove(). Basic smartreflex functionality tested on OMAP3630 Zoom3 & OMAP4430 SDP Signed-off-by: Anand S Sawant <sawant@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Dave Martin authored
* Build unconditionally as ARM for correct interoperation with OMAP firmware. * Fix an out-of-range ADR when building for ARM. * Remove deprecated PC-relative stores. * Add the required ENDPROC() directive for each ENTRY(). * .align before data words. * Handle non-interworking return from v7_flush_dcache_all. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Dave Martin authored
* Build unconditionally as ARM for correct interoperation with OMAP firmware. * Remove deprecated PC-relative stores * Add the required ENDPROC() directive for each ENTRY(). * .align before data words Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Dave Martin authored
For various reasons, Linux now only officially supports being built with tools which are new enough to understand the SMC instruction. Replacing the hand-encoded instructions when the mnemonic also allows for correct assembly in Thumb-2 (otherwise, the result is random data in the middle of the code). The Makefile already ensures that this file is built with a high enough gcc -march= flag (armv7-a). Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Dave Martin authored
Code marked with ENTRY() also needs a matching ENDPROC() directive, in order to ensure that the type and instruction set of the symbol are correctly annotated. ENDPROC() tags the affected symbol as a function symbol, which will ensure that link-time fixups don't accidentally switch to the wrong instruction set. Signed-off-by: Dave Martin <dave.martin@linaro.org> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Dave Martin authored
For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will insert invalid code into the instruction stream. Any assembler which can assemble Thumb-2 is guaranteed to accept the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic. The ARM case is left as-is. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Sanjeev Premi authored
IVA device is not present in many OMAP3 variants. This patch ensures that initialization is tied to the presence of IVA on the device. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Thara Gopinath authored
Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. Since almost all platforms use I2C_SR on omap3, omap3_twl_init by default expects that OMAP's I2C_SR is plugged in to TWL's I2C and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, the board files are expected to call omap3_twl_set_sr_bit(false) to ensure that I2C_SR path is not set for voltage control and prevent the default behavior of omap3_twl_init. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
Add a description field to each idle C-state. This helps to give better data with PowerTop and one don't have to refer to the code to link what Cx means from system point of view while analysing PowerTop data. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Santosh Shilimkar authored
Remove the custom restore_control_register() and use the exported set_cr() instead to set the system control register(SCTRL) value. No functional change. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Paul Walmsley authored
The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep dependencies. This is unnecessary after commit 6f7f63cc ("OMAP clockdomain: initialize clockdomain registers when the clockdomain layer starts") which clears these dependencies during clockdomain init. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Kevin Hilman authored
Now that omap_hwmod + omap_device is used for OMAP UART device and driver code, we no longer need the UART physical addresses in omap_globals. Note that the #defines for the base addresses are still left in <plat/serial.h> since they are used by DEBUG_LL and uncompress code. Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig) Signed-off-by: Kevin Hilman <khilman@ti.com>
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Vasiliy Kulikov authored
kzalloc() may fail, if so return -ENOMEM. Also Walter Harms suggested to use kasprintf() instead of kzalloc+strcpy+strcat. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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Nishanth Menon authored
OMP3630 silicon can enable higher frequencies only depending on the board characteristics meeting the recommended standards, and has to be selectively toggled. Beagle XM uses 3730 variant and the board design allows enabling 800MHz and 1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz safely. For the moment, we tweak the default table to allow for 800Mhz OPP usage. Reported-by: Koen Kooi <koen@beagleboard.org> Tested-by: Koen Kooi <koen@beagleboard.org> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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