1. 22 Feb, 2024 1 commit
    • Jason Gunthorpe's avatar
      iommu/arm-smmu-v3: Do not use GFP_KERNEL under as spinlock · b5bf7778
      Jason Gunthorpe authored
      If the SMMU is configured to use a two level CD table then
      arm_smmu_write_ctx_desc() allocates a CD table leaf internally using
      GFP_KERNEL. Due to recent changes this is being done under a spinlock to
      iterate over the device list - thus it will trigger a sleeping while
      atomic warning:
      
        arm_smmu_sva_set_dev_pasid()
          mutex_lock(&sva_lock);
          __arm_smmu_sva_bind()
           arm_smmu_mmu_notifier_get()
            spin_lock_irqsave()
            arm_smmu_write_ctx_desc()
      	arm_smmu_get_cd_ptr()
               arm_smmu_alloc_cd_leaf_table()
      	  dmam_alloc_coherent(GFP_KERNEL)
      
      This is a 64K high order allocation and really should not be done
      atomically.
      
      At the moment the rework of the SVA to follow the new API is half
      finished. Recently the CD table memory was moved from the domain to the
      master, however we have the confusing situation where the SVA code is
      wrongly using the RID domains device's list to track which CD tables the
      SVA is installed in.
      
      Remove the logic to replicate the CD across all the domain's masters
      during attach. We know which master and which CD table the PASID should be
      installed in.
      
      Right now SVA only works when dma-iommu.c is in control of the RID
      translation, which means we have a single iommu_domain shared across the
      entire group and that iommu_domain is not shared outside the group.
      
      Critically this means that the iommu_group->devices list and RID's
      smmu_domain->devices list describe the same set of masters.
      
      For PCI cases the core code also insists on singleton groups so there is
      only one entry in the smmu_domain->devices list that is equal to the
      master being passed in to arm_smmu_sva_set_dev_pasid().
      
      Only non-PCI cases may have multi-device groups. However, the core code
      will repeat the calls to arm_smmu_sva_set_dev_pasid() across the entire
      iommu_group->devices list.
      
      Instead of having arm_smmu_mmu_notifier_get() indirectly loop over all the
      devices in the group via the RID's smmu_domain, rely on
      __arm_smmu_sva_bind() to be called for each device in the group and
      install the repeated CD entry that way.
      
      This avoids taking the spinlock to access the devices list and permits the
      arm_smmu_write_ctx_desc() to use a sleeping allocation. Leave the
      arm_smmu_mm_release() as a confusing situation, this requires tracking
      attached masters inside the SVA domain.
      
      Removing the loop allows arm_smmu_write_ctx_desc() to be called outside
      the spinlock and thus is safe to use GFP_KERNEL.
      
      Move the clearing of the CD into arm_smmu_sva_remove_dev_pasid() so that
      arm_smmu_mmu_notifier_get/put() remain paired functions.
      
      Fixes: 24503148 ("iommu/arm-smmu-v3: Refactor write_ctx_desc")
      Reported-by: default avatarDan Carpenter <dan.carpenter@linaro.org>
      Closes: https://lore.kernel.org/all/4e25d161-0cf8-4050-9aa3-dfa21cd63e56@moroto.mountain/Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
      Reviewed-by: default avatarMichael Shavit <mshavit@google.com>
      Link: https://lore.kernel.org/r/0-v3-11978fc67151+112-smmu_cd_atomic_jgg@nvidia.comSigned-off-by: default avatarWill Deacon <will@kernel.org>
      b5bf7778
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