- 12 Mar, 2024 7 commits
-
-
Théo Lebrun authored
Sort #include statements in i2c-nomadik driver. Signed-off-by:
Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
Andi Shyti <andi.shyti@kernel.org> Signed-off-by:
-
Théo Lebrun authored
Add compatible for the integration of the same DB8500 IP block into the Mobileye EyeQ5 platform. Two quirks are present: - The memory bus only supports 32-bit accesses. Avoid writeb() and readb() by introducing helper functions that fallback to writel() and readl(). - A register must be configured for the I2C speed mode; it is located in a shared register region called OLB. We access that memory region using a syscon & regmap that gets passed as a phandle (mobileye,olb). A two-bit enum per controller is written into the register; that requires us to know the global index of the I2C controller (cell arg to the mobileye,olb phandle). We add #include <linux/mfd/syscon.h> and <linux/regmap.h>. Reviewed-by:
-
Théo Lebrun authored
Allow overriding the default timeout value (200ms) from devicetree, using the generic i2c-transfer-timeout-us property. The i2c_adapter->timeout field is an unaccurate jiffies amount; i2c-nomadik uses hrtimers for timeouts below one jiffy. Reviewed-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
-
Théo Lebrun authored
The FIFO flush function uses a jiffies amount to detect timeouts as the flushing is async. Replace with ktime to get more accurate precision and support short timeouts. Reviewed-by:
-
Théo Lebrun authored
Replace the completion by a waitqueue for synchronization from IRQ handler to task. For short timeouts, use hrtimers, else use timers. Usecase: avoid blocking the I2C bus for too long when an issue occurs. The threshold picked is one jiffy: if timeout is below that, use hrtimers. This threshold is NOT configurable. Implement behavior but do NOT change fetching of timeout. This means the timeout is unchanged (200ms) and the hrtimer case will never trigger. A waitqueue is used because it supports both desired timeout approaches. See wait_event_timeout() and wait_event_hrtimeout(). An atomic boolean serves as synchronization condition. Reviewed-by:
-
Théo Lebrun authored
Constant register bit fields are declared using hardcoded hex values; replace them by calls to BIT() and GENMASK(). Replace custom GEN_MASK() macro by the generic FIELD_PREP(). Replace manual bit manipulations by the generic FIELD_GET() macro. Reviewed-by:
-
Théo Lebrun authored
IRQ_MASK and I2C_CLEAR_ALL_INTS both mask available interrupts. IRQ_MASK removes top options (bits 29-31). I2C_CLEAR_ALL_INTS removes reserved options including top bits. Keep the latter. 31 29 27 25 23 21 19 17 15 13 11 09 07 05 03 01 30 28 26 24 22 20 18 16 14 12 10 08 06 04 02 00 -- IRQ_MASK: --------------------------------------------------- 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 -- I2C_CLEAR_ALL_INTS: ----------------------------------------- 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Notice I2C_CLEAR_ALL_INTS is more restrictive than IRQ_MASK. Reviewed-by:
-
- 08 Mar, 2024 3 commits
-
-
Théo Lebrun authored
Disambiguate the usage of dev as a variable name; it is usually best to keep it reserved for struct device pointers. Avoid having multiple names for the same struct pointer (previously: dev, nmk, nmk_i2c). Fix whitespace code style; return indented twice, spacing besides infix operators, align function call arguments to opening parenthesis. Remove useless cast to unused return value from init_hw(). Introduce local dev variable in probe() to alias &adev->dev. Reviewed-by:
-
Théo Lebrun authored
Add EyeQ5 bindings to the existing Nomadik I2C dt-bindings. Add the EyeQ5-specific property behind a conditional. Add an example for this compatible. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
Uwe Kleine-König authored
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by:
Chunyan Zhang <zhang.lyra@gmail.com> Signed-off-by:
-
- 06 Mar, 2024 2 commits
-
-
Geert Uytterhoeven authored
Currently, all Kconfig symbols for R-Car Gen4 SoCs select ARCH_RCAR_GEN3, which might confuse the casual reader. Prepare for the advent of ARCH_RCAR_GEN4 by extending the dependency for auto-selecting reset controller support. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
-
Carlos Song authored
This adds i2c bus recovery to the lpi2c driver. Uses the generic recovery function setting the SCL/SDA pads as GPIO pins and sending 9 clocks to try and recover the bus. Signed-off-by:
Carlos Song <carlos.song@nxp.com> Reviewed-by:
Clark Wang <xiaoning.wang@nxp.com> Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
-
- 04 Mar, 2024 4 commits
-
-
Ji Sheng Teoh authored
Enable device system suspend and resume PM support, and mark the device state as suspended during system suspend to reject any data transfer. Signed-off-by:
Ji Sheng Teoh <jisheng.teoh@starfivetech.com> Reviewed-by:
-
Wolfram Sang authored
DRV_NAME was useful back in the days. But here, being used once, it is only cruft. Signed-off-by:
Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by:
-
Wolfram Sang authored
"i2c-scl-clk-low-timeout-us" is wrongly used here because it describes maximum clock stretching not maximum transfer time. Additionally, it is deprecated because of issues. Move this driver to the correct binding. Signed-off-by:
-
Wolfram Sang authored
"i2c-scl-clk-low-timeout-us" has flaws in itself and the usage here is all wrong. The driver doesn't use it as a maximum time for clock stretching but the maximum time for a total transfer. We already have a binding for the latter. Convert the wrong binding from examples. Signed-off-by:
-
- 27 Feb, 2024 8 commits
-
-
Jarkko Nikula authored
I got an idea the i2c-designware should not need duplicated state machines for the interrupt and polling modes. The IP is practically the same and state transitions happens in response to the events that can be observed from the DW_IC_RAW_INTR_STAT register. Either by interrupts or by polling. Another reasons are the interrupt mode is the most tested, has handling for special cases as well as transmit abort handling and those are missing from two polling mode quirks. Patch implements a generic polling mode by using existing code for interrupt mode. This is done by moving event handling from the i2c_dw_isr() into a new i2c_dw_process_transfer() that will be called both from the i2c_dw_isr() and a polling loop. Polling loop is implemented in a new i2c_dw_wait_transfer() that is shared between both modes. In interrupt mode it waits for the completion object as before. In polling mode both completion object and DW_IC_RAW_INTR_STAT are polled to determine completed transfer and state transitions. Loop tries to save power by sleeping "stetson guessed" range between 3 and 25 µS which falls between 10 cycles of High-speed mode 3.4 Mb/s and Fast mode 400 kHz. With it the CPU usage was reduced under heavy Fast mode I2C transfer without much increase in total transfer time but otherwise no more effort has been put to optimize this. I decided to convert the txgbe_i2c_dw_xfer_quirk() straight to generic polling mode code in this patch. It doesn't have HW dependent quirks like the amd_i2c_dw_xfer_quirk() does have and without users this patch is needless. Signed-off-by:
Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by:
Jiawen Wu <jiawenwu@trustnetic.com> Signed-off-by:
-
Jarkko Nikula authored
I believe RX FIFO depth define 0 is incorrect on Wangxun 10Gb NIC. It must be at least 1 since code is able to read received data from the DW_IC_DATA_CMD register. For now this define is irrelevant since the txgbe_i2c_dw_xfer_quirk() doesn't use the rx_fifo_depth member variable of struct dw_i2c_dev but is needed when converting code into generic polling mode implementation. Signed-off-by:
-
Jarkko Nikula authored
Code is more logically arranged when i2c_dw_read_clear_intrbits() and i2c_dw_isr() are located before i2c_dw_xfer(). Real reason for this is to prepare for more shared code between interrupt and polling mode code. While at it, remove one extra space and refer to the i2c_dw_init_master() in two comment sections. Signed-off-by:
-
Jarkko Nikula authored
Convert access to DW_IC_INTR_MASK register using the existing __i2c_dw_write_intr_mask() and a __i2c_dw_read_intr_mask() introduced here. Motivation to this is to prepare for generic polling mode code where polling mode will use a SW mask instead of DW_IC_INTR_MASK. Signed-off-by:
-
Jarkko Nikula authored
I was testing the polling mode txgbe_i2c_dw_xfer_quirk() on a HW where the i2c-designware has interrupt connected and shared with other device. I noticed there is a bogus interrupt for each transfer. Reason for this that both polling mode functions call the i2c_dw_xfer_init() which enable interrupts then followed by immediate disable by the same polling mode functions. This is enough to trigger TX_EMPTY interrupt. Fix this by introducing a __i2c_dw_write_intr_mask() helper that unmasks interrupts conditionally and use it in i2c_dw_xfer_init(). Signed-off-by:
-
Jarkko Nikula authored
Currently initialization flow in i2c_dw_probe_master() skips a few steps and has code duplication for polling mode implementation. Simplify this by adding a new ACCESS_POLLING flag that is set for those two platforms that currently use polling mode and use it to skip interrupt handler setup. Signed-off-by:
-
Varshini Rajendran authored
Add compatible string for sam9x7. Signed-off-by:
Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Signed-off-by:
-
Peng Fan authored
Add i.MX95 LPI2C compatible entry, same as i.MX93 compatible with i.MX7ULP. Acked-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
-
- 14 Feb, 2024 1 commit
-
-
Rand Deeb authored
In the npcm_i2c_reg_slave() function, there was a redundant comparison that checked if 'bus->slave' was null immediately after assigning it the 'client' value. There were concerns about a potential null dereference because of `client->adapter`, but according to Wolfram Sang, "we trusted ourselves here" Therefore, this comparison is unnecessary. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by:
Rand Deeb <rand.sec96@gmail.com> Reviewed-by:
-
- 08 Feb, 2024 14 commits
-
-
Heiner Kallweit authored
Avoid code duplication and factor out retrieving and checking the block length value to new helper i801_get_block_len(). Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by:
-
Heiner Kallweit authored
Add a sentinel length value that is used to check whether we should read and use the length value provided by the slave device. This simplifies the currently used checks. Signed-off-by:
-
Heiner Kallweit authored
i2c and smbus block transaction handling have little in common, therefore split this function to improve code readability. Signed-off-by:
-
Heiner Kallweit authored
Avoid code duplication and factor out checking and clearing PEC error bit to new helper i801_check_and_clear_pec_error(). Signed-off-by:
-
Heiner Kallweit authored
This change simplifies the code a little and makes clearer that the ICH5 feature set is an extension of the ICH4 feature set. Signed-off-by:
-
Geert Uytterhoeven authored
Document support for the I2C Bus Interfaces in the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by:
-
Devyn Liu authored
The driver receives the tx fifo almost empty(aempty) interrupt and reads the tx_aempty_int_mstat to start a round of data transfer. The operation of clearing the TX aempty interrupt after completing a write cycle is added to ensure that the FIFO is truly at almost empty status when an aempty interrupt is received. The threshold for fifo almost empty interrupt is defined as 1. Signed-off-by:
Devyn Liu <liudingyuan@huawei.com> Reviewed-by:
Yicong Yang <yangyicong@hisilicon.com> Reviewed-by:
-
Devyn Liu authored
The driver finishes a write cycle by read the fifo tx full status or write limit decrease to 0. The driver starts to write data to the FIFO after the I2C FIFO almost empty interrupt is reported. The threshold for FIFO almost empty interrupt is that the amount of data in the FIFO is less than or equal to 1. Reduce write maxwrite to the fifo depth - aempty interrupt threshold. Limiting the number of data to be written at a time to remaining fifo capacity. Signed-off-by:
-
Geert Uytterhoeven authored
Switch the R-Mobile A1, R-Mobile APE6, and SH-Mobile AG5 SoCs to the new frequency calculation formula, to (a) avoid running the I2C bus too fast, and (b) bring the low/high ratio closer to the recommended ratio 5/4. As this makes fast_clock_dt_config and v2_freq_calc_dt_config identical, merge them into a single fast_clock_dt_config. Legacy SH users (sh7343, sh7366, and sh772[234]) are left alone, and still use the old formula. Measurement results on R-Mobile APE6 and SH-Mobile AG5 (fck=104 MHz, clks_per_count=2): 100 kHz: 106 kHz LH=1.12 before, 99.6 kHz L/H=1.22 after 400 kHz: 384 kHz LH=1.67 before, 392 kHz L/H=1.27 after Measurement results on R-Mobile A1 (fck=49.5 MHz, clks_per_count=1): 100 kHz: 106 kHz L/H=1.09 before, 99.6 kHz L/H=1.20 after Signed-off-by:
-
Esben Haabendal authored
Starting with commit 75820314 ("i2c: core: add generic I2C GPIO recovery") GPIO bus recovery is supported by the I2C core, so we can remove the driver implementation and use that one instead. As a nice side-effect, pinctrl becomes optional, allowing bus recovery on LS1021A, which does not have such luxury, but can be wired up to use extra fixed GPIO pins. Note: The previous error messages about bus recovery not being supported is dropped with this change. Given that it is perfectly possible to have platforms where bus recovery works without pinctrl support, I happen to work on one such, both error messages does not really make sense in those cases. And I don't see how to know if this is the case or not. Signed-off-by:
Esben Haabendal <esben@geanix.com> Acked-by:
Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
-
Heiner Kallweit authored
Argument priv isn't used, so remove it. Signed-off-by:
-
Heiner Kallweit authored
Replace magic number 10 with the appropriate constant. Signed-off-by:
-
Patrick Rudolph authored
Enable additional features based on DT settings and unconditionally release the shared interrupt pin after 1.6 seconds and allow to use it as reset. These features aren't enabled by default and it's up to board designer to validate for proper functioning and detection of devices in secondary bus as sometimes it can cause secondary bus being disabled. Signed-off-by:
Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by:
Naresh Solanki <naresh.solanki@9elements.com> Reviewed-by:
-
Patrick Rudolph authored
Maxim Max7357 has a configuration register to enable additional features. These features aren't enabled by default & its up to board designer to enable the same as it may have unexpected side effects. These should be validated for proper functioning & detection of devices in secondary bus as sometimes it can cause secondary bus being disabled. Add booleans for: - maxim,isolate-stuck-channel - maxim,send-flush-out-sequence - maxim,preconnection-wiggle-test-enable Signed-off-by:
-
- 04 Feb, 2024 1 commit
-
-
Linus Torvalds authored
-
