- 22 Mar, 2021 2 commits
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Aswath Govindraju authored
The gpio0 subsystem present in MCU domain might be used by firmware and is not pinned out in evm/sk. Therefore, reserve it for MCU firmware. Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210319051950.17549-3-a-govindraju@ti.com
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Aswath Govindraju authored
Add device tree nodes for GPIO modules and interrupt controller in main and mcu domains. Signed-off-by:
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- 18 Mar, 2021 3 commits
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Vignesh Raghavendra authored
Both AM64 EVM and SK have a 512Mb S28HS512T Octal SPI NOR flash. Add DT node for the same. Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by:
Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210318113757.21012-2-vigneshr@ti.com
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Vignesh Raghavendra authored
AM64 SoC has a single Octal SPI (OSPI) instance under Flash SubSystem (FSS). Add DT entry for the same. Signed-off-by:
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Vignesh Raghavendra authored
AM64 SoC has a single ADC IP with 8 channels. Add DT node for the same. Default usecase is to control ADC from non Linux core on the system on AM642 GP EVM, therefore mark the node as reserved in k3-am642-evm.dts file. ADC lines are not pinned out on AM642 SK board, therefore disable the node in k3-am642-sk.dts file. Signed-off-by:
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- 17 Mar, 2021 2 commits
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Aswath Govindraju authored
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is connected with a resistor divider in between. USB0_DRVVBUS pin is muxed between USB0_DRVVBUS and GPIO1_79 signals. Add the corresponding properties and set the pinmux mode for USB subsystem in the evm dts file. Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com> Acked-by:
Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20210317043007.18272-3-a-govindraju@ti.com
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Aswath Govindraju authored
Add DT node for the single USB subsystem in main dtsi file. Signed-off-by:
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- 11 Mar, 2021 9 commits
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Jan Kiszka authored
Add support for two Siemens SIMATIC IOT2050 variants, Basic and Advanced. They are based on the TI AM6528 GP and AM6548 SOCs HS, thus differ in their number of cores and availability of security features. Furthermore the Advanced version comes with more RAM, an eMMC and a few internal differences. Based on original version by Le Jin. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
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Jan Kiszka authored
These boards are based on AM6528 GP and AM6548 HS SOCs. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/173ce7d928ed9f352af7673dd44c6c76a1466eb5.1615473223.git.jan.kiszka@siemens.com
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Jan Kiszka authored
Add prefix for Siemens AG. Signed-off-by:
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Aswath Govindraju authored
Add pinmux details and device tree node for the EEPROM attached to SPI0 module in main domain. Signed-off-by:
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Pratyush Yadav authored
TI J7200 has the Cadence OSPI controller for interfacing with OSPI flashes. Add its node to allow using SPI flashes. Signed-off-by:
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Pratyush Yadav authored
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the frequency to 25 MHz. This is the frequency that the flash has been successfully tested with in Octal DTR mode. The total performance should still increase since 8D-8D-8D mode should be at least twice as fast as 1S-1S-8S mode. Signed-off-by:
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Pratyush Yadav authored
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the frequency to 25 MHz. This is the frequency that the flash has been successfully tested with in Octal DTR mode. The total performance should still increase since 8D-8D-8D mode should be at least twice as fast as 1S-1S-8S mode. Signed-off-by:
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Aswath Govindraju authored
arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems According to latest errata of J721e [1], HS400 mode is not supported in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2 subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode. Also, update the itap delay values for all the MMCSD subsystems according the latest J721e data sheet[2] [1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf [2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf Fixes: cd48ce86 ("arm64: dts: ti: k3-j721e-common-proc-board: Add support for SD card UHS modes") Signed-off-by:
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Jan Kiszka authored
Add the DT entry for a watchdog based on RTI1. On SR1.0 silicon, it requires additional firmware on the MCU R5F cores to handle the expiry, e.g. https://github.com/siemens/k3-rti-wdt. As this firmware will also lock the power domain to protect it against premature shutdown, mark it shared. Signed-off-by:
Praneeth Bajjuri <praneeth@ti.com> Link: https://lore.kernel.org/r/279c20fa-6e5e-4f88-9cd1-f76297a28a19@web.de
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- 09 Mar, 2021 14 commits
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Suman Anna authored
Add the DT nodes for the ICSSG0 and ICSSG1 processor subsystems that are present on the K3 J721E SoCs. The two ICSSGs are identical to each other for the most part, with the ICSSG1 supporting slightly enhanced features for supporting SGMII PRU Ethernet. Each ICSSG instance is represented by a PRUSS subsystem node and other child nodes. These nodes are enabled by default. The ICSSGs on K3 J721E SoCs are revised versions of the ICSSG on the first AM65x SR1.0 SoCs. The PRU IRAMs are slightly smaller, and the IP includes two new auxiliary PRU cores called Tx_PRUs. The Tx_PRUs have 6 KB of IRAMs and leverage the same host interrupts as the regular PRU cores. All The ICSSG host interrupts intended towards the main Arm core are also shared with other processors on the SoC, and can be partitioned as per system integration needs. The ICSSG subsystem node contains the entire address space. The various sub-modules of the ICSSG are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the two PRU cores, two RTU cores, two Tx_PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controller (MII_RT), the Gigabit capable MII_G_RT and the CFG sub-module are represented as syscon nodes. The ICSSG CFG sub-module provides two internal clock muxes, and these are represented as children of the CFG child node 'clocks' by the 'coreclk-mux' and iepclk-mux' clk nodes. The default parents for these mux clocks are also defined using the assigned-clock-parents property. The DT nodes use all standard properties. The regs property in the PRU/RTU/Tx_PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU/RTU/Tx_PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU, RTU and Tx_PRU cores are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): ICSSG0 PRU0 Core : j7-pru0_0-fw ; PRU1 Core : j7-pru0_1-fw ICSSG0 RTU0 Core : j7-rtu0_0-fw ; RTU1 Core : j7-rtu0_1-fw ICSSG0 Tx_PRU0 Core : j7-txpru0_0-fw ; Tx_PRU1 Core : j7-txpru0_1-fw ICSSG1 PRU0 Core : j7-pru1_0-fw ; PRU1 Core : j7-pru1_1-fw ICSSG1 RTU0 Core : j7-rtu1_0-fw ; RTU1 Core : j7-rtu1_1-fw ICSSG1 Tx_PRU0 Core : j7-txpru1_0-fw ; Tx_PRU1 Core : j7-txpru1_1-fw Note: 1. The ICSSG INTC on J721E SoCs share all the host interrupts with other processors, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. 2. There are few more sub-modules like the Industrial Ethernet Peripherals (IEPs), MDIO, PWM, UART that do not have bindings and so will be added in the future. Signed-off-by:
Suman Anna <s-anna@ti.com> Signed-off-by:
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Suman Anna authored
Add the DT nodes for the ICSSG0, ICSSG1 and ICSSG2 processor subsystems that are present on the K3 AM65x SoCs. The three ICSSGs are identical to each other for the most part, with the ICSSG2 supporting slightly enhanced features for supporting SGMII PRU Ethernet. Each ICSSG instance is represented by a PRUSS subsystem node. These nodes are enabled by default. The ICSSGs on K3 AM65x SoCs are super-sets of the PRUSS on the AM57xx/ 6AK2G SoCs except for larger Shared Data RAM and the lack of a PRU-ICSS crossbar. They include two auxiliary PRU cores called RTUs and few other additional sub-modules. The interrupt integration is also different on the K3 AM65x SoCs and are propagated through various SoC-level Interrupt Router and Interrupt Aggregator blocks. The AM65x SR2.0 SoCs have a revised ICSSG IP that is based off the subsequent IP used on J721E SoCs, and has two new auxiliary PRU cores called Tx_PRUs. The Tx_PRUs have 6 KB of IRAMs and leverage the same host interrupts as the regular PRU cores. The Broadside (BS) RAM within each core is also sized differently w.r.t SR1.0. The ICSSG subsystem node contains the entire address space. The various sub-modules of the ICSSG are represented as individual child nodes (so platform devices themselves) of the PRUSS subsystem node. These include the various PRU cores and the interrupt controller. All the Data RAMs are represented within a child node of its own named 'memories' without any compatible. The Real Time Media Independent Interface controllers (MII_RT and MII_G_RT), and the CFG sub-module are represented as syscon nodes. The ICSSG CFG module has clock muxes for IEP clock and CORE clock, these clk nodes are added under the CFG child node 'clocks'. The default parents for these mux clocks are also assigned. The DT nodes use all standard properties. The regs property in the PRU/RTU/Tx_PRU nodes define the addresses for the Instruction RAM, the Debug and Control sub-modules for that PRU core. The firmware for each PRU/RTU/Tx_PRU core is defined through a 'firmware-name' property. The default names for the firmware images for each PRU, RTU and Tx_PRU cores are defined as follows (these can be adjusted either in derivative board dts files or through sysfs at runtime if required): ICSSG0 PRU0 Core : am65x-pru0_0-fw ; PRU1 Core : am65x-pru0_1-fw ICSSG0 RTU0 Core : am65x-rtu0_0-fw ; RTU1 Core : am65x-rtu0_1-fw ICSSG0 Tx_PRU0 Core : am65x-txpru0_0-fw ; Tx_PRU1 Core : am65x-txpru0_1-fw ICSSG1 PRU0 Core : am65x-pru1_0-fw ; PRU1 Core : am65x-pru1_1-fw ICSSG1 RTU0 Core : am65x-rtu1_0-fw ; RTU1 Core : am65x-rtu1_1-fw ICSSG1 Tx_PRU0 Core : am65x-txpru1_0-fw ; Tx_PRU1 Core : am65x-txpru1_1-fw ICSSG2 PRU0 Core : am65x-pru2_0-fw ; PRU1 Core : am65x-pru2_1-fw ICSSG2 RTU0 Core : am65x-rtu2_0-fw ; RTU1 Core : am65x-rtu2_1-fw ICSSG2 Tx_PRU0 Core : am65x-txpru2_0-fw ; Tx_PRU1 Core : am65x-txpru2_1-fw Note: 1. The ICSSG nodes are all added as per the SR2.0 device. Any sub-module IP differences need to be handled within the driver using SoC device match logic or separate dts/overlay files (if needs to be supported) with the Tx_PRU nodes expected to be disabled at the minimum. 2. The ICSSG INTC on AM65x SoCs share 5, 6, 7 host interrupts with other processors, so use the 'ti,irqs-reserved' property in derivative board dts files _if_ any of them should not be handled by the host OS. 3. There are few more sub-modules like the Industrial Ethernet Peripherals (IEPs), MDIO, PWM, UART that do not have bindings and so will be added in the future. Signed-off-by:
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Vignesh Raghavendra authored
AM642 SK board has 2 CPSW3g ports connected through TI DP83867 PHYs. Add DT entries for the same. Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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Vignesh Raghavendra authored
On am642-evm the CPSW3g ext. Port1 is directly connected to TI DP83867 PHY and Port2 is connected to TI DP83869 PHY which is shared with ICSS subsystem. The TI DP83869 PHY MII interface is configured using pinmux for CPSW3g, while MDIO bus is connected through GPIO controllable 2:1 TMUX154E switch (MDIO GPIO MUX) which has to be configured to route MDIO bus from CPSW3g to TI DP83869 PHY. Hence add networking support for am642-evm: - add CPSW3g MDIO and RGMII pinmux entries for both ext. ports; - add CPSW3g nodes; - add mdio-mux-multiplexer DT nodes to represent above topology. Signed-off-by:
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Grygorii Strashko authored
Add DT node for the Main domain CPTS. Signed-off-by:
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Vignesh Raghavendra authored
Add CPSW3g DT node with two external ports, MDIO and CPTS support. For CPSW3g DMA channels the ASEL is set to 15 (AM642x per DMA channel coherency feature), so that CPSW DMA channel participates in Coherency and thus avoid need to cache maintenance for SKBs. This improves bidirectional TCP performance by up to 100Mbps (on 1G link). Signed-off-by:
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Jan Kiszka authored
This is demanded by the parent binding of ti,am654-pcie-rc, see Documentation/devicetree/bindings/pci/designware-pcie.txt. Signed-off-by:
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Lokesh Vutla authored
AM642 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM642 SoC. It supports the following interfaces: * 2 GB LPDDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode * x1 USB 3.0 Type-A port * x1 UHS-1 capable µSD card slot * 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837 * 512 Mbit OSPI flash * x2 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin Raspberry Pi compatible GPIO header * 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO) * 54-pin header for Programmable Realtime Unit (PRU) IO pins * Interface for remote automation. Includes: * power measurement and reset control * boot mode change Add basic support for AM642 SK. Signed-off-by:
Sekhar Nori <nsekhar@ti.com> Signed-off-by:
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Lokesh Vutla authored
AM642 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM642 SoC. Add DT binding documentation for AM642 SK. Signed-off-by:
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Dave Gerlach authored
The AM642 EValuation Module (EVM) is a board that provides access to various peripherals available on the AM642 SoC, such as PCIe, USB 2.0, CPSW Ethernet, ADC, and more. Introduce support for the AM642 EVM to enable mmc boot, including enabling UART and I2C on the board. Signed-off-by:
Faiz Abbas <faiz_abbas@ti.com> Signed-off-by:
Dave Gerlach <d-gerlach@ti.com> Tested-by:
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Peter Ujfalusi authored
Add the nodes for DMSS INTA, BCDMA and PKTDMA to enable the use of the DMAs in the system. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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Dave Gerlach authored
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Introduce basic support for the AM642 SoC to enable ramdisk or MMC boot. Introduce the sdhci, i2c, spi, and uart MAIN domain periperhals under cbass_main and the i2c, spi, and uart MCU domain periperhals under cbass_mcu. Signed-off-by:
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Dave Gerlach authored
Add pinctrl macros for AM64 SoC. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the soc dts files. Unlike what checkpatch insists, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by:
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Dave Gerlach authored
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2Signed-off-by:
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- 06 Mar, 2021 4 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdmaLinus Torvalds authored
Pull rdma fixes from Jason Gunthorpe: "Nothing special here, though Bob's regression fixes for rxe would have made it before the rc cycle had there not been such strong winter weather! - Fix corner cases in the rxe reference counting cleanup that are causing regressions in blktests for SRP - Two kdoc fixes so W=1 is clean - Missing error return in error unwind for mlx5 - Wrong lock type nesting in IB CM" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: RDMA/rxe: Fix errant WARN_ONCE in rxe_completer() RDMA/rxe: Fix extra deref in rxe_rcv_mcast_pkt() RDMA/rxe: Fix missed IB reference counting in loopback RDMA/uverbs: Fix kernel-doc warning of _uverbs_alloc RDMA/mlx5: Set correct kernel-doc identifier IB/mlx5: Add missing error code RDMA/rxe: Fix missing kconfig dependency on CRYPTO RDMA/cm: Fix IRQ restore in ib_send_cm_sidr_rep -
git://git.kernel.org/pub/scm/linux/kernel/git/kees/linuxLinus Torvalds authored
Pull gcc-plugins fixes from Kees Cook: "Tiny gcc-plugin fixes for v5.12-rc2. These issues are small but have been reported a couple times now by static analyzers, so best to get them fixed to reduce the noise. :) - Fix coding style issues (Jason Yan)" * tag 'gcc-plugins-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: gcc-plugins: latent_entropy: remove unneeded semicolon gcc-plugins: structleak: remove unneeded variable 'ret'
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git://git.kernel.org/pub/scm/linux/kernel/git/kees/linuxLinus Torvalds authored
Pull pstore fixes from Kees Cook: - Rate-limit ECC warnings (Dmitry Osipenko) - Fix error path check for NULL (Tetsuo Handa) * tag 'pstore-v5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: pstore/ram: Rate-limit "uncorrectable error in header" message pstore: Fix warning in pstore_kill_sb()
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- 05 Mar, 2021 6 commits
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Linus Torvalds authored
Merge tag 'for-5.12/dm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm Pull device mapper fixes from Mike Snitzer: "Fix DM verity target's optional Forward Error Correction (FEC) for Reed-Solomon roots that are unaligned to block size" * tag 'for-5.12/dm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm: dm verity: fix FEC for RS roots unaligned to block size dm bufio: subtract the number of initial sectors in dm_bufio_get_device_size
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git://git.kernel.dk/linux-blockLinus Torvalds authored
Pull block fixes from Jens Axboe: - NVMe fixes: - more device quirks (Julian Einwag, Zoltán Böszörményi, Pascal Terjan) - fix a hwmon error return (Daniel Wagner) - fix the keep alive timeout initialization (Martin George) - ensure the model_number can't be changed on a used subsystem (Max Gurtovoy) - rsxx missing -EFAULT on copy_to_user() failure (Dan) - rsxx remove unused linux.h include (Tian) - kill unused RQF_SORTED (Jean) - updated outdated BFQ comments (Joseph) - revert work-around commit for bd_size_lock, since we removed the offending user in this merge window (Damien) * tag 'block-5.12-2021-03-05' of git://git.kernel.dk/linux-block: nvmet: model_number must be immutable once set nvme-fabrics: fix kato initialization nvme-hwmon: Return error code when registration fails nvme-pci: add quirks for Lexar 256GB SSD nvme-pci: mark Kingston SKC2000 as not supporting the deepest power state nvme-pci: mark Seagate Nytro XM1440 as QUIRK_NO_NS_DESC_LIST. rsxx: Return -EFAULT if copy_to_user() fails block/bfq: update comments and default value in docs for fifo_expire rsxx: remove unused including <linux/version.h> block: Drop leftover references to RQF_SORTED block: revert "block: fix bd_size_lock use" -
git://git.kernel.dk/linux-blockLinus Torvalds authored
Pull io_uring fixes from Jens Axboe: "A bit of a mix between fallout from the worker change, cleanups and reductions now possible from that change, and fixes in general. In detail: - Fully serialize manager and worker creation, fixing races due to that. - Clean up some naming that had gone stale. - SQPOLL fixes. - Fix race condition around task_work rework that went into this merge window. - Implement unshare. Used for when the original task does unshare(2) or setuid/seteuid and friends, drops the original workers and forks new ones. - Drop the only remaining piece of state shuffling we had left, which was cred. Move it into issue instead, and we can drop all of that code too. - Kill f_op->flush() usage. That was such a nasty hack that we had out of necessity, we no longer need it. - Following from ->flush() removal, we can also drop various bits of ctx state related to SQPOLL and cancelations. - Fix an issue with IOPOLL retry, which originally was fallout from a filemap change (removing iov_iter_revert()), but uncovered an issue with iovec re-import too late. - Fix an issue with system suspend. - Use xchg() for fallback work, instead of cmpxchg(). - Properly destroy io-wq on exec. - Add create_io_thread() core helper, and use that in io-wq and io_uring. This allows us to remove various silly completion events related to thread setup. - A few error handling fixes. This should be the grunt of fixes necessary for the new workers, next week should be quieter. We've got a pending series from Pavel on cancelations, and how tasks and rings are indexed. Outside of that, should just be minor fixes. Even with these fixes, we're still killing a net ~80 lines" * tag 'io_uring-5.12-2021-03-05' of git://git.kernel.dk/linux-block: (41 commits) io_uring: don't restrict issue_flags for io_openat io_uring: make SQPOLL thread parking saner io-wq: kill hashed waitqueue before manager exits io_uring: clear IOCB_WAITQ for non -EIOCBQUEUED return io_uring: don't keep looping for more events if we can't flush overflow io_uring: move to using create_io_thread() kernel: provide create_io_thread() helper io_uring: reliably cancel linked timeouts io_uring: cancel-match based on flags io-wq: ensure all pending work is canceled on exit io_uring: ensure that threads freeze on suspend io_uring: remove extra in_idle wake up io_uring: inline __io_queue_async_work() io_uring: inline io_req_clean_work() io_uring: choose right tctx->io_wq for try cancel io_uring: fix -EAGAIN retry with IOPOLL io-wq: fix error path leak of buffered write hash map io_uring: remove sqo_task io_uring: kill sqo_dead and sqo submission halting io_uring: ignore double poll add on the same waitqueue head ... -
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pmLinus Torvalds authored
Pull power management fixes from Rafael Wysocki: "These fix the usage of device links in the runtime PM core code and update the DTPM (Dynamic Thermal Power Management) feature added recently. Specifics: - Make the runtime PM core code avoid attempting to suspend supplier devices before updating the PM-runtime status of a consumer to 'suspended' (Rafael Wysocki). - Fix DTPM (Dynamic Thermal Power Management) root node initialization and label that feature as EXPERIMENTAL in Kconfig (Daniel Lezcano)" * tag 'pm-5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: powercap/drivers/dtpm: Add the experimental label to the option description powercap/drivers/dtpm: Fix root node initialization PM: runtime: Update device status before letting suppliers suspend -
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pmLinus Torvalds authored
Pull ACPI fix from Rafael Wysocki: "Make the empty stubs of some helper functions used when CONFIG_ACPI is not set actually match those functions (Andy Shevchenko)" * tag 'acpi-5.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: ACPI: bus: Constify is_acpi_node() and friends (part 2)
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git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommuLinus Torvalds authored
Pull iommu fixes from Joerg Roedel: - Fix a sleeping-while-atomic issue in the AMD IOMMU code - Disable lazy IOTLB flush for untrusted devices in the Intel VT-d driver - Fix status code definitions for Intel VT-d - Fix IO Page Fault issue in Tegra IOMMU driver * tag 'iommu-fixes-v5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/vt-d: Fix status code for Allocate/Free PASID command iommu: Don't use lazy flush for untrusted device iommu/tegra-smmu: Fix mc errors on tegra124-nyan iommu/amd: Fix sleeping in atomic in increase_address_space()
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