- 29 May, 2015 8 commits
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Suzuki K. Poulose authored
Each CCI model have different event/source codes and formats. This patch exports this information via the sysfs, which includes the aliases for the events. The aliases are listed by 'perf list', helping the users to specify the name of the event instead of the binary config values. Each event alias must accompany the 'source' code except for the following cases : 1) CCI-400 - cycles event, doesn't relate to an interface. 2) CCI-500 - Global events to the CCI. (Fixed source code = 0xf) Each CCI model provides two sets of attributes(format and event), which are dynamically populated before registering the PMU, to allow for the appropriate information. Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Suzuki K. Poulose authored
CCI-500 provides 8 event counters which can count any of the supported events independently. The PMU event id is a 9-bit value made of two parts. bits [8:5] - Source port 0x0-0x6 Slave Ports 0x8-0xD Master Ports 0xf Global Events to CCI 0x7,0xe Reserved bits [0:4] - Event code (specific to each type of port) The generic CCI-500 controlling interface remains the same with CCI-400. However there are some differences in the PMU event counters. - No cycle counter - Upto 8 counters(4 in CCI-400) - Each counter area is 64K(4K in CCI400) - The counter0 starts at offset 0x10000 from the base of CCI Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Suzuki K. Poulose authored
Rename CCI400 specific defintions from CCI_xxx to CCI400_xxx. Introduce generic ARM_CCI_PMU to cover common code for handling the CCI PMU. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Suzuki K. Poulose authored
Given that each CCI has different set of interfaces and its associated events, it is good to abstract the validation of the event codes to make it easier to add support for a new CCI model. This patch also abstracts the mapping of a given event to a counter, as there are some special counters for certain specific events. We assume that the fixed hardware counters are always at the beginning, so that we can use cci_model->fixed_hw_events as an upper bound to given idx to check if we need to program the counter for an event. Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Suzuki K. Poulose authored
Adds the PMU model specific counters to the PMU model abstraction to make it easier to add a new PMU. The patch cleans up the naming convention used all over the code. e.g, CCI_PMU_MAX_HW_EVENTS => maximum number of events that can be counted at any time, which is in fact the maximum number of counters available. Change all such namings to use 'counters' instead of events. This patch also abstracts the following: 1) Size of a PMU event counter area. 2) Maximum number of programmable counters supported by the PMU model 3) Number of counters which counts fixed events (e.g, cycle counter on CCI-400). Also changes some of the static allocation of the data structures to dynamic, to accommodate the number of events supported by a PMU. Gets rid ofthe CCI_PMU_* defines for the model. All such data should be accessed via the model abstraction. Limits the number of counters to the maximum supported by the 'model'. Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Suzuki K. Poulose authored
This patch gets rid of the global struct cci_pmu variable and makes the code use the cci_pmu explicitly. Makes code a bit more robust and reader friendly. Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Suzuki K. Poulose authored
Do not enable CCI-400 PMU by default and fix the dependency on PERF_EVENTS than HW_PERF_EVENTS. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: arm@kernel.org Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/mbgg/linux-mediatekArnd Bergmann authored
Merge "ARM: mediatek: soc updates for v4.2" from Matthias Brugger: - pmic wrapper: fix clock handling - pmic wrapper: fix state machine - pmic wrapper: fix compile dependency * tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek: soc: mediatek: Add compile dependency to pmic-wrapper soc: mediatek: PMIC wrap: Fix register state machine handling soc: mediatek: PMIC wrap: Fix clock rate handling
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- 27 May, 2015 3 commits
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Matthias Brugger authored
The pmic-wrapper calls the reset controller. If CONFIG_RESET_CONTROLLER is not set, compilation fails with: drivers/soc/mediatek/mtk-pmic-wrap.c: In function ‘pwrap_probe’: drivers/soc/mediatek/mtk-pmic-wrap.c:836:2: error: implicit declaration of function ‘devm_reset_control_get’ [-Werror=implicit-function-declaration] This patch sets the dependency in the Kconfig file. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Sascha Hauer authored
When the PMIC wrapper state machine has read a register it goes into the "wait for valid clear" (vldclr) state. The state machine stays in this state until the VLDCLR bit is written to. We should write this bit after reading a register because the SCPSYS won't let the system go into suspend as long as the state machine waits for valid clear. Since now we never leave the state machine in vldclr state we no longer have to check for this state on pwrap_read/pwrap_write entry and can remove the corresponding code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Sascha Hauer authored
replace chipselect extension values based on SPI clock with hardcoded SoC specific values. The PMIC wrapper has the ability of extending the chipselects by configurable amounts of time. We configured the values based on the rate of SPI clock, but this is wrong. The delays should be configured based on the internal PMIC clock that latches the values from the SPI bus to the internal PMIC registers. By default this clock is 24MHz. Other clock frequencies are for debugging only and can be removed from the driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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- 20 May, 2015 1 commit
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Arnd Bergmann authored
Merge tag 'berlin-simple-mfd-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/drivers Merge "Berlin simple-mfd for v4.2" from Sebastian Hesselbarth: - based on arm-soc drivers/simple-mfd branch - rework of chip/system ctrl nodes to simple-mfd probing for clk, pinctrl, and reset - add adc node * tag 'berlin-simple-mfd-4.2-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: berlin: add an ADC node for the BG2Q ARM: berlin: remove useless chip and system ctrl compatibles clk: berlin: drop direct of_iomap of nodes reg property ARM: berlin: move BG2Q clock node ARM: berlin: move BG2CD clock node ARM: berlin: move BG2 clock node clk: berlin: prepare simple-mfd conversion pinctrl: berlin: drop SoC stub provided regmap ARM: berlin: move pinctrl to simple-mfd nodes pinctrl: berlin: prepare to use regmap provided by syscon reset: berlin: drop arch_initcall initialization ARM: berlin: move reset to simple-mfd nodes reset: berlin: convert to a platform driver ARM: berlin: prepare simple-mfd/syscon conversion of sys/chip ctrl nodes ARM: berlin: select MFD_SYSCON by default
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- 18 May, 2015 15 commits
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Antoine Tenart authored
This patch adds the ADC node for the Berlin BG2Q, using the newly added Berlin IIO ADC driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
Now that the rework to have one sub-node per device in the chip and system controllers is done, their dedicated compatible can be removed. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
The Berlin clock driver was sharing a DT node with the pin controller and the reset driver. All these devices are now sub-nodes of the chip controller. This patch rework the Berlin clock driver to allow moving the Berlin clock DT bindings into their own sub-node of the chip controller node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
With the introduction of the Berlin simple-mfd controller driver, all drivers previously sharing the chip and system controller nodes now have their own sub-node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
With the introduction of the Berlin simple-mfd controller driver, all drivers previously sharing the chip and system controller nodes now have their own sub-node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
With the introduction of the Berlin simple-mfd controller driver, all drivers previously sharing the chip and system controller nodes now have their own sub-node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
Prepare conversion of berlin clk drivers to a simple-mfd sub-node by checking for parent node compatible. If parent node is "syscon" compatible use it for of_iomap instead of the own node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
With convertsion to simple-mfd sub-nodes, drop the regmap registration by SoC stubs. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
Now with proper support for simple-mfd probed pinctrl driver, move to the new soc-pinctrl and system-pinctrl nodes. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
The Berlin pin controller nodes will be simple-mfd probed sub-nodes of soc-controller and system-controller nodes. The register bank is managed by syscon, which provides a regmap. Prepare to get the regmap from syscon parent node instead of SoC stub provided regmap. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
With proper platform driver probing for berlin reset driver, drop the arch_initcall workaround. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
Now with a proper platform driver for reset and simple-mfd, move to the new marvell,berlin-reset node. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
The Berlin reset controller was introduced without being a platform driver because of a needed DT rework: the node describing the reset controller also describes the pinctrl and clk controllers... Prepare conversion by adding a platform driver probe to a new compatible "marvell,berlin2-reset" with syscon regmap. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
The chip and system controller nodes will be handled by simple-mfd based driver probing. Prepare the conversion by adding "simple-mfd" and "syscon" compatibles to the corresponding nodes. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Antoine Tenart authored
The chip and system controller nodes handle sub-devices, such as the clock, pinctrl or reset controllers. The drivers handling them need a regmap provided by syscon. Select it by default when using a Berlin SoC. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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- 13 May, 2015 4 commits
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Pawel Moll authored
hrtimer_start() will no longer defer already expired timers to the softirq in 4.2, and the __hrtimer_start_range_ns() function is getting removed, causing build errors when both the tip tree and the arm-ccn changes are merged. This changes the code back to using hrtimer_start, which will do the right thing after this branch gets merged with the timers update from tip. As pointed out after a discussion on the mailing list, the result will not be worse than the what was there before you pulled my updates, as the code was using normal hrtimer_start(). It's just when I realised that it should be pinned I looked at what x86 uncore pmu is doing and shamelessly (and probably a bit mindlessly) copied the "do not wakeup" version from there. [arnd: update commit message] Reported-by: Mark Brown <mark.brown@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Merge "ARM: tegra: Add EMC driver for v4.2-rc1" from Thierry Reding: This introduces the EMC driver that's required to scale the external memory frequency. * tag 'tegra-for-4.2-emc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Add EMC frequency debugfs entry memory: tegra: Add EMC (external memory controller) driver memory: tegra: Add API needed by the EMC driver of: Add Tegra124 EMC bindings of: Document timings subnode of nvidia,tegra-mc
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Arnd Bergmann authored
Merge tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Merge "ARM: tegra: RAM code access for v4.2-rc1" from Thierry Reding: The RAM code is used by the memory and external memory controllers to determine which set of timings to use for memory frequency scaling. * tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: fuse: Add RAM code reader helper of: Document long-ram-code property in nvidia,tegra20-apbmisc
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Arnd Bergmann authored
Merge tag 'tegra-for-4.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Merge "ARM: tegra: Memory controller updates for v4.2-rc1" from Thierry Reding: Adds support for Tegra132 (which is mostly the same as for Tegra124, except for cache maintenance). debugfs support is also introduced for the SMMU part of the memory controller, which allows users to inspect the translation state for SWGROUPs and memory clients. * tag 'tegra-for-4.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Disable ARBITRATION_EMEM interrupt memory: tegra: Add Tegra132 support iommu/tegra-smmu: Add debugfs support memory: tegra: Add SWGROUP names
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- 12 May, 2015 2 commits
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git://git.linaro.org/people/pawel.moll/linuxArnd Bergmann authored
Pull "Set of ARM CCN PMU driver updates" from Pawel Moll: - fixed a nasty bitfield mangling bug - added new hints to the perf userspace tool - pinned events processing to a single PMU - modified events initialisation so they can be rotated now * tag 'ccn/updates-for-4.2' of git://git.linaro.org/people/pawel.moll/linux: bus: arm-ccn: Allocate event when it is being added, not initialised bus: arm-ccn: Do not group CCN events with other PMUs bus: arm-ccn: Provide required event arguments bus: arm-ccn: cpumask attribute bus: arm-ccn: Fix node->XP config conversion
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Arnd Bergmann authored
Merge tag 'simple-mfd' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers Merge "Simple MFD base patches and cleanups" from Linus Walleij: - Document MFD DT bindings - Instantiate subdevices for simple MFDs - Switch Integrator and RealView to use the simple MFD - Augment LED driver to probe from platform device - Add LEDs to Juno Vexpress64 * tag 'simple-mfd' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: arm64: add LEDs and some trigger support to defconfig arm64: juno: Add APB registers and LEDs using syscon leds: syscon: instantiate from platform device ARM: dts: update syscons to use simple-mfd MFD/OF: document MFD devices and handle simple-mfd
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- 11 May, 2015 5 commits
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Linus Walleij authored
Since many boards for ARM, experimental or server alike, will feature LEDs, let's include LED class and trigger support for heartbeat and CPU in the defconfig. Many systems (such as the ARM Juno) will use a system controller "syscon" to access the LED registers, so include support for this as well. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Liviu Dudau <Liviu.Dudau@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This defines the Juno "APB system registers" as a syscon device, and all the LEDs controlled by the APB system registers right below it using the syscon LEDs driver on top of syscon. Define LED0 for heartbeat, LED1 for MMC0 activity and the following four LEDs indicating CPU activity using the Linux-specific DT bindings for triggers. This is the pattern and same drivers as used on the legacy platform device trees for the ARM Integrators and the RealView PB1176. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Tested-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Currently syscon LEDs will traverse the device tree looking for syscon devices and if found, traverse any subnodes of these to identify matching children and from there instantiate LED class devices. This is not a good use of the Linux device model. Instead we have converted the device trees to add the "simple-mfd" property to the MFD nexi spawning syscon LEDs so that these will appear as platform devices in the system and we can use the proper device probing mechanism. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Lee Jones <lee.jones@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The Integrators and the RealView use simple MFD devices with register bit LEDs as subnodes, update these to use the "simple-mfd" compatible property so that subdevices get spawned from the MFD nexi. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Lee Jones <lee.jones@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This defines a new compatible option for MFD devices "simple-mfd" that will make the OF core spawn child devices for all subnodes of that MFD device. It is optional but handy for things like syscon and possibly other simpler MFD devices. Since there was no file to put the documentation in, I took this opportunity to make a small writeup on MFD devices and add the compatible definition there. Suggested-by: Lee Jones <lee.jones@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Devicetree <devicetree@vger.kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 10 May, 2015 2 commits
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Linus Torvalds authored
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fixes from Dave Airlie: "I really need to get back to sending these on my Friday, instead of my Monday morning, but nothing too amazing in here: a few amdkfd fixes, a few radeon fixes, i915 fixes, one tegra fix and one core fix" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm: Zero out invalid vblank timestamp in drm_update_vblank_count. drm/tegra: Don't use vblank_disable_immediate on incapable driver. drm/radeon: stop trying to suspend UVD sessions drm/radeon: more strictly validate the UVD codec drm/radeon: make UVD handle checking more strict drm/radeon: make VCE handle check more strict drm/radeon: fix userptr lockup drm/radeon: fix userptr BO unpin bug v3 drm/amdkfd: Initialize sdma vm when creating sdma queue drm/amdkfd: Don't report local memory size drm/amdkfd: allow unregister process with queues drm/i915: Drop PIPE-A quirk for 945GSE HP Mini drm/i915: Sink rate read should be saved in deca-kHz drm/i915/dp: there is no audio on port A drm/i915: Add missing MacBook Pro models with dual channel LVDS drm/i915: Assume dual channel LVDS if pixel clock necessitates it drm/radeon: don't setup audio on asics that don't support it drm/radeon: disable semaphores for UVD V1 (v2)
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