- 24 Feb, 2016 40 commits
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Raghava Aditya Renukunta authored
During EEH recovery number of online CPU's might change thereby changing the number of MSIx vectors. Since each fib is allocated to a vector, changes in the number of vectors causes fib to be sent thru invalid vectors.In addition the correct number of MSIx vectors is not updated in the INIT struct sent to the controller, when it is reinitialized. Fixed by reassigning vectors to fibs based on the updated number of MSIx vectors and updating the INIT structure before sending to controller. Fixes: MSI-X vector calculation for suspend/resume Cc: stable@vger.kernel.org Signed-off-by:
Raghava Aditya Renukunta <raghavaaditya.renukunta@pmcs.com> Reviewed-by:
Shane Seymour <shane.seymour@hpe.com> Reviewed-by:
Johannes Thumshirn <jthushirn@suse.de> Signed-off-by:
Martin K. Petersen <martin.petersen@oracle.com>
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Raghava Aditya Renukunta authored
aac_fib_map_free() calls pci_free_consistent() without checking that dev->hw_fib_va is not NULL and dev->max_fib_size is not zero.If they are indeed NULL/0, this will result in a hang as pci_free_consistent() will attempt to invalidate cache for the entire 64-bit address space (which would take a very long time). Fixed by adding a check to make sure that dev->hw_fib_va and dev->max_fib_size are not NULL and 0 respectively. Fixes: 9ad5204d - "[SCSI]aacraid: incorrect dma mapping mask during blinked recover or user initiated reset" Cc: stable@vger.kernel.org Signed-off-by:
Johannes Thumshirn <jthumshirn@suse.de> Reviewed-by:
Tomas Henzl <thenzl@redhat.com> Signed-off-by:
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Raghava Aditya Renukunta authored
Added support for PCI EEH (extended error handling). Signed-off-by:
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Raghava Aditya Renukunta authored
The driver utilizes an array of atomic variables to keep track of IO submissions to each vector. To submit an IO multiple threads iterate through the array to find a vector which has empty slots to send an IO. The reading and updating of the variable is not atomic, causing race conditions when a thread uses a full vector to submit an IO. Fixed by mapping each FIB to a vector, the submission path then uses said vector to submit IO thereby removing the possibly of a race condition.The vector assignment is started from 1 since vector 0 is reserved for the use of AIF management FIBS.If the number of MSIx vectors is 1 (MSI or INTx mode) then all the fibs are allocated to vector 0. Fixes: 495c0217 "aacraid: MSI-x support" Cc: stable@vger.kernel.org # v4.1 Signed-off-by:
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Raghava Aditya Renukunta authored
The method to allocate and free FIB's in the present code utilizes spinlocks. Multiple IO's have to wait on the spinlock to acquire or free fibs creating a performance bottleneck. An alternative solution would be to use block layer tags to keep track of the fibs allocated and freed. To this end aac_fib_alloc_tag was created to utilize the blk layer tags to plug into the Fib pool.These functions are used exclusively in the IO path. 8 fibs are reserved for the use of AIF management software and utilize the previous spinlock based implementations. Signed-off-by:
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John Garry authored
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John Garry <john.garry@huawei.com> Reviewed-by:
Hannes Reinecke <hare@suse.de> Signed-off-by:
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
Include code to prep ssp frame and deliver to hardware. Signed-off-by:
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John Garry authored
Also include slot_complete_v2_hw handler Signed-off-by:
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John Garry authored
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John Garry authored
This also includes broadcast handler. Unlike v1 hw, broadcast does not have its own dedicated interrupt. Signed-off-by:
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
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John Garry authored
Add code to initialise the hardware. Support is also added to deal with the "am-max-transmissions" (amt) limitation in hip06 controller #1. This is how many connection requests we can send on the system bus before waiting for a response. Due to chip bus design, controller #1 is limited to 32 amt, while, by design, a controller supports 64. The default value for the nibbles in the relevant registers is 0x40; these need to be programmed with 0x20. Signed-off-by:
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John Garry authored
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John Garry authored
Just add enough to build and init the module. Signed-off-by:
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John Garry authored
Since hisi_sas_itct format is different between v1 and v2 hw, give more general names for some fields. Signed-off-by:
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John Garry authored
Since the error record structure is different for v2 hw, make hisi_sas_err_record opaque and add hisi_sas_err_record_v1. Signed-off-by:
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John Garry authored
Since v2 hw only supports 2048 itct entries, as opposed to 4096 for v1 hw, set the max itct entries to the lower of the two. It is not anticipated that any device with v1 will ever require to connect > 2048 devices. Signed-off-by:
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John Garry authored
Since v2 hardware permits different numbers of commands to v1, set this as configurable in hisi_sas_hw. Signed-off-by:
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John Garry authored
Relocate DEV_IS_EXPANDER to hisi_sas.h as it will be required for v2 hw support. Signed-off-by:
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John Garry authored
Add the dt bindings for HiSi SAS controller v2 HW. The main difference in the controller from dt perspective is interrupts. The v2 controller does not have dedicated fatal and broadcast interrupts - they are multiplexed on the channel interrupt. Each SAS v2 controller can issue upto 64 commands (or connection requests) on the system bus without waiting for a response - this is know as am-max-transmissions. In hip06, sas controller #1 has a limitation that it has to limit am-max-transmissions to 32 - this limitation is due to chip system bus design. It is not anticipated that any future chip incorporating v2 controller will have such a limitation. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Maurizio Lombardi authored
If the link is not ready, the bnx2fc_eh_abort() function should return FAILED. Signed-off-by:
Maurizio Lombardi <mlombard@redhat.com> Reviewed-by:
Ewan Milne <emilne@redhat.com> Acked-by:
Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by:
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Jose Castillo authored
This patch adds the information of the different values that can be used in the module parameter 'debug_logging', as it is shown below: $ modinfo bnx2fc [...] parm: debug_logging:Option to enable extended logging, Default is 0 - no logging. 0x01 - SCSI cmd error, cleanup. 0x02 - Session setup, cleanup, etc. 0x04 - lport events, link, mtu, etc. 0x08 - ELS logs. 0x10 - fcoe L2 fame related logs. 0xff - LOG all messages. (int) Signed-off-by:
Jose Castillo <jcastillo@redhat.com> Acked-by:
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Lee Duncan authored
Update the SCSI hosts module to use ida to manage its host_no index instead of an atomic integer. This means that the SCSI host number will now be reclaimable. Use the ida "simple" mechanism, since there should be no need for a separate spin lock current usage. Ida was chosen over idr because the hosts module already has its own instance and locking mechanisms that aren't easily changed. Reviewed-by:
Lee Duncan <lduncan@suse.com> Signed-off-by:
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Sumit Saxena authored
Signed-off-by:
Sumit Saxena <sumit.saxena@avagotech.com> Signed-off-by:
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Sumit Saxena authored
This patch fixes online controller resets on SRIOV-enabled series of Avago controllers. 1) Remove late detection heartbeat. 2) Change in the behavior if the FW found in READY/OPERATIONAL state. Signed-off-by:
Uday Lingala <uday.lingala@avagotech.com> Signed-off-by:
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Sumit Saxena authored
This patch will introduce module-parameter for SCSI command timeout value and fix setting of resetwaittime beyond a value. Signed-off-by:
Kashyap Desai <kashyap.desai@avagotech.com> Signed-off-by:
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Sumit Saxena authored
Optimized MFI adapters' OCR path, particularly megasas_wait_for_outstanding() function. Signed-off-by:
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Sumit Saxena authored
Make instance->adprecovery variable atomic and removes hba_lock spinlock while accessing instance->adprecovery. Signed-off-by:
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Sumit Saxena authored
This patch will add capability in driver to tell firmware that it can throttle IOs in case controller's queue depth is downgraded post OFU (online firmware upgrade). This feature will ensure firmware can be downgraded from higher queue depth to lower queue depth without needing system reboot. Added throttling code in IO path of driver, in case OS tries to send more IOs than post OFU firmware's queue depth. Signed-off-by:
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Sumit Saxena authored
1. For iMR controllers, firmware will report two queue depths: - Controller-wide queue depth - LDIO queue depth (240) Controller-wide queue depth will be greater among the two. Using this new feature, iMR can provide larger Queue depth(QD) for JBOD and limited QD for Virtual Disk(VD). 2. megaraid_sas driver will throttle read/write LDIOs based on "LDIO Queue Depth". 3. Dual queue depth can be enabled/disabled via module parameter. It is enabled by default if the firmware supports it. Only specific firmware builds will enable the feature. 4. Added sysfs parameter "ldio_outstanding" which permits querying the number of outstanding LDIO requests at runtime. Signed-off-by:
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Sumit Saxena authored
build_and_issue_cmd should return SCSI_MLQUEUE_HOST_BUSY for a few error cases instead of returning 1. Signed-off-by:
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Sumit Saxena authored
This patch will create a reply queue pool for each MSI-X index and will provide an array of base addresses instead of the single address of legacy mode. Using this new interface the driver can support higher queue depths through scattered DMA pools. If array mode is not supported driver will fall back to the legacy method of reply pool allocation. This limits controller queue depth to 1K max. To enable a queue depth of more than 1K driver requires firmware to support array mode and scratch_pad3 will provide the new queue depth value. When RDPQ is used, downgrading to an older firmware release should not be permitted. This may cause firmware fault and is not supported. Signed-off-by:
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