The SHDCI controller on Aries devices is a little bit peculiar about
the clocks and with a slightly off clock can run into errors such as:

    mmc2: ADMA error: 0x02000000
    mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
    mmc2: sdhci: Sys addr: 0x347e4cc4 | Version: 0x00002401
    mmc2: sdhci: Blk size: 0x00007004 | Blk cnt: 0x0000fffc
    mmc2: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
    mmc2: sdhci: Present: 0x01fa0000 | Host ctl: 0x00000012
    mmc2: sdhci: Power: 0x00000000 | Blk gap: 0x00000000
    mmc2: sdhci: Wake-up: 0x00000000 | Clock: 0x0000010f
    mmc2: sdhci: Timeout: 0x0000000a | Int stat: 0x00000003
    mmc2: sdhci: Int enab: 0x03ff004b | Sig enab: 0x03ff004b
    mmc2: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000001
    mmc2: sdhci: Caps: 0x05e80080 | Caps_1: 0x00000000
    mmc2: sdhci: Cmd: 0x0000163a | Max curr: 0x00000000
    mmc2: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x00000000
    mmc2: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
    mmc2: sdhci: Host ctl2: 0x00000000
    mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x349a3208
    mmc2: sdhci: ============================================
    mmc2: sdhci: 349a3200: DMA 0x347e4cc0, LEN 0x0004, Attr=0x23

Specifically assign the MMC sclks to be parented from MPLL with specific
rates that match the vendor kernel.
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>