Commit f99c6bb6 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (35 commits)
  sh: rts7751r2d board updates.
  sh: Kill off dead bigsur and ec3104 boards.
  sh: Fixup r7780rp pata_platform for devres conversion.
  sh: Revert TLB miss fast-path changes that broke PTEA parts.
  sh: Compile fix for heartbeat consolidation.
  sh: heartbeat consolidation for banked LEDs.
  sh: define dma noncoherent API functions.
  sh: Missing flush_dcache_all() proto in cacheflush.h.
  sh: Kill dead/unused ISA code from __ioremap().
  sh: Add cpu-features header to asm/Kbuild.
  sh: Move __KERNEL__ up in asm/page.h.
  sh: Fix syscall numbering breakage.
  sh: dcache write-back for R7780RP PIO.
  sh: Switch to local TLB flush variants in additional callsites.
  sh: Local TLB flushing variants for SMP prep.
  sh: Fixup cpu_data references for the non-boot CPUs.
  sh: Use a per-cpu ASID cache.
  sh: add SH_CLK_MD Kconfig default.
  sh: Fixup SHMIN INTC register definitions.
  sh: SH-DMAC compile fixes
  ...
parents e0a04cff 9c57548f
......@@ -135,12 +135,6 @@ config SH_HP6XX
More information (hardware only) at
<http://www.hp.com/jornada/>.
config SH_EC3104
bool "EC3104"
help
Select EC3104 if configuring for a system with an Eclipse
International EC3104 chip, e.g. the Harris AD2000.
config SH_SATURN
bool "Saturn"
select CPU_SUBTYPE_SH7604
......@@ -156,9 +150,6 @@ config SH_DREAMCAST
<http://www.m17n.org/linux-sh/dreamcast/>. There is a
Dreamcast project is at <http://linuxdc.sourceforge.net/>.
config SH_BIGSUR
bool "BigSur"
config SH_MPC1211
bool "Interface MPC1211"
help
......@@ -481,6 +472,7 @@ config SH_PCLK_FREQ
config SH_CLK_MD
int "CPU Mode Pin Setting"
default 0
depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206
help
MD2 - MD0 pin setting.
......@@ -510,8 +502,9 @@ source "arch/sh/cchips/Kconfig"
config HEARTBEAT
bool "Heartbeat LED"
depends on SH_MPC1211 || SH_SH03 || \
SH_BIGSUR || SOLUTION_ENGINE || \
SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
SOLUTION_ENGINE || \
SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \
SH_R7780RP
help
Use the power-on LED on your machine as a load meter. The exact
behavior is platform-dependent, but normally the flash frequency is
......@@ -596,6 +589,8 @@ menu "Boot options"
config ZERO_PAGE_OFFSET
hex "Zero page offset"
default "0x00004000" if SH_MPC1211 || SH_SH03
default "0x00010000" if PAGE_SIZE_64KB
default "0x00002000" if PAGE_SIZE_8KB
default "0x00001000"
help
This sets the default offset of zero page.
......
......@@ -35,6 +35,7 @@ endif
endif
cflags-$(CONFIG_CPU_SH2) := -m2
cflags-$(CONFIG_CPU_SH2A) := -m2a $(call cc-option,-m2a-nofpu,)
cflags-$(CONFIG_CPU_SH3) := -m3
cflags-$(CONFIG_CPU_SH4) := -m4 \
$(call cc-option,-mno-implicit-fp,-m4-nofpu)
......@@ -93,10 +94,8 @@ machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
machdir-$(CONFIG_SH_HP6XX) := hp6xx
machdir-$(CONFIG_SH_EC3104) := ec3104
machdir-$(CONFIG_SH_SATURN) := saturn
machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
machdir-$(CONFIG_SH_BIGSUR) := bigsur
machdir-$(CONFIG_SH_MPC1211) := mpc1211
machdir-$(CONFIG_SH_SH03) := sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
......
#
# Makefile for the BigSur specific parts of the kernel
#
obj-y := setup.o io.o irq.o led.o
/*
* arch/sh/boards/bigsur/io.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
* Derived from io_hd64465.h, which bore the message:
* By Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc.
* and from io_hd64461.h, which bore the message:
* Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* IO functions for a Hitachi Big Sur Evaluation Board.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/bigsur/bigsur.h>
/* Low iomap maps port 0-1K to addresses in 8byte chunks */
#define BIGSUR_IOMAP_LO_THRESH 0x400
#define BIGSUR_IOMAP_LO_SHIFT 3
#define BIGSUR_IOMAP_LO_MASK ((1<<BIGSUR_IOMAP_LO_SHIFT)-1)
#define BIGSUR_IOMAP_LO_NMAP (BIGSUR_IOMAP_LO_THRESH>>BIGSUR_IOMAP_LO_SHIFT)
static u32 bigsur_iomap_lo[BIGSUR_IOMAP_LO_NMAP];
static u8 bigsur_iomap_lo_shift[BIGSUR_IOMAP_LO_NMAP];
/* High iomap maps port 1K-64K to addresses in 1K chunks */
#define BIGSUR_IOMAP_HI_THRESH 0x10000
#define BIGSUR_IOMAP_HI_SHIFT 10
#define BIGSUR_IOMAP_HI_MASK ((1<<BIGSUR_IOMAP_HI_SHIFT)-1)
#define BIGSUR_IOMAP_HI_NMAP (BIGSUR_IOMAP_HI_THRESH>>BIGSUR_IOMAP_HI_SHIFT)
static u32 bigsur_iomap_hi[BIGSUR_IOMAP_HI_NMAP];
static u8 bigsur_iomap_hi_shift[BIGSUR_IOMAP_HI_NMAP];
void bigsur_port_map(u32 baseport, u32 nports, u32 addr, u8 shift)
{
u32 port, endport = baseport + nports;
pr_debug("bigsur_port_map(base=0x%0x, n=0x%0x, addr=0x%08x)\n",
baseport, nports, addr);
for (port = baseport ;
port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
pr_debug(" maplo[0x%x] = 0x%08x\n", port, addr);
bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = addr;
bigsur_iomap_lo_shift[port>>BIGSUR_IOMAP_LO_SHIFT] = shift;
addr += (1<<(BIGSUR_IOMAP_LO_SHIFT));
}
for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
pr_debug(" maphi[0x%x] = 0x%08x\n", port, addr);
bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = addr;
bigsur_iomap_hi_shift[port>>BIGSUR_IOMAP_HI_SHIFT] = shift;
addr += (1<<(BIGSUR_IOMAP_HI_SHIFT));
}
}
EXPORT_SYMBOL(bigsur_port_map);
void bigsur_port_unmap(u32 baseport, u32 nports)
{
u32 port, endport = baseport + nports;
pr_debug("bigsur_port_unmap(base=0x%0x, n=0x%0x)\n", baseport, nports);
for (port = baseport ;
port < endport && port < BIGSUR_IOMAP_LO_THRESH ;
port += (1<<BIGSUR_IOMAP_LO_SHIFT)) {
bigsur_iomap_lo[port>>BIGSUR_IOMAP_LO_SHIFT] = 0;
}
for (port = max_t(u32, baseport, BIGSUR_IOMAP_LO_THRESH);
port < endport && port < BIGSUR_IOMAP_HI_THRESH ;
port += (1<<BIGSUR_IOMAP_HI_SHIFT)) {
bigsur_iomap_hi[port>>BIGSUR_IOMAP_HI_SHIFT] = 0;
}
}
EXPORT_SYMBOL(bigsur_port_unmap);
unsigned long bigsur_isa_port2addr(unsigned long port)
{
unsigned long addr = 0;
unsigned char shift;
/* Physical address not in P0, do nothing */
if (PXSEG(port)) {
addr = port;
/* physical address in P0, map to P2 */
} else if (port >= 0x30000) {
addr = P2SEGADDR(port);
/* Big Sur I/O + HD64465 registers 0x10000-0x30000 */
} else if (port >= BIGSUR_IOMAP_HI_THRESH) {
addr = BIGSUR_INTERNAL_BASE + (port - BIGSUR_IOMAP_HI_THRESH);
/* Handle remapping of high IO/PCI IO ports */
} else if (port >= BIGSUR_IOMAP_LO_THRESH) {
addr = bigsur_iomap_hi[port >> BIGSUR_IOMAP_HI_SHIFT];
shift = bigsur_iomap_hi_shift[port >> BIGSUR_IOMAP_HI_SHIFT];
if (addr != 0)
addr += (port & BIGSUR_IOMAP_HI_MASK) << shift;
} else {
/* Handle remapping of low IO ports */
addr = bigsur_iomap_lo[port >> BIGSUR_IOMAP_LO_SHIFT];
shift = bigsur_iomap_lo_shift[port >> BIGSUR_IOMAP_LO_SHIFT];
if (addr != 0)
addr += (port & BIGSUR_IOMAP_LO_MASK) << shift;
}
pr_debug("%s(0x%08lx) = 0x%08lx\n", __FUNCTION__, port, addr);
return addr;
}
This diff is collapsed.
/*
* linux/arch/sh/boards/bigsur/led.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
* Derived from led_se.c and led.c, which bore the message:
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Big Sur specific LED code.
*/
#include <asm/io.h>
#include <asm/bigsur/bigsur.h>
static void mach_led(int position, int value)
{
int word;
word = bigsur_inl(BIGSUR_CSLR);
if (value) {
bigsur_outl(word & ~BIGSUR_LED, BIGSUR_CSLR);
} else {
bigsur_outl(word | BIGSUR_LED, BIGSUR_CSLR);
}
}
#ifdef CONFIG_HEARTBEAT
#include <linux/sched.h>
/* Cycle the LED on/off */
void heartbeat_bigsur(void)
{
static unsigned cnt = 0, period = 0, dist = 0;
if (cnt == 0 || cnt == dist)
mach_led( -1, 1);
else if (cnt == 7 || cnt == dist+7)
mach_led( -1, 0);
if (++cnt > period) {
cnt = 0;
/* The hyperbolic function below modifies the heartbeat period
* length in dependency of the current (5min) load. It goes
* through the points f(0)=126, f(1)=86, f(5)=51,
* f(inf)->30. */
period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
dist = period / 4;
}
}
#endif /* CONFIG_HEARTBEAT */
/*
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
*
* Setup and IRQ handling code for the HD64465 companion chip.
* by Greg Banks <gbanks@pocketpenguins.com>
* Copyright (c) 2000 PocketPenguins Inc
*
* Derived from setup_hd64465.c which bore the message:
* Greg Banks <gbanks@pocketpenguins.com>
* Copyright (c) 2000 PocketPenguins Inc and
* Copyright (C) 2000 YAEGASHI Takeshi
* and setup_cqreek.c which bore message:
* Copyright (C) 2000 Niibe Yutaka
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Setup functions for a Hitachi Big Sur Evaluation Board.
*
*/
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/bitops.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/machvec.h>
#include <asm/bigsur/io.h>
#include <asm/hd64465/hd64465.h>
#include <asm/bigsur/bigsur.h>
/*===========================================================*/
// Big Sur Init Routines
/*===========================================================*/
static void __init bigsur_setup(char **cmdline_p)
{
/* Mask all 2nd level IRQ's */
outb(-1,BIGSUR_IMR0);
outb(-1,BIGSUR_IMR1);
outb(-1,BIGSUR_IMR2);
outb(-1,BIGSUR_IMR3);
/* Mask 1st level interrupts */
outb(-1,BIGSUR_IRLMR0);
outb(-1,BIGSUR_IRLMR1);
#if defined (CONFIG_HD64465) && defined (CONFIG_SERIAL)
/* remap IO ports for first ISA serial port to HD64465 UART */
bigsur_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
#endif /* CONFIG_HD64465 && CONFIG_SERIAL */
/* TODO: setup IDE registers */
bigsur_port_map(BIGSUR_IDECTL_IOPORT, 2, BIGSUR_ICTL, 8);
/* Setup the Ethernet port to BIGSUR_ETHER_IOPORT */
bigsur_port_map(BIGSUR_ETHER_IOPORT, 16, BIGSUR_ETHR+BIGSUR_ETHER_IOPORT, 0);
/* set page to 1 */
outw(1, BIGSUR_ETHR+0xe);
/* set the IO port to BIGSUR_ETHER_IOPORT */
outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
}
/*
* The Machine Vector
*/
extern void heartbeat_bigsur(void);
extern void init_bigsur_IRQ(void);
struct sh_machine_vector mv_bigsur __initmv = {
.mv_name = "Big Sur",
.mv_setup = bigsur_setup,
.mv_isa_port2addr = bigsur_isa_port2addr,
.mv_irq_demux = bigsur_irq_demux,
.mv_init_irq = init_bigsur_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_bigsur,
#endif
};
ALIAS_MV(bigsur)
#
# Makefile for the EC3104 specific parts of the kernel
#
obj-y := setup.o io.o irq.o
/*
* linux/arch/sh/boards/ec3104/io.c
* EC3104 companion chip support
*
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
*
*/
/* EC3104 note:
* This code was written without any documentation about the EC3104 chip. While
* I hope I got most of the basic functionality right, the register names I use
* are most likely completely different from those in the chip documentation.
*
* If you have any further information about the EC3104, please tell me
* (prumpf@tux.org).
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/ec3104/ec3104.h>
/*
* EC3104 has a real ISA bus which we redirect low port accesses to (the
* actual device on mine is a ESS 1868, and I don't want to hack the driver
* more than strictly necessary). I am not going to duplicate the
* hard coding of PC addresses (for the 16550s aso) here though; it's just
* too ugly.
*/
#define low_port(port) ((port) < 0x10000)
static inline unsigned long port2addr(unsigned long port)
{
switch(port >> 16) {
case 0:
return EC3104_ISA_BASE + port * 2;
/* XXX hack. it's unclear what to do about the serial ports */
case 1:
return EC3104_BASE + (port&0xffff) * 4;
default:
/* XXX PCMCIA */
return 0;
}
}
unsigned char ec3104_inb(unsigned long port)
{
u8 ret;
ret = *(volatile u8 *)port2addr(port);
return ret;
}
unsigned short ec3104_inw(unsigned long port)
{
BUG();
}
unsigned long ec3104_inl(unsigned long port)
{
BUG();
}
void ec3104_outb(unsigned char data, unsigned long port)
{
*(volatile u8 *)port2addr(port) = data;
}
void ec3104_outw(unsigned short data, unsigned long port)
{
BUG();
}
void ec3104_outl(unsigned long data, unsigned long port)
{
BUG();
}
/*
* linux/arch/sh/boards/ec3104/irq.c
* EC3104 companion chip support
*
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
*
*/
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/ec3104/ec3104.h>
/* This is for debugging mostly; here's the table that I intend to keep
* in here:
*
* index function base addr power interrupt bit
* 0 power b0ec0000 --- 00000001 (unused)
* 1 irqs b0ec1000 --- 00000002 (unused)
* 2 ?? b0ec2000 b0ec0008 00000004
* 3 PS2 (1) b0ec3000 b0ec000c 00000008
* 4 PS2 (2) b0ec4000 b0ec0010 00000010
* 5 ?? b0ec5000 b0ec0014 00000020
* 6 I2C b0ec6000 b0ec0018 00000040
* 7 serial (1) b0ec7000 b0ec001c 00000080
* 8 serial (2) b0ec8000 b0ec0020 00000100
* 9 serial (3) b0ec9000 b0ec0024 00000200
* 10 serial (4) b0eca000 b0ec0028 00000400
* 12 GPIO (1) b0ecc000 b0ec0030
* 13 GPIO (2) b0ecc000 b0ec0030
* 16 pcmcia (1) b0ed0000 b0ec0040 00010000
* 17 pcmcia (2) b0ed1000 b0ec0044 00020000
*/
/* I used the register names from another interrupt controller I worked with,
* since it seems to be identical to the ec3104 except that all bits are
* inverted:
*
* IRR: Interrupt Request Register (pending and enabled interrupts)
* IMR: Interrupt Mask Register (which interrupts are enabled)
* IPR: Interrupt Pending Register (pending interrupts, even disabled ones)
*
* 0 bits mean pending or enabled, 1 bits mean not pending or disabled. all
* IRQs seem to be level-triggered.
*/
#define EC3104_IRR (EC3104_BASE + 0x1000)
#define EC3104_IMR (EC3104_BASE + 0x1004)
#define EC3104_IPR (EC3104_BASE + 0x1008)
#define ctrl_readl(addr) (*(volatile u32 *)(addr))
#define ctrl_writel(data,addr) (*(volatile u32 *)(addr) = (data))
#define ctrl_readb(addr) (*(volatile u8 *)(addr))
static char *ec3104_name(unsigned index)
{
switch(index) {
case 0:
return "power management";
case 1:
return "interrupts";
case 3:
return "PS2 (1)";
case 4:
return "PS2 (2)";
case 5:
return "I2C (1)";
case 6:
return "I2C (2)";
case 7:
return "serial (1)";
case 8:
return "serial (2)";
case 9:
return "serial (3)";
case 10:
return "serial (4)";
case 16:
return "pcmcia (1)";
case 17:
return "pcmcia (2)";
default: {
static char buf[32];
sprintf(buf, "unknown (%d)", index);
return buf;
}
}
}
int get_pending_interrupts(char *buf)
{
u32 ipr;
u32 bit;
char *p = buf;
p += sprintf(p, "pending: (");
ipr = ctrl_inl(EC3104_IPR);
for (bit = 1; bit < 32; bit++)
if (!(ipr & (1<<bit)))
p += sprintf(p, "%s ", ec3104_name(bit));
p += sprintf(p, ")\n");
return p - buf;
}
static inline u32 ec3104_irq2mask(unsigned int irq)
{
return (1 << (irq - EC3104_IRQBASE));
}
static inline void mask_ec3104_irq(unsigned int irq)
{
u32 mask;
mask = ctrl_readl(EC3104_IMR);
mask |= ec3104_irq2mask(irq);
ctrl_writel(mask, EC3104_IMR);
}
static inline void unmask_ec3104_irq(unsigned int irq)
{
u32 mask;
mask = ctrl_readl(EC3104_IMR);
mask &= ~ec3104_irq2mask(irq);
ctrl_writel(mask, EC3104_IMR);
}
static void disable_ec3104_irq(unsigned int irq)
{
mask_ec3104_irq(irq);
}
static void enable_ec3104_irq(unsigned int irq)
{
unmask_ec3104_irq(irq);
}
static void mask_and_ack_ec3104_irq(unsigned int irq)
{
mask_ec3104_irq(irq);
}
static void end_ec3104_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
unmask_ec3104_irq(irq);
}
static unsigned int startup_ec3104_irq(unsigned int irq)
{
unmask_ec3104_irq(irq);
return 0;
}
static void shutdown_ec3104_irq(unsigned int irq)
{
mask_ec3104_irq(irq);
}
static struct hw_interrupt_type ec3104_int = {
.typename = "EC3104",
.enable = enable_ec3104_irq,
.disable = disable_ec3104_irq,
.ack = mask_and_ack_ec3104_irq,
.end = end_ec3104_irq,
.startup = startup_ec3104_irq,
.shutdown = shutdown_ec3104_irq,
};
/* Yuck. the _demux API is ugly */
int ec3104_irq_demux(int irq)
{
if (irq == EC3104_IRQ) {
unsigned int mask;
mask = ctrl_readl(EC3104_IRR);
if (mask == 0xffffffff)
return EC3104_IRQ;
else
return EC3104_IRQBASE + ffz(mask);
}
return irq;
}
/*
* linux/arch/sh/boards/ec3104/setup.c
* EC3104 companion chip support
*
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
*
*/
/* EC3104 note:
* This code was written without any documentation about the EC3104 chip. While
* I hope I got most of the basic functionality right, the register names I use
* are most likely completely different from those in the chip documentation.
*
* If you have any further information about the EC3104, please tell me
* (prumpf@tux.org).
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/types.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/machvec.h>
#include <asm/mach/ec3104.h>
static void __init ec3104_setup(char **cmdline_p)
{
char str[8];
int i;
for (i=0; i<8; i++)
str[i] = ctrl_readb(EC3104_BASE + i);
for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
irq_desc[i].handler = &ec3104_int;
printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
/* mask all interrupts. this should have been done by the boot
* loader for us but we want to be sure ... */
ctrl_writel(0xffffffff, EC3104_IMR);
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_ec3104 __initmv = {
.mv_name = "EC3104",
.mv_setup = ec3104_setup,
.mv_nr_irqs = 96,
.mv_inb = ec3104_inb,
.mv_inw = ec3104_inw,
.mv_inl = ec3104_inl,
.mv_outb = ec3104_outb,
.mv_outw = ec3104_outw,
.mv_outl = ec3104_outl,
.mv_irq_demux = ec3104_irq_demux,
};
ALIAS_MV(ec3104)
......@@ -2,7 +2,7 @@
# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
#
obj-y := setup.o rtc.o led.o
obj-y := setup.o rtc.o
obj-$(CONFIG_PCI) += pci.o
/*
* linux/arch/sh/boards/mpc1211/led.c
*
* Copyright (C) 2001 Saito.K & Jeanne
*
* This file contains Interface MPC-1211 specific LED code.
*/
static void mach_led(int position, int value)
{
volatile unsigned char* p = (volatile unsigned char*)0xa2000000;
if (value) {
*p |= 1;
} else {
*p &= ~1;
}
}
#ifdef CONFIG_HEARTBEAT
#include <linux/sched.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_mpc1211(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned char* p = (volatile unsigned char*)0xa2000000;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if (up) {
if (bit == 7) {
bit--;
up=0;
} else {
bit ++;
}
} else {
if (bit == 0) {
bit++;
up=1;
} else {
bit--;
}
}
*p = 1<<bit;
}
#endif /* CONFIG_HEARTBEAT */
......@@ -10,6 +10,7 @@
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/machvec.h>
#include <asm/mpc1211/mpc1211.h>
......@@ -281,6 +282,32 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no)
return 0;
}
static struct resource heartbeat_resources[] = {
[0] = {
.start = 0xa2000000,
.end = 0xa2000000 + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *mpc1211_devices[] __initdata = {
&heartbeat_device,
};
static int __init mpc1211_devices_setup(void)
{
return platform_add_devices(mpc1211_devices,
ARRAY_SIZE(mpc1211_devices));
}
__initcall(mpc1211_devices_setup);
/* arch/sh/boards/mpc1211/rtc.c */
void mpc1211_time_init(void);
......@@ -317,9 +344,5 @@ struct sh_machine_vector mv_mpc1211 __initmv = {
.mv_nr_irqs = 48,
.mv_irq_demux = mpc1211_irq_demux,
.mv_init_irq = init_mpc1211_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_mpc1211,
#endif
};
ALIAS_MV(mpc1211)
......@@ -4,5 +4,4 @@
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
obj-$(CONFIG_PUSH_SWITCH) += psw.o
......@@ -11,22 +11,9 @@
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#include <asm/addrspace.h>
#include <asm/io.h>
static inline unsigned long port2adr(unsigned int port)
{
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
if (port == 0x3f6)
return (PA_AREA5_IO + 0x80c);
else
return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
else
maybebadio((unsigned long)port);
return port;
}
static inline unsigned long port88796l(unsigned int port, int flag)
{
......@@ -40,18 +27,6 @@ static inline unsigned long port88796l(unsigned int port, int flag)
return addr;
}
/* The 7780 R7780RP-1 seems to have everything hooked */
/* up pretty normally (nothing on high-bytes only...) so this */
/* shouldn't be needed */
static inline int shifted_port(unsigned long port)
{
/* For IDE registers, value is not shifted */
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
return 0;
else
return 1;
}
#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
#define CHECK_AX88796L_PORT(port) \
((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
......@@ -70,12 +45,10 @@ u8 r7780rp_inb(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
return ctrl_inw(port88796l(port, 0)) & 0xff;
else if (PXSEG(port))
return ctrl_inb(port);
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
return ctrl_inb(pci_ioaddr(port));
return ctrl_inw(port2adr(port)) & 0xff;
return ctrl_inw(port) & 0xff;
}
u8 r7780rp_inb_p(unsigned long port)
......@@ -84,12 +57,10 @@ u8 r7780rp_inb_p(unsigned long port)
if (CHECK_AX88796L_PORT(port))
v = ctrl_inw(port88796l(port, 0)) & 0xff;
else if (PXSEG(port))
v = ctrl_inb(port);
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
v = ctrl_inb(pci_ioaddr(port));
else
v = ctrl_inw(port2adr(port)) & 0xff;
v = ctrl_inw(port) & 0xff;
ctrl_delay();
......@@ -98,80 +69,56 @@ u8 r7780rp_inb_p(unsigned long port)
u16 r7780rp_inw(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
return ctrl_inw(port);
else if (is_pci_ioaddr(port) || shifted_port(port))
if (is_pci_ioaddr(port))
return ctrl_inw(pci_ioaddr(port));
else
maybebadio(port);
return 0;
return ctrl_inw(port);
}
u32 r7780rp_inl(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
return ctrl_inl(port);
else if (is_pci_ioaddr(port) || shifted_port(port))
if (is_pci_ioaddr(port))
return ctrl_inl(pci_ioaddr(port));
else
maybebadio(port);
return 0;
return ctrl_inl(port);
}
void r7780rp_outb(u8 value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
ctrl_outw(value, port88796l(port, 0));
else if (PXSEG(port))
ctrl_outb(value, port);
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
ctrl_outb(value, port);
}
void r7780rp_outb_p(u8 value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
ctrl_outw(value, port88796l(port, 0));
else if (PXSEG(port))
ctrl_outb(value, port);
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
ctrl_outb(value, port);
ctrl_delay();
}
void r7780rp_outw(u16 value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
ctrl_outw(value, port);
else if (is_pci_ioaddr(port) || shifted_port(port))
if (is_pci_ioaddr(port))
ctrl_outw(value, pci_ioaddr(port));
else
maybebadio(port);
ctrl_outw(value, port);
}
void r7780rp_outl(u32 value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
ctrl_outl(value, port);
else if (is_pci_ioaddr(port) || shifted_port(port))
if (is_pci_ioaddr(port))
ctrl_outl(value, pci_ioaddr(port));
else
maybebadio(port);
ctrl_outl(value, port);
}
void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
......@@ -183,16 +130,13 @@ void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
p = (volatile u16 *)port88796l(port, 0);
while (count--)
*buf++ = *p & 0xff;
} else if (PXSEG(port)) {
while (count--)
*buf++ = *(volatile u8 *)port;
} else if (is_pci_ioaddr(port) || shifted_port(port)) {
} else if (is_pci_ioaddr(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*buf++ = *bp;
} else {
p = (volatile u16 *)port2adr(port);
p = (volatile u16 *)port;
while (count--)
*buf++ = *p & 0xff;
}
......@@ -205,30 +149,26 @@ void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
if (CHECK_AX88796L_PORT(port))
p = (volatile u16 *)port88796l(port, 1);
else if (PXSEG(port))
p = (volatile u16 *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
p = (volatile u16 *)port;
while (count--)
*buf++ = *p;
flush_dcache_all();
}
void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
{
u32 *buf = dst;
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
if (is_pci_ioaddr(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
u32 *buf = dst;
while (count--)
*buf++ = *p;
} else
maybebadio(port);
}
}
void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
......@@ -240,19 +180,14 @@ void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
p = (volatile u16 *)port88796l(port, 0);
while (count--)
*p = *buf++;
} else if (PXSEG(port))
while (count--)
ctrl_outb(*buf++, port);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
} else if (is_pci_ioaddr(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*bp = *buf++;
} else {
p = (volatile u16 *)port2adr(port);
} else
while (count--)
*p = *buf++;
}
ctrl_outb(*buf++, port);
}
void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
......@@ -262,40 +197,37 @@ void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
if (CHECK_AX88796L_PORT(port))
p = (volatile u16 *)port88796l(port, 1);
else if (PXSEG(port))
p = (volatile u16 *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
p = (volatile u16 *)port;
while (count--)
*p = *buf++;
flush_dcache_all();
}
void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
{
const u32 *buf = src;
u32 *p;
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
if (is_pci_ioaddr(port))
p = (u32 *)pci_ioaddr(port);
else
p = (u32 *)port;
while (count--)
*p = *buf++;
} else
maybebadio(port);
while (count--)
ctrl_outl(*buf++, (unsigned long)p);
}
void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
{
if (CHECK_AX88796L_PORT(port))
return (void __iomem *)port88796l(port, size > 1);
else if (PXSEG(port))
return (void __iomem *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
else if (is_pci_ioaddr(port))
return (void __iomem *)pci_ioaddr(port);
return (void __iomem *)port2adr(port);
return (void __iomem *)port;
}
/*
* Copyright (C) Atom Create Engineering Co., Ltd.
*
* May be copied or modified under the terms of GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Renesas Solutions HIGHLANDER R7780RP-1 specific LED code.
*/
#include <linux/sched.h>
#include <asm/io.h>
#include <asm/r7780rp/r7780rp.h>
/* Cycle the LED's in the clasic Knightriger/Sun pattern */
void heartbeat_r7780rp(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short *p = (volatile unsigned short *)PA_OBLED;
static unsigned bit = 0, up = 1;
unsigned bit_pos[] = {2, 1, 0, 3, 6, 5, 4, 7};
cnt += 1;
if (cnt < period)
return;
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
*/
period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
*p = 1 << bit_pos[bit];
if (up)
if (bit == 7) {
bit--;
up = 0;
} else
bit++;
else if (bit == 0)
up = 1;
else
bit--;
}
......@@ -2,7 +2,7 @@
* arch/sh/boards/renesas/r7780rp/setup.c
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2005, 2006 Paul Mundt
* Copyright (C) 2005 - 2007 Paul Mundt
*
* Renesas Solutions Highlander R7780RP-1 Support.
*
......@@ -12,12 +12,12 @@
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <asm/machvec.h>
#include <asm/r7780rp.h>
#include <asm/clock.h>
#include <asm/io.h>
extern void heartbeat_r7780rp(void);
extern void init_r7780rp_IRQ(void);
static struct resource m66596_usb_host_resources[] = {
......@@ -46,14 +46,14 @@ static struct platform_device m66596_usb_host_device = {
static struct resource cf_ide_resources[] = {
[0] = {
.start = 0x1f0,
.end = 0x1f0 + 8,
.flags = IORESOURCE_IO,
.start = PA_AREA5_IO + 0x1000,
.end = PA_AREA5_IO + 0x1000 + 0x08 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x1f0 + 0x206,
.end = 0x1f0 + 8 + 0x206 + 8,
.flags = IORESOURCE_IO,
.start = PA_AREA5_IO + 0x80c,
.end = PA_AREA5_IO + 0x80c + 0x16 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
#ifdef CONFIG_SH_R7780MP
......@@ -65,16 +65,44 @@ static struct resource cf_ide_resources[] = {
},
};
static struct pata_platform_info pata_info = {
.ioport_shift = 1,
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
.dev = {
.platform_data = &pata_info,
},
};
static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_OBLED,
.end = PA_OBLED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *r7780rp_devices[] __initdata = {
&m66596_usb_host_device,
&cf_ide_device,
&heartbeat_device,
};
static int __init r7780rp_devices_setup(void)
......@@ -148,7 +176,7 @@ static void __init r7780rp_setup(char **cmdline_p)
#ifndef CONFIG_SH_R7780MP
ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
#endif
ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x0100, PA_IVDRCTL); /* Si13112 */
ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
pm_power_off = r7780rp_power_off;
}
......@@ -185,8 +213,5 @@ struct sh_machine_vector mv_r7780rp __initmv = {
.mv_ioport_map = r7780rp_ioport_map,
.mv_init_irq = init_r7780rp_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_r7780rp,
#endif
};
ALIAS_MV(r7780rp)
......@@ -2,5 +2,4 @@
# Makefile for the RTS7751R2D specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
obj-y := setup.o irq.o
/*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for Renesas Technology sales RTS7751R2D.
*
* Initial version only to support LAN access; some
* placeholder code from io_rts7751r2d.c left in with the
* expectation of later SuperIO and PCMCIA access.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
#include <asm/addrspace.h>
/*
* The 7751R RTS7751R2D uses the built-in PCI controller (PCIC)
* of the 7751R processor, and has a SuperIO accessible via the PCI.
* The board also includes a PCMCIA controller on its memory bus,
* like the other Solution Engine boards.
*/
static inline unsigned long port2adr(unsigned int port)
{
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
if (port == 0x3f6)
return (PA_AREA5_IO + 0x80c);
else
return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
else
maybebadio((unsigned long)port);
return port;
}
static inline unsigned long port88796l(unsigned int port, int flag)
{
unsigned long addr;
if (flag)
addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
else
addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
return addr;
}
/* The 7751R RTS7751R2D seems to have everything hooked */
/* up pretty normally (nothing on high-bytes only...) so this */
/* shouldn't be needed */
static inline int shifted_port(unsigned long port)
{
/* For IDE registers, value is not shifted */
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
return 0;
else
return 1;
}
#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
#define CHECK_AX88796L_PORT(port) \
((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
#else
#define CHECK_AX88796L_PORT(port) (0)
#endif
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
* should be way beyond the window, and is used w/o translation for
* compatibility.
*/
unsigned char rts7751r2d_inb(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
else if (PXSEG(port))
return *(volatile unsigned char *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
return *(volatile unsigned char *)pci_ioaddr(port);
else
return (*(volatile unsigned short *)port2adr(port) & 0xff);
}
unsigned char rts7751r2d_inb_p(unsigned long port)
{
unsigned char v;
if (CHECK_AX88796L_PORT(port))
v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
else if (PXSEG(port))
v = *(volatile unsigned char *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
v = *(volatile unsigned char *)pci_ioaddr(port);
else
v = (*(volatile unsigned short *)port2adr(port) & 0xff);
ctrl_delay();
return v;
}
unsigned short rts7751r2d_inw(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
return *(volatile unsigned short *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
return *(volatile unsigned short *)pci_ioaddr(port);
else
maybebadio(port);
return 0;
}
unsigned int rts7751r2d_inl(unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
return *(volatile unsigned long *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
return *(volatile unsigned long *)pci_ioaddr(port);
else
maybebadio(port);
return 0;
}
void rts7751r2d_outb(unsigned char value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
*((volatile unsigned short *)port88796l(port, 0)) = value;
else if (PXSEG(port))
*(volatile unsigned char *)port = value;
else if (is_pci_ioaddr(port) || shifted_port(port))
*(volatile unsigned char *)pci_ioaddr(port) = value;
else
*(volatile unsigned short *)port2adr(port) = value;
}
void rts7751r2d_outb_p(unsigned char value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
*((volatile unsigned short *)port88796l(port, 0)) = value;
else if (PXSEG(port))
*(volatile unsigned char *)port = value;
else if (is_pci_ioaddr(port) || shifted_port(port))
*(volatile unsigned char *)pci_ioaddr(port) = value;
else
*(volatile unsigned short *)port2adr(port) = value;
ctrl_delay();
}
void rts7751r2d_outw(unsigned short value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
*(volatile unsigned short *)port = value;
else if (is_pci_ioaddr(port) || shifted_port(port))
*(volatile unsigned short *)pci_ioaddr(port) = value;
else
maybebadio(port);
}
void rts7751r2d_outl(unsigned int value, unsigned long port)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (PXSEG(port))
*(volatile unsigned long *)port = value;
else if (is_pci_ioaddr(port) || shifted_port(port))
*(volatile unsigned long *)pci_ioaddr(port) = value;
else
maybebadio(port);
}
void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned long a = (unsigned long)addr;
volatile __u8 *bp;
volatile __u16 *p;
if (CHECK_AX88796L_PORT(port)) {
p = (volatile unsigned short *)port88796l(port, 0);
while (count--)
ctrl_outb(*p & 0xff, a++);
} else if (PXSEG(port))
while (count--)
ctrl_outb(ctrl_inb(port), a++);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
bp = (__u8 *)pci_ioaddr(port);
while (count--)
ctrl_outb(*bp, a++);
} else {
p = (volatile unsigned short *)port2adr(port);
while (count--)
ctrl_outb(*p & 0xff, a++);
}
}
void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count)
{
unsigned long a = (unsigned long)addr;
volatile __u16 *p;
if (CHECK_AX88796L_PORT(port))
p = (volatile unsigned short *)port88796l(port, 1);
else if (PXSEG(port))
p = (volatile unsigned short *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
p = (volatile unsigned short *)pci_ioaddr(port);
else
p = (volatile unsigned short *)port2adr(port);
while (count--)
ctrl_outw(*p, a++);
}
void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
unsigned long a = (unsigned long)addr;
while (count--) {
ctrl_outl(ctrl_inl(pci_ioaddr(port)), a);
a += 4;
}
} else
maybebadio(port);
}
void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned long a = (unsigned long)addr;
volatile __u8 *bp;
volatile __u16 *p;
if (CHECK_AX88796L_PORT(port)) {
p = (volatile unsigned short *)port88796l(port, 0);
while (count--)
*p = ctrl_inb(a++);
} else if (PXSEG(port))
while (count--)
ctrl_outb(a++, port);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
bp = (__u8 *)pci_ioaddr(port);
while (count--)
*bp = ctrl_inb(a++);
} else {
p = (volatile unsigned short *)port2adr(port);
while (count--)
*p = ctrl_inb(a++);
}
}
void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count)
{
unsigned long a = (unsigned long)addr;
volatile __u16 *p;
if (CHECK_AX88796L_PORT(port))
p = (volatile unsigned short *)port88796l(port, 1);
else if (PXSEG(port))
p = (volatile unsigned short *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
p = (volatile unsigned short *)pci_ioaddr(port);
else
p = (volatile unsigned short *)port2adr(port);
while (count--) {
ctrl_outw(*p, a);
a += 2;
}
}
void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count)
{
if (CHECK_AX88796L_PORT(port))
maybebadio(port);
else if (is_pci_ioaddr(port) || shifted_port(port)) {
unsigned long a = (unsigned long)addr;
while (count--) {
ctrl_outl(ctrl_inl(a), pci_ioaddr(port));
a += 4;
}
} else
maybebadio(port);
}
unsigned long rts7751r2d_isa_port2addr(unsigned long offset)
{
return port2adr(offset);
}
......@@ -9,7 +9,9 @@
* Atom Create Engineering Co., Ltd. 2002.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/rts7751r2d.h>
......@@ -22,79 +24,31 @@ static int mask_pos[] = {6, 11, 9, 8, 12, 10, 5, 4, 7, 14, 13, 0, 0, 0, 0};
extern int voyagergx_irq_demux(int irq);
extern void setup_voyagergx_irq(void);
static void enable_rts7751r2d_irq(unsigned int irq);
static void disable_rts7751r2d_irq(unsigned int irq);
/* shutdown is same as "disable" */
#define shutdown_rts7751r2d_irq disable_rts7751r2d_irq
static void ack_rts7751r2d_irq(unsigned int irq);
static void end_rts7751r2d_irq(unsigned int irq);
static unsigned int startup_rts7751r2d_irq(unsigned int irq)
static void enable_rts7751r2d_irq(unsigned int irq)
{
enable_rts7751r2d_irq(irq);
return 0; /* never anything pending */
/* Set priority in IPR back to original value */
ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
}
static void disable_rts7751r2d_irq(unsigned int irq)
{
unsigned short val;
unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
/* Set the priority in IPR to 0 */
val = ctrl_inw(IRLCNTR1);
val &= mask;
ctrl_outw(val, IRLCNTR1);
}
static void enable_rts7751r2d_irq(unsigned int irq)
{
unsigned short val;
unsigned short value = (0x0001 << mask_pos[irq]);
/* Set priority in IPR back to original value */
val = ctrl_inw(IRLCNTR1);
val |= value;
ctrl_outw(val, IRLCNTR1);
ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
IRLCNTR1);
}
int rts7751r2d_irq_demux(int irq)
{
int demux_irq;
demux_irq = voyagergx_irq_demux(irq);
return demux_irq;
}
static void ack_rts7751r2d_irq(unsigned int irq)
{
disable_rts7751r2d_irq(irq);
return voyagergx_irq_demux(irq);
}
static void end_rts7751r2d_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_rts7751r2d_irq(irq);
}
static struct hw_interrupt_type rts7751r2d_irq_type = {
.typename = "RTS7751R2D IRQ",
.startup = startup_rts7751r2d_irq,
.shutdown = shutdown_rts7751r2d_irq,
.enable = enable_rts7751r2d_irq,
.disable = disable_rts7751r2d_irq,
.ack = ack_rts7751r2d_irq,
.end = end_rts7751r2d_irq,
static struct irq_chip rts7751r2d_irq_chip __read_mostly = {
.name = "rts7751r2d",
.mask = disable_rts7751r2d_irq,
.unmask = enable_rts7751r2d_irq,
.mask_ack = disable_rts7751r2d_irq,
};
static void make_rts7751r2d_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &rts7751r2d_irq_type;
disable_rts7751r2d_irq(irq);
}
/*
* Initialize IRQ setting
*/
......@@ -119,8 +73,12 @@ void __init init_rts7751r2d_IRQ(void)
* IRL14=Extention #3
*/
for (i=0; i<15; i++)
make_rts7751r2d_irq(i);
for (i=0; i<15; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler_name(i, &rts7751r2d_irq_chip,
handle_level_irq, "level");
enable_rts7751r2d_irq(i);
}
setup_voyagergx_irq();
}
/*
* linux/arch/sh/boards/renesas/rts7751r2d/led.c
*
* Copyright (C) Atom Create Engineering Co., Ltd.
*
* May be copied or modified under the terms of GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Renesas Technology Sales RTS7751R2D specific LED code.
*/
#include <linux/io.h>
#include <linux/sched.h>
#include <asm/rts7751r2d.h>
/* Cycle the LED's in the clasic Knightriger/Sun pattern */
void heartbeat_rts7751r2d(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short *p = (volatile unsigned short *)PA_OUTPORT;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period)
return;
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
*/
period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
*p = 1 << bit;
if (up)
if (bit == 7) {
bit--;
up = 0;
} else
bit++;
else if (bit == 0)
up = 1;
else
bit--;
}
/*
* Renesas Technology Sales RTS7751R2D Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2004 - 2006 Paul Mundt
* Copyright (C) 2002 - 2006 Atom Create Engineering Co., Ltd.
* Copyright (C) 2004 - 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
......@@ -10,33 +10,13 @@
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <linux/serial_8250.h>
#include <linux/pm.h>
#include <asm/machvec.h>
#include <asm/mach/rts7751r2d.h>
#include <asm/io.h>
#include <asm/rts7751r2d.h>
#include <asm/voyagergx.h>
extern void heartbeat_rts7751r2d(void);
extern void init_rts7751r2d_IRQ(void);
extern int rts7751r2d_irq_demux(int irq);
extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
static struct plat_serial8250_port uart_platform_data[] = {
{
.membase = (void *)VOYAGER_UART_BASE,
.mapbase = VOYAGER_UART_BASE,
.iotype = UPIO_MEM,
.irq = VOYAGER_UART0_IRQ,
.flags = UPF_BOOT_AUTOCONF,
.regshift = 2,
.uartclk = (9600 * 16),
}, {
.flags = 0,
},
};
#include <asm/io.h>
static void __init voyagergx_serial_init(void)
{
......@@ -45,32 +25,96 @@ static void __init voyagergx_serial_init(void)
/*
* GPIO Control
*/
val = inl(GPIO_MUX_HIGH);
val = readl((void __iomem *)GPIO_MUX_HIGH);
val |= 0x00001fe0;
outl(val, GPIO_MUX_HIGH);
writel(val, (void __iomem *)GPIO_MUX_HIGH);
/*
* Power Mode Gate
*/
val = inl(POWER_MODE0_GATE);
val = readl((void __iomem *)POWER_MODE0_GATE);
val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
outl(val, POWER_MODE0_GATE);
writel(val, (void __iomem *)POWER_MODE0_GATE);
val = inl(POWER_MODE1_GATE);
val = readl((void __iomem *)POWER_MODE1_GATE);
val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
outl(val, POWER_MODE1_GATE);
writel(val, (void __iomem *)POWER_MODE1_GATE);
}
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_AREA5_IO + 0x1000,
.end = PA_AREA5_IO + 0x1000 + 0x08 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PA_AREA5_IO + 0x80c,
.end = PA_AREA5_IO + 0x80c + 0x16 - 1,
.flags = IORESOURCE_MEM,
},
[2] = {
#ifdef CONFIG_RTS7751R2D_REV11
.start = 1,
#else
.start = 2,
#endif
.flags = IORESOURCE_IRQ,
},
};
static struct pata_platform_info pata_info = {
.ioport_shift = 1,
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
.dev = {
.platform_data = &pata_info,
},
};
static struct plat_serial8250_port uart_platform_data[] = {
{
.membase = (void __iomem *)VOYAGER_UART_BASE,
.mapbase = VOYAGER_UART_BASE,
.iotype = UPIO_MEM,
.irq = VOYAGER_UART0_IRQ,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.regshift = 2,
.uartclk = (9600 * 16),
}
};
static struct platform_device uart_device = {
.name = "serial8250",
.id = -1,
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart_platform_data,
},
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_OUTPORT,
.end = PA_OUTPORT + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *rts7751r2d_devices[] __initdata = {
&uart_device,
&heartbeat_device,
&cf_ide_device,
};
static int __init rts7751r2d_devices_setup(void)
......@@ -78,6 +122,7 @@ static int __init rts7751r2d_devices_setup(void)
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
__initcall(rts7751r2d_devices_setup);
static void rts7751r2d_power_off(void)
{
......@@ -89,14 +134,17 @@ static void rts7751r2d_power_off(void)
*/
static void __init rts7751r2d_setup(char **cmdline_p)
{
device_initcall(rts7751r2d_devices_setup);
u16 ver = ctrl_inw(PA_VERREG);
printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
(ver >> 4) & 0xf, ver & 0xf);
ctrl_outw(0x0000, PA_OUTPORT);
pm_power_off = rts7751r2d_power_off;
voyagergx_serial_init();
printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
}
/*
......@@ -107,31 +155,7 @@ struct sh_machine_vector mv_rts7751r2d __initmv = {
.mv_setup = rts7751r2d_setup,
.mv_nr_irqs = 72,
.mv_inb = rts7751r2d_inb,
.mv_inw = rts7751r2d_inw,
.mv_inl = rts7751r2d_inl,
.mv_outb = rts7751r2d_outb,
.mv_outw = rts7751r2d_outw,
.mv_outl = rts7751r2d_outl,
.mv_inb_p = rts7751r2d_inb_p,
.mv_inw_p = rts7751r2d_inw,
.mv_inl_p = rts7751r2d_inl,
.mv_outb_p = rts7751r2d_outb_p,
.mv_outw_p = rts7751r2d_outw,
.mv_outl_p = rts7751r2d_outl,
.mv_insb = rts7751r2d_insb,
.mv_insw = rts7751r2d_insw,
.mv_insl = rts7751r2d_insl,
.mv_outsb = rts7751r2d_outsb,
.mv_outsw = rts7751r2d_outsw,
.mv_outsl = rts7751r2d_outsl,
.mv_init_irq = init_rts7751r2d_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_rts7751r2d,
#endif
.mv_irq_demux = rts7751r2d_irq_demux,
#ifdef CONFIG_USB_SM501
......
......@@ -3,5 +3,3 @@
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* linux/arch/sh/kernel/led_se.c
*
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Solution Engine specific LED code.
*/
#include <linux/config.h>
#include <asm/se7206.h>
#ifdef CONFIG_HEARTBEAT
#include <linux/sched.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short* p = (volatile unsigned short*)PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if (up) {
if (bit == 7) {
bit--;
up=0;
} else {
bit ++;
}
} else {
if (bit == 0) {
bit++;
up=1;
} else {
bit--;
}
}
*p = 1<<(bit+8);
}
#endif /* CONFIG_HEARTBEAT */
......@@ -3,6 +3,7 @@
* linux/arch/sh/boards/se/7206/setup.c
*
* Copyright (C) 2006 Yoshinori Sato
* Copyright (C) 2007 Paul Mundt
*
* Hitachi 7206 SolutionEngine Support.
*
......@@ -34,15 +35,37 @@ static struct platform_device smc91x_device = {
.resource = smc91x_resources,
};
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se7206_devices[] __initdata = {
&smc91x_device,
&heartbeat_device,
};
static int __init se7206_devices_setup(void)
{
return platform_device_register(&smc91x_device);
return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
}
__initcall(se7206_devices_setup);
void heartbeat_se(void);
/*
* The Machine Vector
*/
......@@ -72,8 +95,5 @@ struct sh_machine_vector mv_se __initmv = {
.mv_outsl = se7206_outsl,
.mv_init_irq = init_se7206_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_se,
#endif
};
ALIAS_MV(se)
......@@ -3,5 +3,3 @@
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* linux/arch/sh/boards/se/7300/led.c
*
* Derived from linux/arch/sh/boards/se/770x/led.c
*
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Solution Engine specific LED code.
*/
#include <linux/sched.h>
#include <asm/se7300.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_7300se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short *p = (volatile unsigned short *) PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
if (up) {
if (bit == 7) {
bit--;
up = 0;
} else {
bit++;
}
} else {
if (bit == 0) {
bit++;
up = 1;
} else {
bit--;
}
}
*p = 1 << (bit + 8);
}
......@@ -6,14 +6,43 @@
* SH-Mobile SolutionEngine 7300 Support.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se7300.h>
void heartbeat_7300se(void);
void init_7300se_IRQ(void);
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se7300_devices[] __initdata = {
&heartbeat_device,
};
static int __init se7300_devices_setup(void)
{
return platform_add_devices(se7300_devices, ARRAY_SIZE(se7300_devices));
}
__initcall(se7300_devices_setup);
/*
* The Machine Vector
*/
......@@ -42,8 +71,5 @@ struct sh_machine_vector mv_7300se __initmv = {
.mv_outsl = sh7300se_outsl,
.mv_init_irq = init_7300se_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_7300se,
#endif
};
ALIAS_MV(7300se)
......@@ -3,5 +3,3 @@
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* arch/sh/boards/se/73180/led.c
*
* Derived from arch/sh/boards/se/770x/led.c
*
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Solution Engine specific LED code.
*/
#include <linux/sched.h>
#include <asm/mach/se73180.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_73180se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short *p = (volatile unsigned short *) PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
if (up) {
if (bit == 7) {
bit--;
up = 0;
} else {
bit++;
}
} else {
if (bit == 0) {
bit++;
up = 1;
} else {
bit--;
}
}
*p = 1 << (bit + LED_SHIFT);
}
......@@ -10,13 +10,39 @@
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se73180.h>
#include <asm/irq.h>
void heartbeat_73180se(void);
void init_73180se_IRQ(void);
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se73180_devices[] __initdata = {
&heartbeat_device,
};
static int __init se73180_devices_setup(void)
{
return platform_add_devices(sh7343se_platform_devices,
ARRAY_SIZE(sh7343se_platform_devices));
}
__initcall(se73180_devices_setup);
/*
* The Machine Vector
*/
......@@ -46,8 +72,5 @@ struct sh_machine_vector mv_73180se __initmv = {
.mv_init_irq = init_73180se_IRQ,
.mv_irq_demux = shmse_irq_demux,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_73180se,
#endif
};
ALIAS_MV(73180se)
......@@ -3,5 +3,3 @@
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* arch/sh/boards/se/7343/led.c
*
*/
#include <linux/sched.h>
#include <asm/mach/se7343.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_7343se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short *p = (volatile unsigned short *) PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
if (up) {
if (bit == 7) {
bit--;
up = 0;
} else {
bit++;
}
} else {
if (bit == 0) {
bit++;
up = 1;
} else {
bit--;
}
}
*p = 1 << (bit + LED_SHIFT);
}
......@@ -4,7 +4,6 @@
#include <asm/mach/se7343.h>
#include <asm/irq.h>
void heartbeat_7343se(void);
void init_7343se_IRQ(void);
static struct resource smc91x_resources[] = {
......@@ -31,14 +30,30 @@ static struct platform_device smc91x_device = {
.resource = smc91x_resources,
};
static struct platform_device *smc91x_platform_devices[] __initdata = {
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *sh7343se_platform_devices[] __initdata = {
&smc91x_device,
&heartbeat_device,
};
static int __init sh7343se_devices_setup(void)
{
return platform_add_devices(smc91x_platform_devices,
ARRAY_SIZE(smc91x_platform_devices));
return platform_add_devices(sh7343se_platform_devices,
ARRAY_SIZE(sh7343se_platform_devices));
}
static void __init sh7343se_setup(char **cmdline_p)
......@@ -76,8 +91,5 @@ struct sh_machine_vector mv_7343se __initmv = {
.mv_init_irq = init_7343se_IRQ,
.mv_irq_demux = shmse_irq_demux,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_7343se,
#endif
};
ALIAS_MV(7343se)
......@@ -3,4 +3,3 @@
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
......@@ -2,56 +2,96 @@
* linux/arch/sh/boards/se/770x/irq.c
*
* Copyright (C) 2000 Kazumoto Kojima
* Copyright (C) 2006 Nobuhiro Iwamatsu
*
* Hitachi SolutionEngine Support.
*
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/se.h>
/*
* If the problem of make_ipr_irq is solved,
* this code will become unnecessary. :-)
*/
static void se770x_disable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
}
static void se770x_enable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
}
static struct irq_chip se770x_irq_chip = {
.name = "MS770xSE-FPGA",
.mask = se770x_disable_ipr_irq,
.unmask = se770x_enable_ipr_irq,
.mask_ack = se770x_disable_ipr_irq,
};
void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
{
int i;
for (i = 0; i < nr_irqs; i++) {
unsigned int irq = table[i].irq;
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
handle_level_irq, "level");
set_irq_chip_data(irq, &table[i]);
se770x_enable_ipr_irq(irq);
}
}
static struct ipr_data se770x_ipr_map[] = {
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
/* This is default value */
{ 0xf-0x2, BCR_ILCRA, 2, 0x2 },
{ 0xf-0xa, BCR_ILCRA, 1, 0xa },
{ 0xf-0x5, BCR_ILCRB, 0, 0x5 },
{ 0xf-0x8, BCR_ILCRC, 1, 0x8 },
{ 0xf-0xc, BCR_ILCRC, 0, 0xc },
{ 0xf-0xe, BCR_ILCRD, 3, 0xe },
{ 0xf-0x3, BCR_ILCRD, 1, 0x3 }, /* LAN */
{ 0xf-0xd, BCR_ILCRE, 2, 0xd },
{ 0xf-0x9, BCR_ILCRE, 1, 0x9 },
{ 0xf-0x1, BCR_ILCRE, 0, 0x1 },
{ 0xf-0xf, BCR_ILCRF, 3, 0xf },
{ 0xf-0xb, BCR_ILCRF, 1, 0xb },
{ 0xf-0x7, BCR_ILCRG, 3, 0x7 },
{ 0xf-0x6, BCR_ILCRG, 2, 0x6 },
{ 0xf-0x4, BCR_ILCRG, 1, 0x4 },
{ 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA},
{ 0xf-0xa, 0, 4, 0xa , BCR_ILCRA},
{ 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB},
{ 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC},
{ 0xf-0xc, 0, 0, 0xc , BCR_ILCRC},
{ 0xf-0xe, 0, 12, 0xe , BCR_ILCRD},
{ 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */
{ 0xf-0xd, 0, 8, 0xd , BCR_ILCRE},
{ 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE},
{ 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE},
{ 0xf-0xf, 0, 12, 0xf , BCR_ILCRF},
{ 0xf-0xb, 0, 4, 0xb , BCR_ILCRF},
{ 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG},
{ 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG},
{ 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG},
#else
{ 14, BCR_ILCRA, 2, 0x0f-14 },
{ 12, BCR_ILCRA, 1, 0x0f-12 },
{ 8, BCR_ILCRB, 1, 0x0f- 8 },
{ 6, BCR_ILCRC, 3, 0x0f- 6 },
{ 5, BCR_ILCRC, 2, 0x0f- 5 },
{ 4, BCR_ILCRC, 1, 0x0f- 4 },
{ 3, BCR_ILCRC, 0, 0x0f- 3 },
{ 1, BCR_ILCRD, 3, 0x0f- 1 },
{ 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */
{ 0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */
{ 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */
{ 9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */
{ 7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */
{ 14, 0, 8, 0x0f-14 ,BCR_ILCRA},
{ 12, 0, 4, 0x0f-12 ,BCR_ILCRA},
{ 8, 0, 4, 0x0f- 8 ,BCR_ILCRB},
{ 6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
{ 5, 0, 8, 0x0f- 5 ,BCR_ILCRC},
{ 4, 0, 4, 0x0f- 4 ,BCR_ILCRC},
{ 3, 0, 0, 0x0f- 3 ,BCR_ILCRC},
{ 1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
/* ST NIC */
{ 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */
/* MRSHPC IRQs setting */
{ 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */
{ 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */
{ 9, 0, 4, 0x0f- 9 ,BCR_ILCRE}, /* PCIRQ1 */
{ 7, 0, 0, 0x0f- 7 ,BCR_ILCRE}, /* PCIRQ0 */
/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
/* NOTE: #2 and #13 are not used on PC */
{ 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */
{ 2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */
{ 13, 0, 4, 0x0f-13 ,BCR_ILCRG}, /* SLOTIRQ2 */
{ 2, 0, 0, 0x0f- 2 ,BCR_ILCRG}, /* SLOTIRQ1 */
#endif
};
......@@ -81,5 +121,5 @@ void __init init_se_IRQ(void)
ctrl_outw(0, BCR_ILCRF);
ctrl_outw(0, BCR_ILCRG);
#endif
make_ipr_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
}
/*
* linux/arch/sh/boards/se/770x/led.c
*
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Solution Engine specific LED code.
*/
#include <linux/sched.h>
#include <asm/se.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short* p = (volatile unsigned short*)PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if (up) {
if (bit == 7) {
bit--;
up=0;
} else {
bit ++;
}
} else {
if (bit == 0) {
bit++;
up=1;
} else {
bit--;
}
}
*p = 1<<(bit+8);
}
/* $Id: setup.c,v 1.1.2.4 2002/03/02 21:57:07 lethal Exp $
*
/*
* linux/arch/sh/boards/se/770x/setup.c
*
* Copyright (C) 2000 Kazumoto Kojima
......@@ -8,12 +7,12 @@
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se.h>
#include <asm/io.h>
#include <asm/smc37c93x.h>
void heartbeat_se(void);
void init_se_IRQ(void);
/*
......@@ -36,11 +35,6 @@ static void __init smsc_setup(char **cmdline_p)
smsc_config(ACTIVATE_INDEX, 0x01);
smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
/* IDE1 */
smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
smsc_config(ACTIVATE_INDEX, 0x01);
smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
/* AUXIO (GPIO): to use IDE1 */
smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
......@@ -69,6 +63,36 @@ static void __init smsc_setup(char **cmdline_p)
outb_p(CONFIG_EXIT, CONFIG_PORT);
}
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se_devices[] __initdata = {
&heartbeat_device,
};
static int __init se_devices_setup(void)
{
return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
}
__initcall(se_devices_setup);
/*
* The Machine Vector
*/
......@@ -107,8 +131,5 @@ struct sh_machine_vector mv_se __initmv = {
.mv_outsl = se_outsl,
.mv_init_irq = init_se_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_se,
#endif
};
ALIAS_MV(se)
......@@ -5,4 +5,3 @@
obj-y := setup.o io.o irq.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* linux/arch/sh/boards/se/7751/led.c
*
* Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* This file contains Solution Engine specific LED code.
*/
#include <linux/sched.h>
#include <asm/se7751.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_7751se(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned short* p = (volatile unsigned short*)PA_LED;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if (up) {
if (bit == 7) {
bit--;
up=0;
} else {
bit ++;
}
} else {
if (bit == 0) {
bit++;
up=1;
} else {
bit--;
}
}
*p = 1<<(bit+8);
}
......@@ -9,11 +9,11 @@
* Ian da Silva and Jeremy Siegel, 2001.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se7751.h>
#include <asm/io.h>
void heartbeat_7751se(void);
void init_7751se_IRQ(void);
#ifdef CONFIG_SH_KGDB
......@@ -161,11 +161,40 @@ static int kgdb_uart_setup(void)
}
#endif /* CONFIG_SH_KGDB */
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se7751_devices[] __initdata = {
&smc91x_device,
&heartbeat_device,
};
static int __init se7751_devices_setup(void)
{
return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
}
__initcall(se7751_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_7751se __initmv = {
.mv_name = "7751 SolutionEngine",
.mv_setup = sh7751se_setup,
......@@ -189,8 +218,5 @@ struct sh_machine_vector mv_7751se __initmv = {
.mv_outsl = sh7751se_outsl,
.mv_init_irq = init_7751se_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_7751se,
#endif
};
ALIAS_MV(7751se)
......@@ -3,4 +3,3 @@
#
obj-y := setup.o rtc.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* linux/arch/sh/boards/sh03/led.c
*
* Copyright (C) 2004 Saito.K Interface Corporation.
*
* This file contains Interface CTP/PCI-SH03 specific LED code.
*/
#include <linux/sched.h>
/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_sh03(void)
{
static unsigned int cnt = 0, period = 0;
volatile unsigned char* p = (volatile unsigned char*)0xa0800000;
static unsigned bit = 0, up = 1;
cnt += 1;
if (cnt < period) {
return;
}
cnt = 0;
/* Go through the points (roughly!):
* f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
*/
period = 110 - ( (300<<FSHIFT)/
((avenrun[0]/5) + (3<<FSHIFT)) );
if (up) {
if (bit == 7) {
bit--;
up=0;
} else {
bit ++;
}
} else {
if (bit == 0) {
bit++;
up=1;
} else {
bit--;
}
}
*p = 1<<bit;
}
......@@ -8,6 +8,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/rtc.h>
#include <asm/sh03/io.h>
......@@ -48,15 +49,36 @@ static void __init sh03_setup(char **cmdline_p)
board_time_init = sh03_time_init;
}
static struct resource heartbeat_resources[] = {
[0] = {
.start = 0xa0800000,
.end = 0xa0800000 + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *sh03_devices[] __initdata = {
&heartbeat_device,
};
static int __init sh03_devices_setup(void)
{
return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
}
__initcall(sh03_devices_setup);
struct sh_machine_vector mv_sh03 __initmv = {
.mv_name = "Interface (CTP/PCI-SH03)",
.mv_setup = sh03_setup,
.mv_nr_irqs = 48,
.mv_ioport_map = sh03_ioport_map,
.mv_init_irq = init_sh03_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_sh03,
#endif
};
ALIAS_MV(sh03)
......@@ -12,12 +12,22 @@
#include <asm/irq.h>
#include <asm/io.h>
#define PFC_PHCR 0xa400010e
#define PFC_PHCR 0xa400010eUL
#define INTC_ICR1 0xa4000010UL
#define INTC_IPRC 0xa4000016UL
static struct ipr_data shmin_ipr_map[] = {
{ .irq=32, .addr=INTC_IPRC, .shift= 0, .priority=0 },
{ .irq=33, .addr=INTC_IPRC, .shift= 4, .priority=0 },
{ .irq=34, .addr=INTC_IPRC, .shift= 8, .priority=8 },
{ .irq=35, .addr=INTC_IPRC, .shift=12, .priority=0 },
};
static void __init init_shmin_irq(void)
{
ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
make_ipr_irq(shmin_ipr_map, ARRAY_SIZE(shmin_ipr_map));
}
static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
......
......@@ -28,21 +28,21 @@ static void disable_voyagergx_irq(unsigned int irq)
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = inl(VOYAGER_INT_MASK);
val &= ~mask;
outl(val, VOYAGER_INT_MASK);
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
val = readl((void __iomem *)VOYAGER_INT_MASK);
val &= ~mask;
writel(val, (void __iomem *)VOYAGER_INT_MASK);
}
static void enable_voyagergx_irq(unsigned int irq)
{
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = inl(VOYAGER_INT_MASK);
val |= mask;
outl(val, VOYAGER_INT_MASK);
pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
val = readl((void __iomem *)VOYAGER_INT_MASK);
val |= mask;
writel(val, (void __iomem *)VOYAGER_INT_MASK);
}
static void mask_and_ack_voyagergx(unsigned int irq)
......@@ -68,20 +68,20 @@ static void shutdown_voyagergx_irq(unsigned int irq)
}
static struct hw_interrupt_type voyagergx_irq_type = {
.typename = "VOYAGERGX-IRQ",
.startup = startup_voyagergx_irq,
.shutdown = shutdown_voyagergx_irq,
.enable = enable_voyagergx_irq,
.disable = disable_voyagergx_irq,
.ack = mask_and_ack_voyagergx,
.end = end_voyagergx_irq,
.typename = "VOYAGERGX-IRQ",
.startup = startup_voyagergx_irq,
.shutdown = shutdown_voyagergx_irq,
.enable = enable_voyagergx_irq,
.disable = disable_voyagergx_irq,
.ack = mask_and_ack_voyagergx,
.end = end_voyagergx_irq,
};
static irqreturn_t voyagergx_interrupt(int irq, void *dev_id)
{
printk(KERN_INFO
"VoyagerGX: spurious interrupt, status: 0x%x\n",
inl(INT_STATUS));
(unsigned int)readl((void __iomem *)INT_STATUS));
return IRQ_HANDLED;
}
......@@ -93,13 +93,13 @@ static struct {
void voyagergx_register_irq_demux(int irq,
int (*demux)(int irq, void *dev), void *dev)
{
voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux;
voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev;
voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux;
voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev;
}
void voyagergx_unregister_irq_demux(int irq)
{
voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0;
voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0;
}
int voyagergx_irq_demux(int irq)
......@@ -107,31 +107,25 @@ int voyagergx_irq_demux(int irq)
if (irq == IRQ_VOYAGER ) {
unsigned long i = 0, bit __attribute__ ((unused));
unsigned long val = inl(INT_STATUS);
#if 1
if ( val & ( 1 << 1 )){
unsigned long val = readl((void __iomem *)INT_STATUS);
if (val & (1 << 1))
i = 1;
} else if ( val & ( 1 << 2 )){
else if (val & (1 << 2))
i = 2;
} else if ( val & ( 1 << 6 )){
else if (val & (1 << 6))
i = 6;
} else if( val & ( 1 << 10 )){
else if (val & (1 << 10))
i = 10;
} else if( val & ( 1 << 11 )){
else if (val & (1 << 11))
i = 11;
} else if( val & ( 1 << 12 )){
else if (val & (1 << 12))
i = 12;
} else if( val & ( 1 << 17 )){
else if (val & (1 << 17))
i = 17;
} else {
else
printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
}
pr_debug("voyagergx_irq_demux %ld\n", i);
#else
for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
if (val & bit)
break;
#endif
pr_debug("voyagergx_irq_demux %d \n", i);
if (i < VOYAGER_IRQ_NUM) {
irq = VOYAGER_IRQ_BASE + i;
if (voyagergx_demux[i].func != 0)
......
......@@ -19,7 +19,7 @@ static int __init setup_voyagergx(void)
{
unsigned long val;
val = inl(DRAM_CTRL);
val = readl((void __iomem *)DRAM_CTRL);
val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 |
DRAM_CTRL_CPU_ACTIVE_PRECHARGE |
DRAM_CTRL_CPU_RESET |
......@@ -29,7 +29,7 @@ static int __init setup_voyagergx(void)
DRAM_CTRL_ACTIVE_PRECHARGE |
DRAM_CTRL_RESET |
DRAM_CTRL_REMAIN_ACTIVE);
outl(val, DRAM_CTRL);
writel(val, (void __iomem *)DRAM_CTRL);
return 0;
}
......
This diff is collapsed.
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.18
# Tue Oct 3 11:49:01 2006
# Linux kernel version: 2.6.20-rc2
# Thu Dec 28 23:15:49 2006
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
......@@ -10,6 +10,11 @@ CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
# CONFIG_GENERIC_TIME is not set
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
......@@ -35,6 +40,7 @@ CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
......@@ -116,6 +122,8 @@ CONFIG_SH_SOLUTION_ENGINE=y
# CONFIG_SH_LANDISK is not set
# CONFIG_SH_TITAN is not set
# CONFIG_SH_SHMIN is not set
# CONFIG_SH_7206_SOLUTION_ENGINE is not set
# CONFIG_SH_7619_SOLUTION_ENGINE is not set
# CONFIG_SH_UNKNOWN is not set
#
......@@ -127,6 +135,12 @@ CONFIG_CPU_SH4=y
# SH-2 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7604 is not set
# CONFIG_CPU_SUBTYPE_SH7619 is not set
#
# SH-2A Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7206 is not set
#
# SH-3 Processor Support
......@@ -162,12 +176,14 @@ CONFIG_CPU_SUBTYPE_SH7750=y
#
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
#
# SH4AL-DSP Processor Support
#
# CONFIG_CPU_SUBTYPE_SH73180 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
#
# Memory management options
......@@ -177,6 +193,9 @@ CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x02000000
CONFIG_VSYSCALL=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
......@@ -202,17 +221,22 @@ CONFIG_CF_BASE_ADDR=0xb8000000
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_SH_FPU=y
# CONFIG_SH_DSP is not set
# CONFIG_SH_STORE_QUEUES is not set
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_IPR_IRQ=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_PTEA=y
#
# Timer support
#
CONFIG_SH_TMU=y
CONFIG_SH_PCLK_FREQ=50000000
CONFIG_SH_TIMER_IRQ=16
# CONFIG_NO_IDLE_HZ is not set
CONFIG_SH_PCLK_FREQ=33333333
#
# CPU Frequency scaling
......@@ -230,11 +254,17 @@ CONFIG_SH_PCLK_FREQ=50000000
# CONFIG_HD6446X_SERIES is not set
CONFIG_HEARTBEAT=y
#
# Additional SuperH Device Drivers
#
# CONFIG_PUSH_SWITCH is not set
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_KEXEC is not set
......@@ -249,8 +279,7 @@ CONFIG_PREEMPT_NONE=y
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
# CONFIG_UBC_WAKEUP is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttySC1,38400 root=/dev/nfs ip=bootp"
# CONFIG_CMDLINE_BOOL is not set
#
# Bus options
......@@ -313,11 +342,13 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
......@@ -479,17 +510,80 @@ CONFIG_MTD_ROM=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
CONFIG_IDE=y
CONFIG_IDE_MAX_HWIFS=4
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_BLK_DEV_IDESCSI is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
# CONFIG_IDE_GENERIC is not set
# CONFIG_IDE_ARM is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
CONFIG_SCSI=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
# CONFIG_BLK_DEV_SD is not set
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_DEBUG is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
......@@ -633,17 +727,12 @@ CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
#
# I2C support
......@@ -659,6 +748,7 @@ CONFIG_HW_RANDOM=y
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
......@@ -667,18 +757,14 @@ CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
......@@ -757,15 +843,21 @@ CONFIG_FIRMWARE_EDID=y
# DMA Devices
#
#
# Virtualization
#
#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
......@@ -814,7 +906,6 @@ CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
......@@ -874,6 +965,11 @@ CONFIG_PARTITION_ADVANCED=y
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# Profiling support
#
......@@ -882,14 +978,16 @@ CONFIG_PARTITION_ADVANCED=y
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_EARLY_SCIF_CONSOLE is not set
# CONFIG_KGDB is not set
......@@ -908,6 +1006,7 @@ CONFIG_LOG_BUF_SHIFT=14
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
......@@ -915,3 +1014,4 @@ CONFIG_CRC32=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
......@@ -6,3 +6,4 @@ obj-$(CONFIG_PCI) += pci/
obj-$(CONFIG_SH_DMA) += dma/
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
......@@ -19,34 +19,26 @@
#include <asm/io.h>
#include "dma-sh.h"
#ifdef CONFIG_CPU_SH4
static struct ipr_data dmae_ipr_map[] = {
{ DMAE_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
};
static int dmte_irq_map[] = {
DMTE0_IRQ,
DMTE1_IRQ,
DMTE2_IRQ,
DMTE3_IRQ,
#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
defined(CONFIG_CPU_SUBTYPE_SH7760) || \
defined(CONFIG_CPU_SUBTYPE_SH7780)
DMTE4_IRQ,
DMTE5_IRQ,
DMTE6_IRQ,
DMTE7_IRQ,
#endif
static struct ipr_data dmte_ipr_map[] = {
/*
* Normally we could just do DMTE0_IRQ + chan outright, though in the
* case of the 7751R, the DMTE IRQs for channels > 4 start right above
* the SCIF
*/
{ DMTE0_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE0_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE0_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE0_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE4_IRQ + 0, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE4_IRQ + 1, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE4_IRQ + 2, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
{ DMTE4_IRQ + 3, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
};
static inline unsigned int get_dmte_irq(unsigned int chan)
{
unsigned int irq = 0;
if (chan < ARRAY_SIZE(dmte_ipr_map))
irq = dmte_ipr_map[chan].irq;
if (chan < ARRAY_SIZE(dmte_irq_map))
irq = dmte_irq_map[chan];
return irq;
}
......@@ -103,7 +95,7 @@ static void sh_dmac_free_dma(struct dma_channel *chan)
free_irq(get_dmte_irq(chan->chan), chan);
}
static void
static int
sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
{
if (!chcr)
......@@ -119,6 +111,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
ctrl_outl(chcr, CHCR[chan->chan]);
chan->flags |= DMA_CONFIGURED;
return 0;
}
static void sh_dmac_enable_dma(struct dma_channel *chan)
......@@ -262,17 +255,11 @@ static int __init sh_dmac_init(void)
int i;
#ifdef CONFIG_CPU_SH4
make_ipr_irq(dmae_ipr_map, ARRAY_SIZE(dmae_ipr_map));
i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
if (unlikely(i < 0))
return i;
#endif
i = info->nr_channels;
if (i > ARRAY_SIZE(dmte_ipr_map))
i = ARRAY_SIZE(dmte_ipr_map);
make_ipr_irq(dmte_ipr_map, i);
/*
* Initialize DMAOR, and clean up any error flags that may have
* been set.
......
/*
* Generic heartbeat driver for regular LED banks
*
* Copyright (C) 2007 Paul Mundt
*
* Most SH reference boards include a number of individual LEDs that can
* be independently controlled (either via a pre-defined hardware
* function or via the LED class, if desired -- the hardware tends to
* encapsulate some of the same "triggers" that the LED class supports,
* so there's not too much value in it).
*
* Additionally, most of these boards also have a LED bank that we've
* traditionally used for strobing the load average. This use case is
* handled by this driver, rather than giving each LED bit position its
* own struct device.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/io.h>
#define DRV_NAME "heartbeat"
#define DRV_VERSION "0.1.0"
struct heartbeat_data {
void __iomem *base;
unsigned char bit_pos[8];
struct timer_list timer;
};
static void heartbeat_timer(unsigned long data)
{
struct heartbeat_data *hd = (struct heartbeat_data *)data;
static unsigned bit = 0, up = 1;
ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base);
if (up)
if (bit == (ARRAY_SIZE(hd->bit_pos) - 1)) {
bit--;
up = 0;
} else
bit++;
else if (bit == 0)
up = 1;
else
bit--;
mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) /
((avenrun[0] / 5) + (3 << FSHIFT)))));
}
static int heartbeat_drv_probe(struct platform_device *pdev)
{
struct resource *res;
struct heartbeat_data *hd;
if (unlikely(pdev->num_resources != 1)) {
dev_err(&pdev->dev, "invalid number of resources\n");
return -EINVAL;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (unlikely(res == NULL)) {
dev_err(&pdev->dev, "invalid resource\n");
return -EINVAL;
}
hd = kmalloc(sizeof(struct heartbeat_data), GFP_KERNEL);
if (unlikely(!hd))
return -ENOMEM;
if (pdev->dev.platform_data) {
memcpy(hd->bit_pos, pdev->dev.platform_data,
ARRAY_SIZE(hd->bit_pos));
} else {
int i;
for (i = 0; i < ARRAY_SIZE(hd->bit_pos); i++)
hd->bit_pos[i] = i;
}
hd->base = (void __iomem *)res->start;
setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd);
platform_set_drvdata(pdev, hd);
return mod_timer(&hd->timer, jiffies + 1);
}
static int heartbeat_drv_remove(struct platform_device *pdev)
{
struct heartbeat_data *hd = platform_get_drvdata(pdev);
del_timer_sync(&hd->timer);
platform_set_drvdata(pdev, NULL);
kfree(hd);
return 0;
}
static struct platform_driver heartbeat_driver = {
.probe = heartbeat_drv_probe,
.remove = heartbeat_drv_remove,
.driver = {
.name = DRV_NAME,
},
};
static int __init heartbeat_init(void)
{
printk(KERN_NOTICE DRV_NAME ": version %s loaded\n", DRV_VERSION);
return platform_driver_register(&heartbeat_driver);
}
static void __exit heartbeat_exit(void)
{
platform_driver_unregister(&heartbeat_driver);
}
module_init(heartbeat_init);
module_exit(heartbeat_exit);
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR("Paul Mundt");
MODULE_LICENSE("GPLv2");
......@@ -12,7 +12,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
dma-dreamcast.o
obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
......
/*
* linux/arch/sh/drivers/pci/ops-bigsur.c
*
* By Dustin McIntire (dustin@sensoria.com) (c)2001
*
* Ported to new API by Paul Mundt <lethal@linux-sh.org>.
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* PCI initialization for the Hitachi Big Sur Evaluation Board
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/io.h>
#include "pci-sh4.h"
#include <asm/bigsur/bigsur.h>
#define BIGSUR_PCI_IO 0x4000
#define BIGSUR_PCI_MEM 0xfd000000
static struct resource sh7751_io_resource = {
.name = "SH7751 IO",
.start = BIGSUR_PCI_IO,
.end = BIGSUR_PCI_IO + (64*1024) - 1,
.flags = IORESOURCE_IO,
};
static struct resource sh7751_mem_resource = {
.name = "SH7751 mem",
.start = BIGSUR_PCI_MEM,
.end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
.flags = IORESOURCE_MEM,
};
extern struct pci_ops sh7751_pci_ops;
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
{ 0, }
};
static struct sh4_pci_address_map sh7751_pci_map = {
.window0 = {
.base = SH7751_CS3_BASE_ADDR,
.size = BIGSUR_LSR0_SIZE,
},
.window1 = {
.base = SH7751_CS3_BASE_ADDR,
.size = BIGSUR_LSR1_SIZE,
},
};
/*
* Initialize the Big Sur PCI interface
* Setup hardware to be Central Funtion
* Copy the BSR regs to the PCI interface
* Setup PCI windows into local RAM
*/
int __init pcibios_init_platform(void)
{
return sh7751_pcic_init(&sh7751_pci_map);
}
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
/*
* The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
* interface is on the wrong end of the board so that it can also
* support a V320 CPI interface chip... Therefor the IRQ mapping is
* somewhat use dependent... I'l assume a linear map for now, i.e.
* INTA=slot0,pin0... INTD=slot3,pin0...
*/
int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
slot, pin-1+'A', irq);
return irq;
}
......@@ -157,15 +157,6 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
PCIBIOS_MIN_IO, (64 << 10),
SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
/*
* XXX: For now, leave this board-specific. In the event we have other
* boards that need to do similar work, this can be wrapped.
*/
#ifdef CONFIG_SH_BIGSUR
bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
#endif
/* Make sure the MSB's of IO window are set to access PCI space
* correctly */
word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;
......
......@@ -6,7 +6,8 @@ extra-y := head.o init_task.o vmlinux.lds
obj-y := process.o signal.o traps.o irq.o \
ptrace.o setup.o time.o sys_sh.o semaphore.o \
io.o io_generic.o sh_ksyms.o syscalls.o
io.o io_generic.o sh_ksyms.o syscalls.o \
debugtraps.o
obj-y += cpu/ timers/
obj-$(CONFIG_VSYSCALL) += vsyscall/
......
......@@ -3,7 +3,7 @@
*
* CPU init code
*
* Copyright (C) 2002, 2003 Paul Mundt
* Copyright (C) 2002 - 2006 Paul Mundt
* Copyright (C) 2003 Richard Curnow
*
* This file is subject to the terms and conditions of the GNU General Public
......@@ -12,6 +12,8 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <asm/mmu_context.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/page.h>
......@@ -46,7 +48,7 @@ static void __init cache_init(void)
{
unsigned long ccr, flags;
if (cpu_data->type == CPU_SH_NONE)
if (current_cpu_data.type == CPU_SH_NONE)
panic("Unknown CPU");
jump_to_P2();
......@@ -66,7 +68,7 @@ static void __init cache_init(void)
if (ccr & CCR_CACHE_ENABLE) {
unsigned long ways, waysize, addrstart;
waysize = cpu_data->dcache.sets;
waysize = current_cpu_data.dcache.sets;
#ifdef CCR_CACHE_ORA
/*
......@@ -77,7 +79,7 @@ static void __init cache_init(void)
waysize >>= 1;
#endif
waysize <<= cpu_data->dcache.entry_shift;
waysize <<= current_cpu_data.dcache.entry_shift;
#ifdef CCR_CACHE_EMODE
/* If EMODE is not set, we only have 1 way to flush. */
......@@ -85,7 +87,7 @@ static void __init cache_init(void)
ways = 1;
else
#endif
ways = cpu_data->dcache.ways;
ways = current_cpu_data.dcache.ways;
addrstart = CACHE_OC_ADDRESS_ARRAY;
do {
......@@ -93,10 +95,10 @@ static void __init cache_init(void)
for (addr = addrstart;
addr < addrstart + waysize;
addr += cpu_data->dcache.linesz)
addr += current_cpu_data.dcache.linesz)
ctrl_outl(0, addr);
addrstart += cpu_data->dcache.way_incr;
addrstart += current_cpu_data.dcache.way_incr;
} while (--ways);
}
......@@ -108,7 +110,7 @@ static void __init cache_init(void)
#ifdef CCR_CACHE_EMODE
/* Force EMODE if possible */
if (cpu_data->dcache.ways > 1)
if (current_cpu_data.dcache.ways > 1)
flags |= CCR_CACHE_EMODE;
else
flags &= ~CCR_CACHE_EMODE;
......@@ -125,10 +127,10 @@ static void __init cache_init(void)
#ifdef CONFIG_SH_OCRAM
/* Turn on OCRAM -- halve the OC */
flags |= CCR_CACHE_ORA;
cpu_data->dcache.sets >>= 1;
current_cpu_data.dcache.sets >>= 1;
cpu_data->dcache.way_size = cpu_data->dcache.sets *
cpu_data->dcache.linesz;
current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
current_cpu_data.dcache.linesz;
#endif
ctrl_outl(flags, CCR);
......@@ -170,7 +172,7 @@ static void __init dsp_init(void)
/* If the DSP bit is still set, this CPU has a DSP */
if (sr & SR_DSP)
cpu_data->flags |= CPU_HAS_DSP;
current_cpu_data.flags |= CPU_HAS_DSP;
/* Now that we've determined the DSP status, clear the DSP bit. */
release_dsp();
......@@ -202,22 +204,28 @@ asmlinkage void __init sh_cpu_init(void)
cache_init();
shm_align_mask = max_t(unsigned long,
cpu_data->dcache.way_size - 1,
current_cpu_data.dcache.way_size - 1,
PAGE_SIZE - 1);
/* Disable the FPU */
if (fpu_disabled) {
printk("FPU Disabled\n");
cpu_data->flags &= ~CPU_HAS_FPU;
current_cpu_data.flags &= ~CPU_HAS_FPU;
disable_fpu();
}
/* FPU initialization */
if ((cpu_data->flags & CPU_HAS_FPU)) {
if ((current_cpu_data.flags & CPU_HAS_FPU)) {
clear_thread_flag(TIF_USEDFPU);
clear_used_math();
}
/*
* Initialize the per-CPU ASID cache very early, since the
* TLB flushing routines depend on this being setup.
*/
current_cpu_data.asid_cache = NO_CONTEXT;
#ifdef CONFIG_SH_DSP
/* Probe for DSP */
dsp_init();
......@@ -225,7 +233,7 @@ asmlinkage void __init sh_cpu_init(void)
/* Disable the DSP */
if (dsp_disabled) {
printk("DSP Disabled\n");
cpu_data->flags &= ~CPU_HAS_DSP;
current_cpu_data.flags &= ~CPU_HAS_DSP;
release_dsp();
}
#endif
......@@ -240,4 +248,3 @@ asmlinkage void __init sh_cpu_init(void)
ubc_wakeup();
#endif
}
......@@ -43,16 +43,29 @@ static struct irq_chip ipr_irq_chip = {
.mask_ack = disable_ipr_irq,
};
unsigned int map_ipridx_to_addr(int idx) __attribute__ ((weak));
unsigned int map_ipridx_to_addr(int idx)
{
return 0;
}
void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
{
int i;
for (i = 0; i < nr_irqs; i++) {
unsigned int irq = table[i].irq;
table[i].addr = map_ipridx_to_addr(table[i].ipr_idx);
if (!irq)
irq = table[i].irq = i;
/* could the IPR index be mapped, if not we ignore this */
if (table[i].addr == 0)
continue;
if (!table[i].addr) {
table[i].addr = map_ipridx_to_addr(table[i].ipr_idx);
if (!table[i].addr)
continue;
}
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
handle_level_irq, "level");
......
......@@ -178,12 +178,10 @@ interrupt_entry:
8: .long do_exception_error
trap_entry:
/* verbose BUG trapa entry check */
mov #0x3e,r8
cmp/ge r8,r9
bf/s 1f
add #-0x10,r9
add #0x10,r9
mov #0x30,r8
cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
bt 1f
add #-0x10,r9 ! convert SH2 to SH3/4 ABI
1:
shll2 r9 ! TRA
mov #OFF_TRA,r8
......@@ -206,7 +204,7 @@ trap_entry:
#if defined(CONFIG_SH_STANDARD_BIOS)
/* Unwind the stack and jmp to the debug entry */
debug_kernel_fw:
ENTRY(sh_bios_handler)
mov r15,r0
add #(22-4)*4-4,r0
ldc.l @r0+,gbr
......
......@@ -18,27 +18,27 @@
int __init detect_cpu_and_cache_system(void)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7604)
cpu_data->type = CPU_SH7604;
cpu_data->dcache.ways = 4;
cpu_data->dcache.way_incr = (1<<10);
cpu_data->dcache.sets = 64;
cpu_data->dcache.entry_shift = 4;
cpu_data->dcache.linesz = L1_CACHE_BYTES;
cpu_data->dcache.flags = 0;
current_cpu_data.type = CPU_SH7604;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1<<10);
current_cpu_data.dcache.sets = 64;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
cpu_data->type = CPU_SH7619;
cpu_data->dcache.ways = 4;
cpu_data->dcache.way_incr = (1<<12);
cpu_data->dcache.sets = 256;
cpu_data->dcache.entry_shift = 4;
cpu_data->dcache.linesz = L1_CACHE_BYTES;
cpu_data->dcache.flags = 0;
current_cpu_data.type = CPU_SH7619;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1<<12);
current_cpu_data.dcache.sets = 256;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
#endif
/*
* SH-2 doesn't have separate caches
*/
cpu_data->dcache.flags |= SH_CACHE_COMBINED;
cpu_data->icache = cpu_data->dcache;
current_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
current_cpu_data.icache = current_cpu_data.dcache;
return 0;
}
......
......@@ -52,42 +52,38 @@ static int __init sh7619_devices_setup(void)
}
__initcall(sh7619_devices_setup);
#define INTC_IPRC 0xf8080000UL
#define INTC_IPRD 0xf8080002UL
#define CMI0_IRQ 86
#define SCIF0_ERI_IRQ 88
#define SCIF0_RXI_IRQ 89
#define SCIF0_BRI_IRQ 90
#define SCIF0_TXI_IRQ 91
#define SCIF1_ERI_IRQ 92
#define SCIF1_RXI_IRQ 93
#define SCIF1_BRI_IRQ 94
#define SCIF1_TXI_IRQ 95
#define SCIF2_BRI_IRQ 96
#define SCIF2_ERI_IRQ 97
#define SCIF2_RXI_IRQ 98
#define SCIF2_TXI_IRQ 99
static struct ipr_data sh7619_ipr_map[] = {
{ CMI0_IRQ, INTC_IPRC, 1, 2 },
{ SCIF0_ERI_IRQ, INTC_IPRD, 3, 3 },
{ SCIF0_RXI_IRQ, INTC_IPRD, 3, 3 },
{ SCIF0_BRI_IRQ, INTC_IPRD, 3, 3 },
{ SCIF0_TXI_IRQ, INTC_IPRD, 3, 3 },
{ SCIF1_ERI_IRQ, INTC_IPRD, 2, 3 },
{ SCIF1_RXI_IRQ, INTC_IPRD, 2, 3 },
{ SCIF1_BRI_IRQ, INTC_IPRD, 2, 3 },
{ SCIF1_TXI_IRQ, INTC_IPRD, 2, 3 },
{ SCIF2_ERI_IRQ, INTC_IPRD, 1, 3 },
{ SCIF2_RXI_IRQ, INTC_IPRD, 1, 3 },
{ SCIF2_BRI_IRQ, INTC_IPRD, 1, 3 },
{ SCIF2_TXI_IRQ, INTC_IPRD, 1, 3 },
{ 86, 0, 4, 2 }, /* CMI0 */
{ 88, 1, 12, 3 }, /* SCIF0_ERI */
{ 89, 1, 12, 3 }, /* SCIF0_RXI */
{ 90, 1, 12, 3 }, /* SCIF0_BRI */
{ 91, 1, 12, 3 }, /* SCIF0_TXI */
{ 92, 1, 8, 3 }, /* SCIF1_ERI */
{ 93, 1, 8, 3 }, /* SCIF1_RXI */
{ 94, 1, 8, 3 }, /* SCIF1_BRI */
{ 95, 1, 8, 3 }, /* SCIF1_TXI */
{ 96, 1, 4, 3 }, /* SCIF2_ERI */
{ 97, 1, 4, 3 }, /* SCIF2_RXI */
{ 98, 1, 4, 3 }, /* SCIF2_BRI */
{ 99, 1, 4, 3 }, /* SCIF2_TXI */
};
static unsigned int ipr_offsets[] = {
0xf8080000, /* IPRC */
0xf8080002, /* IPRD */
0xf8080004, /* IPRE */
0xf8080006, /* IPRF */
0xf8080008, /* IPRG */
};
/* given the IPR index return the address of the IPR register */
unsigned int map_ipridx_to_addr(int idx)
{
if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
return 0;
return ipr_offsets[idx];
}
void __init init_IRQ_ipr(void)
{
make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
......
......@@ -17,14 +17,14 @@
int __init detect_cpu_and_cache_system(void)
{
/* Just SH7206 for now .. */
cpu_data->type = CPU_SH7206;
current_cpu_data.type = CPU_SH7206;
cpu_data->dcache.ways = 4;
cpu_data->dcache.way_incr = (1 << 11);
cpu_data->dcache.sets = 128;
cpu_data->dcache.entry_shift = 4;
cpu_data->dcache.linesz = L1_CACHE_BYTES;
cpu_data->dcache.flags = 0;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1 << 11);
current_cpu_data.dcache.sets = 128;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
/*
* The icache is the same as the dcache as far as this setup is
......@@ -32,7 +32,7 @@ int __init detect_cpu_and_cache_system(void)
* lacks the U bit that the dcache has, none of this has any bearing
* on the cache info.
*/
cpu_data->icache = cpu_data->dcache;
current_cpu_data.icache = current_cpu_data.dcache;
return 0;
}
......
This diff is collapsed.
This diff is collapsed.
......@@ -50,41 +50,41 @@ int __init detect_cpu_and_cache_system(void)
back_to_P1();
cpu_data->dcache.ways = 4;
cpu_data->dcache.entry_shift = 4;
cpu_data->dcache.linesz = L1_CACHE_BYTES;
cpu_data->dcache.flags = 0;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
/*
* 7709A/7729 has 16K cache (256-entry), while 7702 has only
* 2K(direct) 7702 is not supported (yet)
*/
if (data0 == data1 && data2 == data3) { /* Shadow */
cpu_data->dcache.way_incr = (1 << 11);
cpu_data->dcache.entry_mask = 0x7f0;
cpu_data->dcache.sets = 128;
cpu_data->type = CPU_SH7708;
current_cpu_data.dcache.way_incr = (1 << 11);
current_cpu_data.dcache.entry_mask = 0x7f0;
current_cpu_data.dcache.sets = 128;
current_cpu_data.type = CPU_SH7708;
cpu_data->flags |= CPU_HAS_MMU_PAGE_ASSOC;
current_cpu_data.flags |= CPU_HAS_MMU_PAGE_ASSOC;
} else { /* 7709A or 7729 */
cpu_data->dcache.way_incr = (1 << 12);
cpu_data->dcache.entry_mask = 0xff0;
cpu_data->dcache.sets = 256;
cpu_data->type = CPU_SH7729;
current_cpu_data.dcache.way_incr = (1 << 12);
current_cpu_data.dcache.entry_mask = 0xff0;
current_cpu_data.dcache.sets = 256;
current_cpu_data.type = CPU_SH7729;
#if defined(CONFIG_CPU_SUBTYPE_SH7706)
cpu_data->type = CPU_SH7706;
current_cpu_data.type = CPU_SH7706;
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7710)
cpu_data->type = CPU_SH7710;
current_cpu_data.type = CPU_SH7710;
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
cpu_data->type = CPU_SH7705;
current_cpu_data.type = CPU_SH7705;
#if defined(CONFIG_SH7705_CACHE_32KB)
cpu_data->dcache.way_incr = (1 << 13);
cpu_data->dcache.entry_mask = 0x1ff0;
cpu_data->dcache.sets = 512;
current_cpu_data.dcache.way_incr = (1 << 13);
current_cpu_data.dcache.entry_mask = 0x1ff0;
current_cpu_data.dcache.sets = 512;
ctrl_outl(CCR_CACHE_32KB, CCR3);
#else
ctrl_outl(CCR_CACHE_16KB, CCR3);
......@@ -95,8 +95,8 @@ int __init detect_cpu_and_cache_system(void)
/*
* SH-3 doesn't have separate caches
*/
cpu_data->dcache.flags |= SH_CACHE_COMBINED;
cpu_data->icache = cpu_data->dcache;
current_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
current_cpu_data.icache = current_cpu_data.dcache;
return 0;
}
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
......@@ -105,7 +105,6 @@ EXPORT_SYMBOL(__flush_purge_region);
EXPORT_SYMBOL(clear_user_page);
#endif
EXPORT_SYMBOL(flush_tlb_page);
EXPORT_SYMBOL(__down_trylock);
#ifdef CONFIG_SMP
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
include include/asm-generic/Kbuild.asm
header-y += cpu-features.h
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment