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Commit fc244e3a authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'v4.14-rockchip-dts32-1' of... 

Merge tag 'v4.14-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts32 changes for 4.14" from Heiko Stübner:

Removal of the deprectated num-slots property from all Rockchip dw-mmc
nodes. The rv1108 gains support for sd-cards on the evaluation board and
the general nodes get a bit of cosmetic. On rk3288 the evb gains support
saradc and the adc-key connected to it while some more boards also get
their mali gpu enabled (fennec, evb, tinker).

The biggest set of changes can be found on the rk3228/rk3229 combo this
time. It gets core support for efuse, sdmmc, sdio, io-domans and spdif
as well as a separate rk3229.dtsi that will keep the slight differences
between the two brothers rk3228/rk3229. The evaluation board also gets
some attention and abled nodes (regulators, io-domains, emmc, tsadc keys)

But I think the most interesting change is the cpu enable-method for it.
Instead of using the older in-kernel method, we're now also moving to
handling this in firmware via the psci interface on 32bit Rockchip socs.
In a recently merged pull request [0] support for the rk3228/rk3229 was
added to OP-TEE including the psci support and it seems supporting other
32bit Rockchip socs that way is also planned for the future.

[0] https://github.com/OP-TEE/optee_os/pull/1666

* tag 'v4.14-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (23 commits)
  ARM: dts: rockchip: fix property-ordering in rv1108 mmc nodes
  ARM: dts: rockchip: enable sdmmc for rv1108 evb
  ARM: dts: rockchip: add efuse device node for rk3228
  ARM: dts: rockchip: add gpio power-key for rk3229-evb
  ARM: dts: rockchip: enable tsadc for rk3229-evb
  ARM: dts: rockchip: enable eMMC for rk3229-evb
  ARM: dts: rockchip: enable io-domain for rk3229-evb
  ARM: dts: rockchip: add cpu-supply property for cpu node of rk3229-evb
  ARM: dts: rockchip: add regulator nodes for rk3229-evb
  ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC
  ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC
  ARM: dts: rockchip: add cpu enable method for rk3228 SoC
  ARM: dts: rockchip: remove num-slots from all platforms
  ARM: dts: rockchip: Add io-domain node for rk3228
  ARM: dts: rockchip: add basic dtsi file for RK3229 SoC
  ARM: dts: rockchip: enable adc key for rk3288-evb
  ARM: dts: rockchip: enable saradc for rk3288-evb
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-fennec
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-evb
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-tinker
  ...
parents f7ec9146 0f4dc7e1
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Showing with 401 additions and 49 deletions
arch/arm/boot/dts/rk3036-kylin.dts
View file @ fc244e3a
......@@ -357,7 +357,6 @@ &sdio {
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
sd-uhs-sdr12;
......@@ -372,7 +371,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
};
......
arch/arm/boot/dts/rk3036.dtsi
View file @ fc244e3a
......@@ -287,7 +287,6 @@ emmc: dwmmc@1021c000 {
fifo-depth = <0x100>;
mmc-ddr-1_8v;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
resets = <&cru SRST_EMMC>;
......@@ -599,7 +598,7 @@ sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>;
};
sdmmc_cd: sdmcc-cd {
sdmmc_cd: sdmmc-cd {
rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>;
};
......
arch/arm/boot/dts/rk3066a-bqcurie2.dts
View file @ fc244e3a
......@@ -190,7 +190,6 @@ vcc28_cif: regulator@12 {
#include "tps65910.dtsi"
&mmc0 { /* sdmmc */
num-slots = <1>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
......@@ -202,7 +201,6 @@ &mmc0 { /* sdmmc */
};
&mmc1 { /* wifi */
num-slots = <1>;
status = "okay";
non-removable;
......
arch/arm/boot/dts/rk3066a-mk808.dts
View file @ fc244e3a
......@@ -132,7 +132,6 @@ &mmc0 {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
num-slots = <1>;
vmmc-supply = <&vcc_sd>;
status = "okay";
};
......@@ -141,7 +140,6 @@ &mmc1 {
bus-width = <4>;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>;
pinctrl-names = "default";
vmmc-supply = <&vcc_wifi>;
......
arch/arm/boot/dts/rk3066a-rayeager.dts
View file @ fc244e3a
......@@ -185,7 +185,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_rst>;
vmmc-supply = <&vcc_emmc>;
......@@ -336,7 +335,6 @@ &i2c4 {
&mmc0 {
bus-width = <4>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
vmmc-supply = <&vcc_sd>;
......@@ -349,7 +347,6 @@ &mmc1 {
bus-width = <4>;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>;
vmmc-supply = <&vccio_wl>;
......
arch/arm/boot/dts/rk3188-px3-evb.dts
View file @ fc244e3a
......@@ -89,7 +89,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_rst>;
status = "okay";
......@@ -256,7 +255,6 @@ gsl1680: touchscreen@40 {
};
&mmc0 {
num-slots = <1>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
......
arch/arm/boot/dts/rk3188-radxarock.dts
View file @ fc244e3a
......@@ -296,7 +296,6 @@ vcc28: REG12 {
};
&mmc0 {
num-slots = <1>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
......
arch/arm/boot/dts/rk3229-evb.dts
View file @ fc244e3a
......@@ -40,7 +40,8 @@
/dts-v1/;
#include "rk322x.dtsi"
#include <dt-bindings/input/input.h>
#include "rk3229.dtsi"
/ {
model = "Rockchip RK3229 Evaluation board";
......@@ -51,6 +52,15 @@ memory@60000000 {
reg = <0x60000000 0x40000000>;
};
dc_12v: dc-12v-regulator {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
ext_gmac: ext_gmac {
compatible = "fixed-clock";
clock-frequency = <125000000>;
......@@ -67,6 +77,7 @@ vcc_host: vcc-host-regulator {
regulator-name = "vcc_host";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
vcc_phy: vcc-phy-regulator {
......@@ -77,9 +88,98 @@ vcc_phy: vcc-phy-regulator {
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vccio_1v8>;
};
vcc_sys: vcc-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vccio_1v8: vccio-1v8-regulator {
compatible = "regulator-fixed";
regulator-name = "vccio_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
vin-supply = <&vcc_sys>;
};
vccio_3v3: vccio-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "vccio_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&vcc_sys>;
};
vdd_arm: vdd-arm-regulator {
compatible = "pwm-regulator";
pwms = <&pwm1 0 25000 1>;
pwm-supply = <&vcc_sys>;
regulator-name = "vdd_arm";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
regulator-boot-on;
};
vdd_log: vdd-log-regulator {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
pwm-supply = <&vcc_sys>;
regulator-name = "vdd_log";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
};
gpio_keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&pwr_key>;
power_key: power-key {
label = "GPIO Key Power";
gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <100>;
wakeup-source;
};
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&cpu1 {
cpu-supply = <&vdd_arm>;
};
&cpu2 {
cpu-supply = <&vdd_arm>;
};
&cpu3 {
cpu-supply = <&vdd_arm>;
};
&emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_MAC_EXTCLK>, <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>, <&cru SCLK_MAC_EXTCLK>;
......@@ -96,7 +196,21 @@ &gmac {
status = "okay";
};
&io_domains {
status = "okay";
vccio1-supply = <&vccio_3v3>;
vccio2-supply = <&vccio_1v8>;
vccio4-supply = <&vccio_3v3>;
};
&pinctrl {
keys {
pwr_key: pwr-key {
rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
......@@ -104,6 +218,19 @@ host_vbus_drv: host-vbus-drv {
};
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
status = "okay";
};
&uart2 {
status = "okay";
};
......
arch/arm/boot/dts/rk3229.dtsi 0 → 100644
View file @ fc244e3a
/*
* Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "rk322x.dtsi"
/ {
compatible = "rockchip,rk3229";
/delete-node/ opp-table0;
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <950000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <975000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1000000>;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1175000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1275000>;
};
opp-1296000000 {
opp-hz = /bits/ 64 <1296000000>;
opp-microvolt = <1325000>;
};
opp-1392000000 {
opp-hz = /bits/ 64 <1392000000>;
opp-microvolt = <1375000>;
};
opp-1464000000 {
opp-hz = /bits/ 64 <1464000000>;
opp-microvolt = <1400000>;
};
};
};
arch/arm/boot/dts/rk322x.dtsi
View file @ fc244e3a
......@@ -70,6 +70,7 @@ cpu0: cpu@f00 {
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
enable-method = "psci";
};
cpu1: cpu@f01 {
......@@ -78,6 +79,7 @@ cpu1: cpu@f01 {
reg = <0xf01>;
resets = <&cru SRST_CORE1>;
operating-points-v2 = <&cpu0_opp_table>;
enable-method = "psci";
};
cpu2: cpu@f02 {
......@@ -86,6 +88,7 @@ cpu2: cpu@f02 {
reg = <0xf02>;
resets = <&cru SRST_CORE2>;
operating-points-v2 = <&cpu0_opp_table>;
enable-method = "psci";
};
cpu3: cpu@f03 {
......@@ -94,6 +97,7 @@ cpu3: cpu@f03 {
reg = <0xf03>;
resets = <&cru SRST_CORE3>;
operating-points-v2 = <&cpu0_opp_table>;
enable-method = "psci";
};
};
......@@ -151,6 +155,11 @@ arm-pmu {
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv7-timer";
arm,cpu-registers-not-fw-configured;
......@@ -196,6 +205,19 @@ i2s0: i2s0@100c0000 {
status = "disabled";
};
spdif: spdif@100d0000 {
compatible = "rockchip,rk3228-spdif";
reg = <0x100d0000 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
clock-names = "mclk", "hclk";
dmas = <&pdma 10>;
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx>;
status = "disabled";
};
i2s2: i2s2@100e0000 {
compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
reg = <0x100e0000 0x4000>;
......@@ -215,6 +237,11 @@ grf: syscon@11000000 {
#address-cells = <1>;
#size-cells = <1>;
io_domains: io-domains {
compatible = "rockchip,rk3228-io-voltage-domain";
status = "disabled";
};
u2phy0: usb2-phy@760 {
compatible = "rockchip,rk3228-usb2phy";
reg = <0x0760 0x0c>;
......@@ -309,6 +336,23 @@ uart2: serial@11030000 {
status = "disabled";
};
efuse: efuse@11040000 {
compatible = "rockchip,rk3228-efuse";
reg = <0x11040000 0x20>;
clocks = <&cru PCLK_EFUSE_256>;
clock-names = "pclk_efuse";
#address-cells = <1>;
#size-cells = <1>;
/* Data cells */
efuse_id: id@7 {
reg = <0x7 0x10>;
};
cpu_leakage: cpu_leakage@17 {
reg = <0x17 0x1>;
};
};
i2c0: i2c@11050000 {
compatible = "rockchip,rk3228-i2c";
reg = <0x11050000 0x1000>;
......@@ -500,8 +544,34 @@ tsadc: tsadc@11150000 {
status = "disabled";
};
sdmmc: dwmmc@30000000 {
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30000000 0x4000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
status = "disabled";
};
sdio: dwmmc@30010000 {
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30010000 0x4000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
status = "disabled";
};
emmc: dwmmc@30020000 {
compatible = "rockchip,rk3288-dw-mshc";
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30020000 0x4000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <37500000>;
......@@ -511,7 +581,6 @@ emmc: dwmmc@30020000 {
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
bus-width = <8>;
default-sample-phase = <158>;
num-slots = <1>;
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
......@@ -710,6 +779,40 @@ pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
drive-strength = <12>;
};
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none_drv_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <1 RK_PB7 1 &pcfg_pull_none_drv_12ma>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <1 RK_PC2 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC3 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC4 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC5 1 &pcfg_pull_none_drv_12ma>;
};
};
sdio {
sdio_clk: sdio-clk {
rockchip,pins = <3 RK_PA0 1 &pcfg_pull_none_drv_12ma>;
};
sdio_cmd: sdio-cmd {
rockchip,pins = <3 RK_PA1 1 &pcfg_pull_none_drv_12ma>;
};
sdio_bus4: sdio-bus4 {
rockchip,pins = <3 RK_PA2 1 &pcfg_pull_none_drv_12ma>,
<3 RK_PA3 1 &pcfg_pull_none_drv_12ma>,
<3 RK_PA4 1 &pcfg_pull_none_drv_12ma>,
<3 RK_PA5 1 &pcfg_pull_none_drv_12ma>;
};
};
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
......@@ -835,6 +938,12 @@ pwm3_pin: pwm3-pin {
};
};
spdif {
spdif_tx: spdif-tx {
rockchip,pins = <3 31 RK_FUNC_2 &pcfg_pull_none>;
};
};
tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>;
......
arch/arm/boot/dts/rk3288-evb.dtsi
View file @ fc244e3a
......@@ -48,6 +48,43 @@ memory@0 {
reg = <0x0 0x80000000>;
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
button-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <100000>;
};
button-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <300000>;
};
menu {
label = "Menu";
linux,code = <KEY_MENU>;
press-threshold-microvolt = <640000>;
};
esc {
label = "Esc";
linux,code = <KEY_ESC>;
press-threshold-microvolt = <1000000>;
};
home {
label = "Home";
linux,code = <KEY_HOME>;
press-threshold-microvolt = <1300000>;
};
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <
......@@ -212,19 +249,22 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
status = "okay";
};
&saradc {
vref-supply = <&vcc_18>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp; /* wp not hooked up */
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
......@@ -248,6 +288,11 @@ &gmac {
status = "ok";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
......
arch/arm/boot/dts/rk3288-fennec.dts
View file @ fc244e3a
......@@ -77,7 +77,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
status = "okay";
......@@ -99,6 +98,11 @@ &gmac {
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi {
status = "okay";
};
......
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
View file @ fc244e3a
......@@ -78,7 +78,6 @@ &emmc {
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
vmmc-supply = <&vcc_io>;
......
arch/arm/boot/dts/rk3288-firefly-reload.dts
View file @ fc244e3a
......@@ -269,7 +269,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
vmmc-supply = <&vcc_sd>;
......@@ -284,7 +283,6 @@ &sdio0 {
disable-wp;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
sd-uhs-sdr12;
......
arch/arm/boot/dts/rk3288-firefly.dtsi
View file @ fc244e3a
......@@ -208,7 +208,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
vmmc-supply = <&vcc_io>;
......@@ -527,7 +526,6 @@ &sdio0 {
bus-width = <4>;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>;
vmmc-supply = <&vbat_wl>;
......@@ -541,7 +539,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
vmmc-supply = <&vcc_sd>;
......
arch/arm/boot/dts/rk3288-miqi.dts
View file @ fc244e3a
......@@ -126,7 +126,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
vmmc-supply = <&vcc_io>;
......@@ -404,7 +403,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
vmmc-supply = <&vcc_sd>;
......
arch/arm/boot/dts/rk3288-phycore-rdk.dts
View file @ fc244e3a
......@@ -263,7 +263,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
vmmc-supply = <&vdd_io_sd>;
......
arch/arm/boot/dts/rk3288-phycore-som.dtsi
View file @ fc244e3a
......@@ -136,7 +136,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
vmmc-supply = <&vdd_3v3_io>;
......
arch/arm/boot/dts/rk3288-popmetal.dts
View file @ fc244e3a
......@@ -150,7 +150,6 @@ &emmc {
mmc-ddr-1_8v;
mmc-hs200-1_8v;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
vmmc-supply = <&vcc_io>;
......@@ -164,7 +163,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp; /* wp not hooked up */
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
sd-uhs-sdr12;
......
arch/arm/boot/dts/rk3288-r89.dts
View file @ fc244e3a
......@@ -354,7 +354,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
vmmc-supply = <&vcc_sdmmc>;
......
arch/arm/boot/dts/rk3288-rock2-som.dtsi
View file @ fc244e3a
......@@ -89,7 +89,6 @@ &emmc {
cap-mmc-highspeed;
disable-wp;
non-removable;
num-slots = <1>;
mmc-pwrseq = <&emmc_pwrseq>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
......
arch/arm/boot/dts/rk3288-rock2-square.dts
View file @ fc244e3a
......@@ -147,7 +147,6 @@ &sdio0 {
disable-wp;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
vmmc-supply = <&vcc_io>;
......@@ -161,7 +160,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp; /* wp not hooked up */
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
vmmc-supply = <&vcc_sd>;
......
arch/arm/boot/dts/rk3288-tinker.dts
View file @ fc244e3a
......@@ -156,6 +156,11 @@ &gmac {
status = "ok";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
......@@ -465,7 +470,6 @@ &sdmmc {
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp; /* wp not hooked up */
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
......
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
View file @ fc244e3a
......@@ -117,7 +117,6 @@ &sdmmc {
card-detect-delay = <200>;
cd-gpios = <&gpio7 RK_PA5 GPIO_ACTIVE_LOW>;
rockchip,default-sample-phase = <90>;
num-slots = <1>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
......
arch/arm/boot/dts/rk3288-veyron.dtsi
View file @ fc244e3a
......@@ -156,7 +156,6 @@ &emmc {
mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
};
......@@ -372,7 +371,6 @@ &sdio0 {
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
sd-uhs-sdr12;
......
arch/arm/boot/dts/rv1108-evb.dts
View file @ fc244e3a
......@@ -56,6 +56,10 @@ chosen {
};
};
&sdmmc {
status = "okay";
};
&uart0 {
status = "okay";
};
......
arch/arm/boot/dts/rv1108.dtsi
View file @ fc244e3a
......@@ -174,37 +174,39 @@ cru: clock-controller@20200000 {
emmc: dwmmc@30110000 {
compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 150000000>;
reg = <0x30110000 0x4000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x30110000 0x4000>;
max-frequency = <150000000>;
status = "disabled";
};
sdio: dwmmc@30120000 {
compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 150000000>;
reg = <0x30120000 0x4000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x30120000 0x4000>;
max-frequency = <150000000>;
status = "disabled";
};
sdmmc: dwmmc@30130000 {
compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
clock-freq-min-max = <400000 100000000>;
reg = <0x30130000 0x4000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x30130000 0x4000>;
max-frequency = <100000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "disabled";
};
......
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