- 18 Mar, 2013 1 commit
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Ben Widawsky authored
Signed-off-by:
Ben Widawsky <ben@bwidawsk.net> Acked-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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- 17 Mar, 2013 9 commits
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Chris Wilson authored
Once we thought we got semaphores working, we disabled kicking the ring if hangcheck fired whilst waiting upon a ring as it was doing more harm than good: commit 4e0e90dc Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Wed Dec 14 13:56:58 2011 +0100 drm/i915: kicking rings stuck on semaphores considered harmful However, life is never that easy and semaphores are still causing problems whereby the value written by one ring (bcs) is not being propagated to the waiter (rcs). Thus the waiter never wakes up and we declare the GPU hung, which often has unfortunate consequences, even if we successfully reset the GPU. But the GPU is idle as it has completed the work, just didn't notify its clients. So we can detect the incomplete wait during hang check and probe the target ring to see if has indeed emitted the breadcrumb seqno following the work and then and only then kick the waiter. Based on a suggestion by Ben Widawsky. v2: cross-check wait with iphdr. fix signaller calculation. References: https://bugs.freedesktop.org/show_bug.cgi?id=54226Signed-off-by:
Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ben Widawsky <ben@bwidawsk.net> Acked-by:
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Paulo Zanoni authored
To avoid this: [ 256.798060] [drm] capturing error event; look for more information in/sys/kernel/debug/dri/0/i915_error_state Ben Widawsky identified that this regression has been introduced in commit 2f86f191 Author: Ben Widawsky <ben@bwidawsk.net> Date: Mon Jan 28 15:32:15 2013 -0800 drm/i915: Error state should print /sys/kernel/debug ... [danvet: split up long line.] <----- he did it Signed-off-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:
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Paulo Zanoni authored
Because the register does not exist on LPT. The interesting fact is that reading/writing PCH_LVDS on LPT does *not* give us "unclaimed register" messages, but the register value is always 0. Signed-off-by:
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Paulo Zanoni authored
Now it returns false for all platforms unless they're explicitly listed on the function. There should be no real difference, except for the fact that it now returns false on Haswell. Signed-off-by:
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Paulo Zanoni authored
We're starting to add many IS_HASWELL checks for the power well code, so add a HAS_POWER_WELL macro to properly document that we're checking for hardware that has the power down well. Signed-off-by:
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Paulo Zanoni authored
So don't read it when we hang the GPU. This solves "unclaimed register" messages. Signed-off-by:
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Paulo Zanoni authored
So don't read it when capturing the error state. This solves some "unclaimed register" messages on Haswell when we hang the GPU. Signed-off-by:
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Paulo Zanoni authored
This solves some "unclaimed register" messages when there's a GPU hang on Haswell. Signed-off-by:
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Paulo Zanoni authored
Our mode set sequence documentation says audio must be disabled first. Signed-off-by:
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- 13 Mar, 2013 3 commits
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Jani Nikula authored
Even if "power power" is good for grepping. Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
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Kees Cook authored
This clarifies the comment above the access_ok check so a missing VERIFY_READ doesn't alarm anyone. v2: - rewrote comment, thanks to Chris Wilson Signed-off-by:
Kees Cook <keescook@chromium.org> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> [danvet: add patch history log to commit message.] Signed-off-by:
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Kees Cook authored
This replaces the manual read/write routines in debugfs with the common simple attribute helpers. Doing this gets rid of repeated copy/pasting of copy_from_user and value formatting code. Signed-off-by:
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- 11 Mar, 2013 1 commit
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Mihnea Dobrescu-Balaur authored
Signed-off-by:
Mihnea Dobrescu-Balaur <mihneadb@gmail.com> Signed-off-by:
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- 06 Mar, 2013 5 commits
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Jesse Barnes authored
Allows us to detect eDP panels that may not have the hotplug pin wired up. Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by:
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Jesse Barnes authored
It uses the same bit definitions. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jesse Barnes authored
Fix up a couple of places where we messed with PCH bits on VLV. Signed-off-by:
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Jesse Barnes authored
This was omitted from commit b7884eb4 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Jun 4 11:18:15 2012 +0200 drm/i915: hold forcewake around ring hw init which introduced the ->has_force_wake flag. Note that this only enables the above w/a hack. Signed-off-by:
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Jesse Barnes authored
Signed-off-by:
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- 05 Mar, 2013 1 commit
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Ben Widawsky authored
On error, this represents the state of the currently running context at the time it was loaded. Unfortunately, since we're hung and can't switch out the context this may not tell us too much about the most current state of the context, but does give clues about what has happened since loading. Thanks to recent doc updates, we have a little more confidence regarding what is actually in this memory, and perhaps it will help us gain more insight into certain bugs. AFAICT, the most interesting info is in the first page. To save space, we only capture the first page. In the future, we might want to dump more. Sample of the relevant part of error state: render ring --- HW Context = 0x01b20000 [0000] 00000000 1100105f 00002028 ffff0880 [0010] 0000209c feff4040 000020c0 efdf0080 [0020] 00002178 00000001 0000217c 00145855 [0030] 00002310 00000000 00002314 00000000 v2: Move error collection to the ring error code Change format of dump to not confuse intel_error_decode (Chris) Put the context error object with the others (Chris) Don't search bound_list instead of active_list (chris) v3: extract and flatten context recording (daniel) checkpatch related fixes for the copypasta in debugfs v4: bug in v3 (Daniel) - if ((ring->id == RCS) && error->ccid) + if ((ring->id != RCS) || !error->ccid) References: https://bugs.freedesktop.org/show_bug.cgi?id=55845 Reviewed-by (v2): Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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- 04 Mar, 2013 7 commits
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Paulo Zanoni authored
Bits used only on HDMI mode now have HDMI_ prefix instead of SDVO_. The COLOR_FORMAT bits now have prefixes (and the 12bpc bit is for HDMI only). Notice that this patch uncovers a bug on the SDVO code: the COLOR_RANGE_16_235 bit can only be used if the port is in TMDS mode, not SDVO mode. This will have to be fixed in a later patch. Signed-off-by:
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Paulo Zanoni authored
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Paulo Zanoni authored
Since they're all the same register, leave all the #defines at the same place, organized by Gen and also specify which bits are used by only a specific port or encoding. Also remove a few unused duplicates and adjust indentation. Signed-off-by:
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Paulo Zanoni authored
Some HDMI registers can be used for SDVO, so saying "HDMIB" should be the same as saying "SDVOB" for a given HW generation. This was not true and led to confusions and even a regression. Previously we had: - SDVO{B,C} defined as the Gen3+ registers - HDMI{B,C,D} and PCH_SDVOB defined as the PCH registers But now: - SDVO{B,C} became GEN3_SDVO{B,C} on SDVO code - SDVO{B,C} became GEN4_HDMI{B,C} on HDMI code - HDMI{B,C,D} became PCH_HDMI{B,C,D} - PCH_SDVOB is still the same thing v2: Rebase (v1 was sent in May 2012). Signed-off-by: -
Jesse Barnes authored
Commented out and unneeded. Signed-off-by:
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Ben Widawsky authored
Signed-off-by:
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Ben Widawsky authored
v2: Actually use num_pages (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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- 03 Mar, 2013 9 commits
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Ville Syrjälä authored
Kill the HSW check from the single thread force wake code. HSW uses MT force wake exclusively these days. The commit that removed HSW single thread forcewake support: commit 36ec8f87 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Thu Oct 18 14:44:35 2012 +0200 drm/i915: unconditionally use mt forcewake on hsw/ivb Signed-off-by:
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Ville Syrjälä authored
Use the number '1' instead of FORCEWAKE_KERNEL when requesting single thread force wake since there is only one bit in the register. Using the FORCEWAKE_KERNEL name might give someone the wrong impression. Signed-off-by:
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Ville Syrjälä authored
The MT forcewake ACK register also has a corresponding bit to each of the bits in the MT forcewake register. Use the define we have for the bit we care about instead of a hardcoded number. Signed-off-by:
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Ville Syrjälä authored
The code is totally obvious so these comments serve no purpose. What's worse, one of them was wrong. Just remove them. Signed-off-by:
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Ville Syrjälä authored
The load detection code has moved around at some point, but it left a comment behind. The code now looks to be different enough to make the comment stale as well. Just remove it. Signed-off-by:
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Ville Syrjälä authored
The proper use of find_pll() isn't always so easy to determine from the code itself. Some documentation should help. Signed-off-by:
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Ville Syrjälä authored
to_user_ptr() simply casts a pointer passed as u64 from user space to void __user * correctly. Using this lets us get rid of all the tiresome casts. The idea came from Chris Wilson <chris@chris-wilson.co.uk>. Signed-off-by:
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Daniel Vetter authored
So ditch that if clause from the i8xx pll update code. Reviewed-by:
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Rodrigo Vivi authored
While old platforms had 3 transcoders and 3 pipes (1:1), HSW has 4 transcoders and 3 pipes. These regs were being used only by HDMI code where pipe is always the same thing as cpu_transcoder. This patch allow us to use them for DP, specially for TRANSCODER_EDP. v2: Adding HSW_TVIDEO_DIP_VSC_DATA to transmit vsc to eDP. Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by:
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- 21 Feb, 2013 1 commit
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Ville Syrjälä authored
Caching the PIPESTAT enable bits has been deemed pointless. Just read them from the register itself. Signed-off-by:
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- 20 Feb, 2013 3 commits
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Ville Syrjälä authored
The indentation is getting way too deep. Pull the vblank interupt handling out to separate functions. v2: Keep flip_mask handling in the main irq handler and flatten {i8xx,i915}_handle_vblank() even further. Signed-off-by: -
Ville Syrjälä authored
Use the gen3 logic for handling page flip interrupts on gen4. Unfortuantely this kills the stall_check since that looks like it can easily trigger too early. With the current logic the stall check would kick in on the first vblank after the flip has been submitted to the ring. If the CS takes longer than that to process the commands in the ring, the stall check will cause the page flip to be complete too early. That doesn't sound like a very good idea. Something better should be deviced if we still need the stall check. For now, mark i915_pageflip_stall_check() as unused. v2: Fix irq enable_mask and add __always_unused (Chris Wilson) References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1116587Reviewed-by:
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Ville Syrjälä authored
If the interrupt handler were to process a previous vblank interrupt and the following flip pending interrupt at the same time, the page flip would be completed too soon. To eliminate this race, check the live pending flip status from the ISR register before finishing the page flip. v2: Added a comment explaining the logic (by Chris Wilson) v3: Fix a typo in the comment Reviewed-by:
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