Merge tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner:

Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.

* tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: add rockchip RK1108 Evaluation board
  arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
  arm64: dts: rockchip: add pd_sd power-domain node for rk3399
  arm64: dts: rockchip: add eMMC's power domain support for rk3399
  arm64: dts: rockchip: add backlight support for rk3399 evb board
  arm64: dts: rockchip: add gmac needed pclk for rk3399 pd

Merge tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Pull "Qualcomm ARM64 Updates for v4.10 - Part 2" from Andy Gross:

* Add SDHC xo clk and 1.8V DDR support

* tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: qcom: msm8916: Add ddr support to sdhc1
  ARM: dts: Add xo to sdhc clock node on qcom platforms

Merge tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Pull "Samsung DeviceTree arm64 second update for v4.10" from Krzysztof Kozłowski:

1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.

* tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
  arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
  arm64: dts: exynos: TM2 - add support for MFC video codec device
  arm64: dts: exynos: TM2 - add support for JPEG codec device
  arm64: dts: exynos: TM2 - add support for GScaler devices
  arm64: dts: exynos: TM2 - remove unused UART3 and set clocks directly on CMU
  arm64: dts: exynos: Assign parent clock of the clkout clock for TM2 board
  arm64: dts: exynos: Move FSYS CMU configuration from Exynos5433 dtsi to TM2 dts
  arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
  arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
  arm64: dts: exynos: Fix IRQ type flags for Exynos5433 SoC
  arm64: dts: Add ARM PMU node for exynos7

Pull "Broadcom devicetree-arm64 changes for 4.10" from Florian Fainelli:

This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following:

- Robin updates the Northstart 2 DTS to use the generic IOMMU binding

- Scott renames the Broadcom Northstar 2 binding document to use a standard name
  including the brcm vendor prefix

- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
  Northstar 2 SVK reference board DTS file with it enabled.

- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
  Northstar 2 SoC

- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
  Northstar 2 SoC

- Ray adds required properties NAND controller properties to make NAND work on
  the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
  here to resolve DTS file merges

- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS

- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)

- Eric defines standard pinctrl groups in the BCM2835 GPIO node

- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
  to use their appropriate pinctrl functions

- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet

- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block

- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
  Device Tree nodes he also uses the proper DTSI file to define the USB host mode
  for the USB Device Tree nodes

* tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux: (23 commits)
  arm64: dts: NS2: Add PCI PHYs
  arm64: dts: NS2: enable sdio1
  ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
  ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
  ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
  ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
  dt: bindings: add thermal device driver for bcm2835
  arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.
  ARM: dts: bcm283x: fix typo in mailbox address
  DT: binding: bcm2835-mbox: fix address typo in example
  ARM64: dts: bcm2835: Fix bcm2837 compatible string
  arm64: dts: Update Broadcom NS2 to generic IOMMU binding
  arm64: dts: Updated NAND DT properties for NS2 SVK
  arm64: dts: rename ns2.txt to brcm,ns2.txt
  ARM64: dts: Add QSPI Device Tree node for NS2
  ARM64: dts: bcm283x: Use dtsi for USB host mode
  ARM: dts: bcm283x: drop alt3 from &gpio
  ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
  ...

Merge tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Pull "arm64: tegra: Device tree changes for v4.10-rc1" from Thierry Reding:

This adds initial support for Tegra186, the P3310 processor module as
well as the P2771 development board. Not much is functional, but there
is enough to boot to an initial ramdisk with debug serial output.

* tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add NVIDIA P2771 board support
  arm64: tegra: Enable PSCI on P3310
  arm64: tegra: Add NVIDIA P3310 processor module support
  arm64: tegra: Add GPIO controllers on Tegra186
  arm64: tegra: Add SDHCI controllers on Tegra186
  arm64: tegra: Add I2C controllers on Tegra186
  arm64: tegra: Add serial ports on Tegra186
  arm64: tegra: Add CPU nodes for Tegra186
  arm64: tegra: Add Tegra186 support

Merge tag 'renesas-arm64-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Pull "Second Round of Renesas ARM64 Based SoC DT Updates for v4.10" from Simon Horman:

Enhancements:
* Add device nodes for PRR
* Add m3ulcb board
* Enable I2C on r8a7796/salvator-x board
* Enable SDHI0 on h3ulcb board

* tag 'renesas-arm64-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7796: Add device node for PRR
  arm64: dts: r8a7795: Add device node for PRR
  arm64: dts: h3ulcb: rename SDHI0 pins
  arm64: dts: h3ulcb: enable SDHI2
  arm64: dts: m3ulcb: enable SDHI2
  arm64: dts: m3ulcb: enable SDHI0
  arm64: dts: m3ulcb: enable WDT
  arm64: dts: m3ulcb: enable EXTALR clk
  arm64: dts: m3ulcb: enable GPIO keys
  arm64: dts: m3ulcb: enable GPIO leds
  arm64: dts: m3ulcb: enable SCIF clk and pins
  arm64: dts: m3ulcb: initial device tree
  arm64: dts: m3ulcb: add M3ULCB board DT bindings
  arm64: dts: h3ulcb: update header
  arm64: dts: h3ulcb: update documentation with official board name
  arm64: dts: r8a7796: salvator-x: enable I2C
  arm64: dts: r8a7796: Enable I2C DMA
  arm64: dts: r8a7796: add I2C support

Two branches were incorrectly sent without having the necessary
header file changes. Rather than back those out now, I'm replacing
the symbolic names for the clks and resets with the numeric
values to get 'make allmodconfig dtbs' back to work.

After the header file changes are merged, we can revert this
patch.

Fixes: 6bc37fac ("arm64: dts: add Allwinner A64 SoC .dtsi")
Fixes: 50784e61 ("dts: arm64: db820c: add pmic pins specific dts file")
Acked-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Pull "mvebu dt64 for 4.10 (part 2)" from Gregory CLEMENT:

Fix DTC warning on Armada 37xx and 7K/8K

* tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu:
  ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
  arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
  arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx

Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>

This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

TM2 can support the HS400 mode, but eMMC is working in the lowest mode.
This patch adds the properties for HS400 and other modes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

Qualcomm ARM64 Updates for v4.10

* Add Hexagon SMD/PIL nodes
* Add DB820c PMIC pins
* Fixup APQ8016 voltage ranges
* Add various MSM8996 nodes to support SMD/SMEM/SMP2P
* Add support for Huawei Nexus 6P (Angler)
* Add support for LG Nexus 5x (Bullhead)

This pull request brings thermal support to the BCM2837 DT, and a few
other fixes.

In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

RK1108 EVB is designed by Rockchip for CVR field.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
[split off from dts patch and to prevent conflicts with px5 addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

PCI PHYs are missing from the Northstar2 DT entries for the 2 PCI buses.
Add them so that PCI devices can be discovered.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Enable sdio1 in the Northstar2 SVK device tree file
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Add the mshc_2 node for supporting T-Flash.

Also add the "mshc*" aliases. dwmmc driver should be assigned to
"ctrl_id" after parsing to "mshc".  If there are no aliases for mshc,
then it might be set to the wrong capabilities.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

The NVIDIA P2771 is composed of a P3310 processor module that connects
to the P2597 I/O board. It comes with a 1200x1920 MIPI DSI panel that is
connected via the P2597's display connector and has several connectors
such as HDMI, USB 3.0, PCIe and ethernet.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The P3310 processor module comes ships with a firmware that implements
PSCI 1.0. Enable and use it to bring up all CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The NVIDIA P3310 is a processor module used in several reference designs
that features a Tegra186 SoC, 8 GiB of LPDDR4 RAM, 32 GiB eMMC and other
essentials such as ethernet, WiFi and a PMIC. It is typically connected
to an I/O board (such as the P2597) that provides the connecters needed
to hook it up to the outside world.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Tegra186 has two GPIO controllers that are no longer compatible with the
controller found on earlier generations. One of these controllers exists
in an always-on partition of the SoC whereas the other can be clock- and
powergated.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Tegra186 has a total of four SDHCI controllers that each support SD 4.2
(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and
SDHOST 4.1 (up to UHS-I speed).
Signed-off-by: Thierry Reding <treding@nvidia.com>

Tegra186 has a total of nine I2C controllers that are compatible with
the I2C controllers introduced in Tegra114. Two of these controllers
share pads with two DPAUX controllers (for AUX transactions).
Signed-off-by: Thierry Reding <treding@nvidia.com>

The initial patch only added UARTA, but there's no reason we shouldn't
be adding all of them. While at it, also specify the missing clocks and
resets for UARTA.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Tegra186 has six CPUs: two CPUs are second generation Denver CPUs that
support ARMv8 and four CPUs are Cortex-A57 CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>

This adds the initial support of Tegra186 SoC. It provides enough to
enable the serial console and boot from an initial ramdisk.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[treding@nvidia.com: remove leading 0 from unit-addresses]
[treding@nvidia.com: remove unused nvidia,bpmp property]
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This supports SDHI2 for H3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This supports SDHI2 for M3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This supports SDHI0 on M3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This supports watchdog timer for M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This supports GPIO keys on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This supports GPIO leds on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
board (R-Car Starter Kit Pro)

This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add M3ULCB Device tree bindings Documentation, listing it as a supported
board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>